1

ZQA SOLE UMA SYSTEM DIAGRAM

DDR3- SODIMM1

CPU THERMAL
SENSOR

AMD Champlain

DDR3 channel A

S1G4 Processor

PAGE 5

DDR3- SODIMM2

DDR3 channel B

CPU SideBand TemperatureSense I2C

PCB STACK UP

CLK_PCI_775

NBGPP_CLK

SB820M

PCLK_DEBUG

NORTH BRIDGE
P0

LAYER 5 : VCC
LAYER 6 : BOT

LAN
BROADCOM
PCIE-LAN
BCM57780

IV@ -----> iGPU EV@ -----> dGPU

SPE@ -----> Option Notice

P2

RS880M

Mini PCI-E
Card

A11

(Wireless LAN)

21mm X 21mm, 528pin BGA

PAGE 24

HDMI

EXT CRT

CRT

EXT LVDS

PAGE 23
PAGE 22

LVDS

PAGE 22

INT HDMI
INT CRT
PAGE 6,7,8,9

RJ45

EXT HDMI

VRAM
DDR3
64MX16X4,64 bit
PAGE 21
800MHz

TDP: 13W
0.95 ~ 1.1V

PAGE 26

PAGE 10

PAGE 16,17,18,19,20,21

GFX Engine: 500MHz

(10/100/1000)
25MHz

CLK GEN

ATI
Park XT
128-bit M2 Pkg
29mm X 29mm

PCI-Expresss

LAYER 4 : IN2

From SB

PCI-Express 16X

LAYER 2 : GND
LAYER 3 : IN1

SBLINK_CLK

HT3

32.768KHz

NBGFX_CLK

1.8GHz

LAYER 1 : TOP

25MHz

PAGE 33

CPU_CLK

PAGE 2,3,4

PAGE 5

E.C. (CPUFAN#)

PAGE 4

638P (PGA) 35W

Danube Platform
(Main Stream)

CPU (PROCHOT)

(Reserve Only)

35mm X 35mm

PWM FAN SCH.

INT LVDS

A-LINK
PAGE 25

PAGE 27

SATA - ODD

CHARGER (ISL88731A)

AMD CPU CORE (ISL6265)

PAGE 37

PAGE 27

3 Gb/s

P0

A12
SATA1 150MB
3 Gb/s

CPU

P9

USB2.0 Port

Blue Tooth

PAGE 31

PAGE 31

PAGE 22

PCLK_DEBUG

TDP: 4.9W

LPC

P10

Mini Card

CardReader

WLAN & Debug

AU6347

PAGE 20

PAGE 10,11,12,13, 14
NB

Web-Camera

P4

NB_CORE (UP6111AQDD)
PAGE 39

P13

on board x1

23mm X 23mm, 605pin BGA

No PCI I/F

PAGE 35

SOUTH BRIDGE
SB820M

SATA0 150MB

FFC

SATA - HDD

USB BOARD
USB2.0 Ports x3
PAGE 31

PAGE 30

Azalia
12MHz

0.9V/DDR 1.5V(RT8207)

CLK_PCI_775

PAGE 40
CPU SideBand TemperatureSense I2C

Winbond KBC

Audio CODEC

NPCE781L

RTL ALC272X
PAGE 34

SYSTEM 5V/3V (RT8206)

PAGE 28

PAGE 36
D

1.1V(UP6111AQDD)
PAGE 38

Keyboard
TouchPad

Discharge /Thermal protec

SPI ROM

AUDIO CONN

Speaker CN

PROJECT : ZQA
Quanta Computer Inc.

(H.P./ MIC)

PAGE 33

PAGE 44

Digital MIC

PAGE 34

PAGE 28

PAGE 29

PAGE 29

Size

Rev
1A

Block Diagram
Date:

Document Number

Monday, May 31, 2010

Sheet

1
8

of

48

S1G4 (CPU)
+1.1V

+2.5V
L69

1.1V@1.5A

+1.1V_VLDT

2.5V@250mA

BLM21PG221SN1D(220_2A)_8

C661
LS0805-100M-N
4.7U/6.3V_6

C656
4.7U/6.3V_6

*SHORT_PAD

C650
.22u/6.3V_4

C653
3900p/25V_4

C658
*10u/6.3V_8

CPU CLK

10u/6.3V_8
10u/6.3V_8
.22u/6.3V_4
180p/50V_4

[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]
[6]

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7
HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

[6]
[6]
[6]
[6]

HT_CLKINP0
HT_CLKINN0
HT_CLKINP1
HT_CLKINN1

[6]
[6]
[6]
[6]

HT_CTLINP0
HT_CTLINN0
HT_CTLINP1
HT_CTLINN1

+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT
+1.1V_VLDT

D1
D2
D3
D4

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7
HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

E3
E2
E1
F1
G3
G2
G1
H1
J1
K1
L3
L2
L1
M1
N3
N2
E5
F5
F3
F4
G5
H5
H3
H4
K3
K4
L5
M5
M3
M4
N5
P5

HT_CLKINP0
HT_CLKINN0
HT_CLKINP1
HT_CLKINN1

J3
J2
J5
K5

HT_CTLINP0
HT_CTLINN0
HT_CTLINP1
HT_CTLINN1

N1
P1
P3
P4

FOX PZ63826-284R-41F
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2)
MLX 47296-4131
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2)
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)

HT LINK

L0_CADIN_H0
L0_CADIN_L0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H15
L0_CADIN_L15

VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3

L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15

L0_CLKIN_H0
L0_CLKIN_L0
L0_CLKIN_H1
L0_CLKIN_L1

L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLIN_H1
L0_CTLIN_L1

L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1

300/F_4

R396

CPU_LDT_REQ#_CPU

*300/F_4

R392

CPU_LDT_STOP#

300/F_4

R106

AE2
AE3
AE4
AE5

+1.1V_VLDT 10u/6.3V_8
+1.1V_VLDT .22u/6.3V_4
+1.1V_VLDT 180p/50V_4
+1.1V_VLDT

AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3

HT_CADOUTP0
HT_CADOUTN0
HT_CADOUTP1
HT_CADOUTN1
HT_CADOUTP2
HT_CADOUTN2
HT_CADOUTP3
HT_CADOUTN3
HT_CADOUTP4
HT_CADOUTN4
HT_CADOUTP5
HT_CADOUTN5
HT_CADOUTP6
HT_CADOUTN6
HT_CADOUTP7
HT_CADOUTN7
HT_CADOUTP8
HT_CADOUTN8
HT_CADOUTP9
HT_CADOUTN9
HT_CADOUTP10
HT_CADOUTN10
HT_CADOUTP11
HT_CADOUTN11
HT_CADOUTP12
HT_CADOUTN12
HT_CADOUTP13
HT_CADOUTN13
HT_CADOUTP14
HT_CADOUTN14
HT_CADOUTP15
HT_CADOUTN15

Y1
W1
Y4
Y3

HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

R2
R3
T5
R5

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1

CLK_CPU_BCLKP_C

C597
C605
C607

R402

169/F_4

HT_CADOUTP0 [6]
HT_CADOUTN0 [6]
HT_CADOUTP1 [6]
HT_CADOUTN1 [6]
HT_CADOUTP2 [6]
HT_CADOUTN2 [6]
HT_CADOUTP3 [6]
HT_CADOUTN3 [6]
HT_CADOUTP4 [6]
HT_CADOUTN4 [6]
HT_CADOUTP5 [6]
HT_CADOUTN5 [6]
HT_CADOUTP6 [6]
HT_CADOUTN6 [6]
HT_CADOUTP7 [6]
HT_CADOUTN7 [6]
HT_CADOUTP8 [6]
HT_CADOUTN8 [6]
HT_CADOUTP9 [6]
HT_CADOUTN9 [6]
HT_CADOUTP10 [6]
HT_CADOUTN10 [6]
HT_CADOUTP11 [6]
HT_CADOUTN11 [6]
HT_CADOUTP12 [6]
HT_CADOUTN12 [6]
HT_CADOUTP13 [6]
HT_CADOUTN13 [6]
HT_CADOUTP14 [6]
HT_CADOUTN14 [6]
HT_CADOUTP15 [6]
HT_CADOUTN15 [6]
HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

VDDA1
VDDA2

CLK_CPU_BCLKP_C
CLK_CPU_BCLKN_C

A9
A8

CLKIN_H
CLKIN_L

CPU_LDT_RST#
B7
CPU_PWRGD
A7
CPU_LDT_STOP#
F10
CPU_LDT_REQ#_CPU C6

[10] CPU_LDT_RST#
[10,37] CPU_PWRGD
[8,10] CPU_LDT_STOP#
[4]
[4]

CPU_SIC
CPU_SID
T146
R102
R103

+1.1V_VLDT

CPU_ALERT#

44.2/F_4 CPU_HTREF0
44.2/F_4 CPU_HTREF1
place them to CPU within 1.5"

[37] CPU_VDD0_FB_H
[37] CPU_VDD0_FB_L
[37] CPU_VDD1_FB_H
T70
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI

T72
T73
T154
T156
T155

R159
R152

+1.5VSUS

[6]
[6]
[6]
[6]
+1.5VSUS

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1

3900p/25V_4
3900p/25V_4

[6]
[6]
[6]
[6]

R406

1K_4

R403

*300/F_4

RESET_L
PWROK
LDTSTOP_L
LDTREQ_L

20K/F_4

CPU_SVC
CPU_SVD

AF6
AC7
AA8

CPU_THERMTRIP_L#
CPU_PROCHOT_L#

THERMDC
THERMDA

W7
W8

H_THRMDC
H_THRMDA

VDDIO_FB_H
VDDIO_FB_L

THERMTRIP_L
PROCHOT_L
MEMHOT_L

SIC
SID
ALERT_L

R6
P6

HT_REF0
HT_REF1

F6
E6

VDD0_FB_H
VDD0_FB_L

VDDIO_FB_H
VDDIO_FB_L

W9
Y9

Y6
AB6

VDD1_FB_H
VDD1_FB_L

VDDNB_FB_H
VDDNB_FB_L

H6
G6

G10
AA9
AC9
AD9
AF9
AD7

CPUTEST18
CPUTEST19

H10
G9

510/F_4
CPUTEST25H
E9
CPUTEST25L
510/F_4
E8
place them to CPU within 1.5"
CPUTEST21
AB8
CPUTEST20
AF7
CPUTEST24
AE7
CPUTEST22
AE8
CPUTEST12
AC8
CPUTEST27
AF8

DBRDY
TMS
TCK
TRST_L
TDI

TEST21
TEST20
TEST24
TEST22
TEST12
TEST27

C2
AA6

TEST9
TEST6

A3
A5
B3
B5
C1

RSVD1
RSVD2
RSVD3
RSVD4
RSVD5

C627

.1u/10V_4

R389

34.8K/F_4

TEST7
TEST10

C3
K8

CPUTEST17
CPUTEST16
CPUTEST15
CPUTEST14

T76
T74
T71
T78

C4
CPUTEST29H

C9
C8

R155
80.6/F_4

H18
H19
AA7
D5
C5

RSVD10
RSVD9
RSVD8
RSVD7
RSVD6

CPUTEST29L

VFIX MODE

+1.5V

R398

300/F_4

+1.5VSUS

R382

1K_4

+1.5VSUS

R395

1K_4

10K_4

+1.5VSUS

R381

300/F_4
2

+1.5VSUS

R367

CPU_PROCHOT_L#

R390

*220_4

R388

*220_4

R399

*220_4

VID Override Circuit

SVC

SVD

0
0
1
1

0
1
0
1

Voltage Output

1.1V
1.0V
0.9V
0.8V

PM_THERM# [33]

CPUTEST24
CPUTEST23
CPUTEST20
CPUTEST22
CPUTEST12
CPUTEST15
CPUTEST14
CPUTEST19
CPUTEST18
CPUTEST21

HDT Connector

Q12
MMBT3904

CPU_SVC [37]
CPU_SVD [37]

R405

D7
E7
F7
C7

TEST29_H
TEST29_L

Q16
BSS138_NL/SOT23

TEST17
TEST16
TEST15
TEST14

TEST8

Serial VID

CNTR_VREF [4]

CPU_PROCHOT# [10]
2

+1.5VSUS

SOCKET_638_PIN

+1.5VSUS

HWPG

300/F_4

T157

J7
H8

TEST28_H
TEST28_L

TEST25_H
TEST25_L

T66
T68

CPU_VDDNB_FB_H [37]
CPU_VDDNB_FB_L [37]

AE9 CPU_TDO

TDO

TEST18
TEST19

T60
T63

E10 CPU_DBREQ# R153

DBREQ_L

TEST23

A6
A4

SVC
SVD

AF4
AF5
AE6

CPUTEST23

CPU_SVC
CPU_SVD
CPU_PWRGD

[34]

M11
W18

VSS
RSVD11

R119

+1.5V

U22D
F8
F9

CLK_CPU_BCLKN_C
C642
C639

[10] CLK_CPU_BCLKP_PR
[10] CLK_CPU_BCLKN_PR

250mA

W/S= 15 mil/20mil
+CPUVDDA
+CPUVDDA

SOCKET_638_PIN

CNTR_VREF

+3V

VLDT_A0
VLDT_A1
VLDT_A2
VLDT_A3

+CPUVDDA

Keep trace from resisor to CPU within 0.6"

keep trace from caps to CPU within 1.2"

U22A
C591
C608
C604
C606

CPU_LDT_RST#
+CPUVDDA

A19
R355

+CPUVDDA

W/S= 15 mil/20mil

R397
R391
R394
R401
R136
R138
R149
R135
R140
R139

1K_4
1K_4
1K_4
1K_4
1K_4
*300/F_4
*300/F_4
1K_4
1K_4
1K_4

1K_4
+1.5VSUS

1K_4

R387

CPU_THERMTRIP_L#

Q15
MMBT3904
3

PROJECT : ZQA
Quanta Computer Inc.
SYS_SHDN# [36,44]

Size

Document Number

Rev
1A

S1G4 HT,CTL I/F 1/3

Date:
5

Monday, May 31, 2010

Sheet
1

of

48

35W CPU support 0.9V

45W CPU support 1.05V
CPU_VDDR

U22B

PLACE THEM CLOSE TO

CPU WITHIN 1"

D10
C10
B10
AD10

+1.5VSUS
R410
R408

C655
10u/6.3V_8

39.2/F_4
39.2/F_4

M_ZP
M_ZN

VDDR=>1.75A

[5]

M_A_RST#

H16

MA_RESET_L

[5]
[5]

M_A_ODT0
M_A_ODT1

T19
V22
U21
V19

MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1

[5]
[5]

M_A_CS#0
M_A_CS#1

T20
U19
U20
V20

MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1

[5]
[5]

M_A_CKE0
M_A_CKE1

J22
J20

MA_CKE0
MA_CKE1

[5]
[5]

M_A_CLKP1
M_A_CLKN1

[5]
[5]

M_A_CLKP2
M_A_CLKN2
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

CPU_VDDR

CPU_VDDR

[5] M_B_DQ[0..63]

MEMVREF

W 10
AC10
AB10
AA10
A10

1K/F_4
CPU_VTT_SENSE

Y10

R141

*0_4

W 17 MEMVREF_CPU
B18

M_B_RST# [5]

MB0_ODT0
MB0_ODT1
MB1_ODT0

W 26
W 23
Y26

M_B_ODT0 [5]
M_B_ODT1 [5]

MB0_CS_L0
MB0_CS_L1
MB1_CS_L0

V26
W 25
U22

M_B_CS#0 [5]
M_B_CS#1 [5]

MB_CKE0
MB_CKE1

J25
H26

M_B_CKE0 [5]
M_B_CKE1 [5]
M_B_CLKP1 [5]
M_B_CLKN1 [5]

MB_RESET_L

N19
N20
E16
F16
Y16
AA16
P19
P20

MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4

MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4

P22
R22
A17
A18
AF18
AF17
R26
R25

N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19

MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15

MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15

P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W 24
J23
J24

R143
C231
.1u/10V_4

C230
1000P/50V_4

1K/F_4

M_B_CLKP2 [5]
M_B_CLKN2 [5]
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_A_A[0..15]
M_A_BANK0
M_A_BANK1
M_A_BANK2

R20
R23
J21

MA_BANK0
MA_BANK1
MA_BANK2

MB_BANK0
MB_BANK1
MB_BANK2

R24
U26
J26

M_B_BANK0 [5]
M_B_BANK1 [5]
M_B_BANK2 [5]

[5]
[5]
[5]

M_A_RAS#
M_A_CAS#
M_A_WE#

R19
T22
T24

MA_RAS_L
MA_CAS_L
MA_W E_L

MB_RAS_L
MB_CAS_L
MB_W E_L

U25
U24
U23

M_B_RAS# [5]
M_B_CAS# [5]
M_B_WE# [5]

M_B_A[0..15]

[5]

SOCKET_638_PIN

C339
*4.7U/6.3V_6

Place close to socket

C652
4.7U/6.3V_6

C269
4.7U/6.3V_6

C346
4.7U/6.3V_6

C367
.22u/6.3V_4

C356
.22u/6.3V_4

C302
.22u/6.3V_4

C259
.22u/6.3V_4

[5] M_B_DM[0..7]

CPU_VDDR

C351
1000P/50V_4

C365
1000P/50V_4

C325
1000P/50V_4

C315
1000P/50V_4

C317
180p/50V_4

C283
180p/50V_4

M_A_DQ[0..63]

MEM:DATA

[5]
[5]
[5]

Processor Memory Interface

U22C

R144

[5]

CPU_VDDR

+1.5VSUS

VDDR1 MEM:CMD/CTRL/CLKVDDR5
VDDR2
VDDR6
VDDR3
VDDR7
VDDR4
VDDR8
VDDR9
MEMZP
MEMZN
VDDR_SENSE

AF10
AE10

VDDR=> 0.9V support 1066 / 800 DDR

VDDR= >1.05V support 1333 / 1066 / 800 DDR

C327
180p/50V_4

C244
180p/50V_4

[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]

M_B_DQSP0
M_B_DQSN0
M_B_DQSP1
M_B_DQSN1
M_B_DQSP2
M_B_DQSN2
M_B_DQSP3
M_B_DQSN3
M_B_DQSP4
M_B_DQSN4
M_B_DQSP5
M_B_DQSN5
M_B_DQSP6
M_B_DQSN6
M_B_DQSP7
M_B_DQSN7

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
Y11
AE14
AF14
AF11
AD11

MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

A12
B16
A22
E25
AB26
AE22
AC16
AD12

MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7

C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12

MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7

MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63

G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W 22
W 21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W 16
W 14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W 11
AB14
AA14
AB12
AA12

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7

E12
C15
E19
F24
AC24
Y19
AB16
Y13

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7

G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W 15
W 12
W 13

[5]

M_A_DM[0..7]

M_A_DQSP0
M_A_DQSN0
M_A_DQSP1
M_A_DQSN1
M_A_DQSP2
M_A_DQSN2
M_A_DQSP3
M_A_DQSN3
M_A_DQSP4
M_A_DQSN4
M_A_DQSP5
M_A_DQSN5
M_A_DQSP6
M_A_DQSN6
M_A_DQSP7
M_A_DQSN7

[5]

[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]
[5]

SOCKET_638_PIN

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

S1G4 DDRIII MEMORY I/F 2/3

Date:
A

Monday, May 31, 2010

Sheet
E

of

48

U22F
U22E

+VCORE

+CPU_VDDNB_CORE

3A
+1.5VSUS

+VCORE

G4
H2
J9
J11
J13
J15
K6
K10
K12
K14
L4
L7
L9
L11
L13
L15
M2
M6
M8
M10
N7
N9
N11

VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_8
VDD_9
VDD_10
VDD_11
VDD_12
VDD_13
VDD_14
VDD_15
VDD_16
VDD_17
VDD_18
VDD_19
VDD_20
VDD_21
VDD_22
VDD_23

K16
M16
P16
T16
V16

VDDNB_1
VDDNB_2
VDDNB_3
VDDNB_4
VDDNB_5

H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12

VDD_24
VDD_25
VDD_26
VDD_27
VDD_28
VDD_29
VDD_30
VDD_31
VDD_32
VDD_33
VDD_34
VDD_35
VDD_36
VDD_37
VDD_38
VDD_39
VDD_40
VDD_41
VDD_42
VDD_43
VDD_44
VDD_45
VDD_46
VDD_47
VDD_48
VDD_49

P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2

VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13

Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18

+1.5VSUS

1.5V@2A

SOCKET_638_PIN
+1.5VSUS

[2] CNTR_VREF

[34] CPU_SMBCLK

CPU_SMBCLK

R374
1K_4

Q13
BSS138_NL/SOT23

R372
1K_4

CPU_SIC [2]

Q14
BSS138_NL/SOT23

AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65

VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129

J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6

BOTTOM SIDE DECOUPLING

+VCORE

+
PC52
*330u/2V_7343

C208
10u/6.3V_8

C253
10u/6.3V_8

C634
10u/6.3V_8

C265
10u/6.3V_8

C292
.22u/6.3V_4

C305
.01u/16V_4

C228
180p/50V_4

+VCORE

C303
10u/6.3V_8

+CPU_VDDNB_CORE

C306
10u/6.3V_8

C637
10u/6.3V_8

C278
10u/6.3V_8

C643
10u/6.3V_8

C241
.22u/6.3V_4

C226
.01u/16V_4

C207
180p/50V_4

C256
.01u/16V_4

+1.5VSUS

C326
C287
10u/6.3V_8 10u/6.3V_8

C390
10u/6.3V_8

C401
10u/6.3V_8

C379
.22u/6.3V_4

C331
.22u/6.3V_4

C406
180p/50V_4

C300
180p/50V_4

DECOUPLING BETWEEN PROCESSOR AND DIMMs

PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.5VSUS

C396
4.7U/6.3V_6

C375
4.7U/6.3V_6

C376
4.7U/6.3V_6

C383
4.7U/6.3V_6

C374
.22u/6.3V_4

C400
.22u/6.3V_4

+1.5VSUS

C392
.22u/6.3V_4

C398
.22u/6.3V_4

C322
.01u/16V_4

C373
.01u/16V_4

C301
180p/50V_4

SOCKET_638_PIN
[34] CPU_SMBDATA

CPU_SMBDATA

CPU_SID [2]

PROCESSOR POWER AND GROUND

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

S1G4 PWR & GND 3/3

Date:
5

Monday, May 31, 2010

Sheet
1

of

48

109
108
79

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

11
28
46
63
136
153
170
187

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

M_A_DQSP0
M_A_DQSP1
M_A_DQSP2
M_A_DQSP3
M_A_DQSP4
M_A_DQSP5
M_A_DQSP6
M_A_DQSP7

12
29
47
64
137
154
171
188

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

M_A_DQSN0
M_A_DQSN1
M_A_DQSN2
M_A_DQSN3
M_A_DQSN4
M_A_DQSN5
M_A_DQSN6
M_A_DQSN7

10
27
45
62
135
152
169
186

[3]
[3]
[3]
[3]

101
103
102
104

M_A_CLKP1
M_A_CLKN1
M_A_CLKP2
M_A_CLKN2

[3]
[3]

73
74

M_A_CKE0
M_A_CKE1

[3]
[3]
[3]
[3]
[3]

M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_CS#0
M_A_CS#1

110
115
113
114
121

[3]
[3]

M_A_ODT0
M_A_ODT1

116
120

BA0/BA1
BA1/BA0
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
RAS#
CAS#
WE#
S0#
S1#
ODT0
ODT1

M_B_DQ[0..63]

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

+1.5VSUS

M_A_DQ1
M_A_DQ0
M_A_DQ6
M_A_DQ7
M_A_DQ4
M_A_DQ5
M_A_DQ3
M_A_DQ2
M_A_DQ9
M_A_DQ8
M_A_DQ15
M_A_DQ11
M_A_DQ13
M_A_DQ12
M_A_DQ10
M_A_DQ14
M_A_DQ17
M_A_DQ21
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ16
M_A_DQ23
M_A_DQ22
M_A_DQ28
M_A_DQ29
M_A_DQ27
M_A_DQ31
M_A_DQ24
M_A_DQ25
M_A_DQ30
M_A_DQ26
M_A_DQ37
M_A_DQ38
M_A_DQ33
M_A_DQ35
M_A_DQ32
M_A_DQ36
M_A_DQ39
M_A_DQ34
M_A_DQ40
M_A_DQ41
M_A_DQ46
M_A_DQ47
M_A_DQ44
M_A_DQ45
M_A_DQ42
M_A_DQ43
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ61
M_A_DQ60
M_A_DQ63
M_A_DQ62
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59

+SMDDR_VREF

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

+VREF_CA_B
R210
*1K/F_4

R207

*Short_4

C450
.1u/10V_4

C444
2.2U/6.3V_6

R211
*1K/F_4

[3] M_B_BANK[0..2]

[3]

M_B_DM[0..7]

Standard
Connector
1
2
3
5

4
6

7
8
9
10
12

13
14
16
18
19
20
21
22
24

23
25

26
27
28
29
30
31
32
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73

34
36
38
40

44
46
48
50
52
54
56
58
60

11
28
46
63
136
153
170
187
12
29
47
64
137
154
171
188

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

M_B_DQSN0
M_B_DQSN1
M_B_DQSN2
M_B_DQSN3
M_B_DQSN4
M_B_DQSN5
M_B_DQSN6
M_B_DQSN7

10
27
45
62
135
152
169
186
101
103
102
104

M_B_CLKP1
M_B_CLKN1
M_B_CLKP2
M_B_CLKN2

73
74

M_B_CKE0
M_B_CKE1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
CK0
CK0#
CK1
CK1#
CKE0
CKE1

66
68
70

[3]
[3]
[3]
[3]
[3]

M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CS#0
M_B_CS#1

110
115
113
114
121

[3]
[3]

M_B_ODT0
M_B_ODT1

116
120

72
74

75
76
78
80
81
82
84
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
102
104

105
106
107
108
109
110
111
112
113
114
115
116
117
119
121

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

BA0/BA1
BA1/BA0
BA2

118
120
122

123
124
125

RAS#
CAS#
WE#
S0#
S1#

126
127
128
129
130
131
132
133
134
135
136
137
139

138
140

141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
157

156
158

ODT0
ODT1

5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

M_B_DQ4
M_B_DQ5
M_B_DQ7
M_B_DQ6
M_B_DQ0
M_B_DQ1
M_B_DQ3
M_B_DQ2
M_B_DQ9
M_B_DQ8
M_B_DQ15
M_B_DQ14
M_B_DQ12
M_B_DQ13
M_B_DQ10
M_B_DQ11
M_B_DQ17
M_B_DQ16
M_B_DQ18
M_B_DQ23
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ22
M_B_DQ29
M_B_DQ24
M_B_DQ30
M_B_DQ31
M_B_DQ28
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ32
M_B_DQ33
M_B_DQ39
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ34
M_B_DQ38
M_B_DQ44
M_B_DQ40
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ41
M_B_DQ43
M_B_DQ42
M_B_DQ53
M_B_DQ52
M_B_DQ55
M_B_DQ54
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ60
M_B_DQ61
M_B_DQ58
M_B_DQ59
M_B_DQ57
M_B_DQ56
M_B_DQ62
M_B_DQ63

Place these Caps near So-Dimm H=8.

+1.5VSUS
C448
.1u/10V_4

C449
.1u/10V_4

C394
.1u/10V_4

199
30

M_A_RST#

198
1

+0.75VSMVREF_SUSA
+VREF_CA_A

126

+0.75V_DDR_VTT

203
204

C424
*10u/6.3V_6

C671
.1u/10V_4

C422
1000P/50V_4

+1.5VSUS
A

+SMDDR_VREF

2
3
8
9
13
14
19
20
25
26
31
32

RST#
EVENT#
VREF
VrefCA
VTT1
VTT2
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11

181

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27

182
184

188

C432
.1u/10V_4

PDAT_SMB
PCLK_SMB
C670
.01u/16V_4

+3V
[3]

200
202
199
30

M_B_RST#

198
1

+0.75VSMVREF_SUSB
+VREF_CA_B

126

+0.75V_DDR_VTT

203
204
C442
*10u/6.3V_6

C668

C427
.1u/10V_4

Standard
Connector

+1.5VSUS

+1.5VSUS

1
+

1
2
3
5

C418

C439

4
6

7
8
9
10
11
12

13
14
15
16
17
18
19
20
21
22
24

23
25

26
27

*330u/2V_7343

*330u/2V_7343

28
29
30
31
32
33
35
37
39

41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73

34
36
38
40

42
44
46
48
50
52
54
56
58

Place on each DIMM Connector

60
62
64
66
68
70
72
74

75
76
77
78
79
80
81
82
84

83
85

86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
103

102
104

105
106
107
108
109
110
111
112
113
114
115
116
117
118
120

119
121

122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
138
140
142
144
146

SA0
SA1

C440
.1u/10V_4

C667
R415
1K/F_4
2.2U/6.3V_6

C441
1000P/50V_4

2
3
8
9
13
14
19
20
25
26
31
32

77
122
125

NC1
NC2
TEST

190

196

.1u/10V_4

C435
.1u/10V_4

143

192
194

198

+0.75VSMVREF_SUSA

C397
.1u/10V_4

141

189

197

R416
1K/F_4

C405
.1u/10V_4

145

191

+1.5VSUS

C377
.1u/10V_4

152

197
201

186

199

196
195
190
189
185
184
179
178
173
172
168
167
162
161
156
155
151
150
145
144
139
138
134
133
128

C426
.1u/10V_4

153

187

154
155
157

156
158

159
160
161
162
163
164
165

200

166

MEM_MB_TEST

T83

199

167
168
169
170
171
172
173
175

174
176

177
178
179
180
181
182
183
184
185
186
187
188
189
190

SDA
SCL

191

196
197
198
199
200

VDDspd
RST#
EVENT#
oVREF

VrefCA
VTT1
VTT2
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11

192
194

193
195

H=4

DDR3_SO-DIMM_H=8_1.5V_Standard

H=8

+VREF_CA_A

180

200

200

VDDspd

C425
.1u/10V_4

10u/6.3V_6

137
139

VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26

[3]

C382
.1u/10V_4

196
195
190
189
185
184
179
178
173
172
168
167
162
161
156
155
151
150
145
144
139
138
134
133
128

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27

+1.5VSUS

R192
1K/F_4

+0.75VSMVREF_SUSB

C430
.1u/10V_4

C428

R194
1K/F_4

2.2U/6.3V_6

37
38
43
44
48
49
54
55
60
61
65
66
71
72
127

C403
.01u/16V_4

+3V

178

SDA
SCL

VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26

172
174
176

177
179

37
38
43
44
48
49
54
55
60
61
65
66
71
72
127

200
202

[11,26] PDAT_SMB
[11,26] PCLK_SMB

170
171

193
195

C437
.1u/10V_4

151

DIM2_SA0
DIM2_SA1

185

T82

C443
.1u/10V_4

150

168

183

MEM_MA_TEST

C447
.1u/10V_4

148

166
167
169

173
175

C436
.1u/10V_4

147

164
165

199

C387

162

77
122
125

C434
.1u/10V_4

149

163

NC1
NC2
TEST

C445
.1u/10V_4

+1.5VSUS

161

SA0
SA1

C446
.1u/10V_4

Place these Caps near So-Dimm H=4.

160

197
201

C433
.1u/10V_4

C438
10u/6.3V_6

159

DIM1_SA0
DIM1_SA1

[3]

CN15

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

64

79

101
103

109
108
79

A0
A1
A2
A3/A4
A4/A3
A5/A6
A6/A5
A7/A8
A8/A7
A9
A10/AP
A11
A12_BC#
A13
A14
A15/BA3

62

77

83
85

M_B_BANK0
M_B_BANK1
M_B_BANK2

M_B_DQSP0
M_B_DQSP1
M_B_DQSP2
M_B_DQSP3
M_B_DQSP4
M_B_DQSP5
M_B_DQSP6
M_B_DQSP7

[3]
[3]

42

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

[3]
[3]
[3]
[3]
[3]
[3]
[3]
[3]

[3]
[3]
[3]
[3]

11

15
17

+1.5VSUS

M_B_A[0..15]

DDR3 SO-DIMM
(Standard )

M_A_DM[0..7]

M_A_BANK0
M_A_BANK1
M_A_BANK2

[3]

CN11

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

CON_SODIMM200_STD_V1

[3] M_A_BANK[0..2]

A0
A1
A2
A3/A4
A4/A3
A5/A6
A6/A5
A7/A8
A8/A7
A9
A10/AP
A11
A12_BC#
A13
A14
A15/BA3

DDR3 SO-DIMM
(Standard )

98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78

[3]

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

M_A_DQ[0..63]

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

[3]

+1.5VSUS

M_A_A[0..15]

CON_SODIMM200_STD_V1

[3]

DDR3_SO-DIMM_H=4_1.5V_Standard

R178
*1K/F_4
R183

R418

10K_4

DIM1_SA0

DIM2_SA0

R180

10K_4

R417

10K_4

DIM1_SA1

DIM2_SA1

R186

10K_4

*Short_4

C409
.1u/10V_4

C411
2.2U/6.3V_6

R182
*1K/F_4

SMbus address A0

+3V

PROJECT : ZQA
Quanta Computer Inc.

SMbus address A2
Size

Document Number

Rev
1A

DDR2 SODIMMS: A/B CHANNEL

Date:
5

Monday, May 31, 2010

Sheet 5
1

of

48

U16A

HT_CADOUTP0
HT_CADOUTN0
HT_CADOUTP1
HT_CADOUTN1
HT_CADOUTP2
HT_CADOUTN2
HT_CADOUTP3
HT_CADOUTN3
HT_CADOUTP4
HT_CADOUTN4
HT_CADOUTP5
HT_CADOUTN5
HT_CADOUTP6
HT_CADOUTN6
HT_CADOUTP7
HT_CADOUTN7

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

HT_CADOUTP8
HT_CADOUTN8
HT_CADOUTP9
HT_CADOUTN9
HT_CADOUTP10
HT_CADOUTN10
HT_CADOUTP11
HT_CADOUTN11
HT_CADOUTP12
HT_CADOUTN12
HT_CADOUTP13
HT_CADOUTN13
HT_CADOUTP14
HT_CADOUTN14
HT_CADOUTP15
HT_CADOUTN15

[2]
[2]
[2]
[2]

HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

[2]
[2]
[2]
[2]

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1
R349

HT_CADOUTP0
HT_CADOUTN0
HT_CADOUTP1
HT_CADOUTN1
HT_CADOUTP2
HT_CADOUTN2
HT_CADOUTP3
HT_CADOUTN3
HT_CADOUTP4
HT_CADOUTN4
HT_CADOUTP5
HT_CADOUTN5
HT_CADOUTP6
HT_CADOUTN6
HT_CADOUTP7
HT_CADOUTN7

301/F_4

Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25

HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N

PART 1 OF 6

HYPER TRANSPORT CPU I/F

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N

D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7

HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N

F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18

HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N

H24
H25
L21
L20

HT_CLKINP0
HT_CLKINN0
HT_CLKINP1
HT_CLKINN1

HT_CADOUTP8
HT_CADOUTN8
HT_CADOUTP9
HT_CADOUTN9
HT_CADOUTP10
HT_CADOUTN10
HT_CADOUTP11
HT_CADOUTN11
HT_CADOUTP12
HT_CADOUTN12
HT_CADOUTP13
HT_CADOUTN13
HT_CADOUTP14
HT_CADOUTN14
HT_CADOUTP15
HT_CADOUTN15

AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W 21
W 20
V21
V20
U20
U21
U19
U18

HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N

HT_CLKOUTP0
HT_CLKOUTN0
HT_CLKOUTP1
HT_CLKOUTN1

T22
T23
AB23
AA22

HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N

HT_CTLOUTP0
HT_CTLOUTN0
HT_CTLOUTP1
HT_CTLOUTN1

M22
M23
R21
R20

HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N

HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N

M24
M25
P19
R18

HT_CTLINP0
HT_CTLINN0
HT_CTLINP1
HT_CTLINN1

C23
A24

HT_RXCALP
HT_RXCALN

HT_TXCALP
HT_TXCALN

B24
B25

HT_TXCALP
HT_TXCALN

HT_RXCALP
HT_RXCALN

HT_CADINP8
HT_CADINN8
HT_CADINP9
HT_CADINN9
HT_CADINP10
HT_CADINN10
HT_CADINP11
HT_CADINN11
HT_CADINP12
HT_CADINN12
HT_CADINP13
HT_CADINN13
HT_CADINP14
HT_CADINN14
HT_CADINP15
HT_CADINN15

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

HT_CTLINP0 [2]
HT_CTLINN0 [2]
HT_CTLINP1 [2]
HT_CTLINN1 [2]

RS880/RX881

Ra

[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]
[2]

HT_CLKINP0 [2]
HT_CLKINN0 [2]
HT_CLKINP1 [2]
HT_CLKINN1 [2]

R350

HT_CADINP0
HT_CADINN0
HT_CADINP1
HT_CADINN1
HT_CADINP2
HT_CADINN2
HT_CADINP3
HT_CADINN3
HT_CADINP4
HT_CADINN4
HT_CADINP5
HT_CADINN5
HT_CADINP6
HT_CADINN6
HT_CADINP7
HT_CADINN7

Signals

RS880

RX880

Ra
301 ohm 1%

Ra
1.21k ohm 1%

Rb
301 ohm 1%

Rb
1.21k ohm 1%

HT_TXCALP
HT_TXCALN
HT_RXCALP
HT_RXCALN

301/F_4

RES CHIP 1.21K 1/16W +-1%(0402)

P/N : CS21212FB18

Rb

This block is for Side-Port only

U16D

PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
MEM_A5(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)

AD16
AE17
AD17

MEM_BA0(NC)
MEM_BA1(NC)
MEM_BA2(NC)

W 12
Y12
AD18
AB13
AB18
V14

MEM_RASb(NC)
MEM_CASb(NC)
MEM_W Eb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
MEM_ODT(NC)

V15
W 14

MEM_CKP(NC)
MEM_CKN(NC)

AE12
AD12

SBD_MEM/DVO_I/F

AB12
AE16
V11
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
Y14

MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ4(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)

AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21

MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)

Y17
W 18
AD20
AE21

MEM_DM0(NC)
MEM_DM1/DVO_D8(NC)

W 17
AE19

IOPLLVDD18(NC)
IOPLLVDD(NC)

AE23
AE24

IOPLLVSS(NC)

AD23

MEM_VREF(NC)

AE18

MEM_COMPP(NC)
MEM_COMPN(NC)

+1.8V
+1.1V

15mA
26mA

RS880/RX881
A

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

RS880M-HT LINK I/F 1/4

Date:
5

Monday, May 31, 2010

Sheet
1

of

48

PEG_RXP[15..0]

[15] PEG_RXP[15..0]

RS880 Display Port Support (muxed on GFX)

PEG_TXP[15..0]

[15] PEG_TXP[15..0]

PEG_RXN[15..0]

[15] PEG_RXN[15..0]

PEG_TXN[15..0]

[15] PEG_TXN[15..0]

GFX_TX0,TX1,TX2 and TX3

DP0

U16B

[24] PCIE_RX1+
[24] PCIE_RX1[26] PCIE_RXP2
[26] PCIE_RXN2
T33
T34

[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]

A_RXP0
A_RXN0
A_RXP1
A_RXN1
A_RXP2
A_RXN2
A_RXP3
A_RXN3

AUX0 and HPD0

D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3

GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N

AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N

AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5

SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N

GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N

A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2

PEG_TXP15_C
PEG_TXN15_C
PEG_TXP14_C
PEG_TXN14_C
PEG_TXP13_C
PEG_TXN13_C
PEG_TXP12_C
PEG_TXN12_C
PEG_TXP11_C
PEG_TXN11_C
PEG_TXP10_C
PEG_TXN10_C
PEG_TXP9_C
PEG_TXN9_C
PEG_TXP8_C
PEG_TXN8_C
PEG_TXP7_C
PEG_TXN7_C
PEG_TXP6_C
PEG_TXN6_C
PEG_TXP5_C
PEG_TXN5_C
PEG_TXP4_C
PEG_TXN4_C
PEG_TXP3_C
PEG_TXN3_C
PEG_TXP2_C
PEG_TXN2_C
PEG_TXP1_C
PEG_TXN1_C
PEG_TXP0_C
PEG_TXN0_C

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N

AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2

PCIE_TXP0_C
PCIE_TXN0_C

C546
C545

.1u/10V_4
.1u/10V_4

PCIE_TXP2_C
PCIE_TXN2_C

C543
C544

.1u/10V_4
.1u/10V_4

SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N

AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5

A_TXP0_C
A_TXN0_C
A_TXP1_C
A_TXN1_C
A_TXP2_C
A_TXN2_C
A_TXP3_C
A_TXN3_C

PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)

AC8
AB8

NB_PCIECALRP
NB_PCIECALRN

PART 2 OF 6

PCIE I/F GFX

PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0

PCIE I/F GPP

PCIE I/F SB

C568
C570
C561
C562
C557
C559
C553
C556
C549
C552
C541
C548
C537
C540
C527
C536
C535
C539
C518
C525
C523
C526
C530
C529
C522
C521
C532
C531
C520
C519
C534
C533

EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4

PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0

GFX_TX4,TX5,TX6 and TX7

DP1

AUX1 and HPD1

PCIE_TX1+ [24]
PCIE_TX1- [24]
PCIE_TXP2 [26]
PCIE_TXN2 [26]

LAN
WLAN

T32
T96

C573
C569
C560
C563
C555
C558
C547
C551
R326
R330

.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3

1.27K/F_4
2K/F_4

[10]
[10]
[10]
[10]
[10]
[10]
[10]
[10]

SB

+1.1V

RS880/RX881

INT HDMI
PEG_TXP15_C
PEG_TXN15_C
PEG_TXP14_C
PEG_TXN14_C
PEG_TXP13_C
PEG_TXN13_C
PEG_TXP12_C
PEG_TXN12_C

C76
C78
C73
C75
C68
C71
C64
C67

IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4
IV@.1u/10V_4

IV_TX2_HDMI+
IV_TX2_HDMIIV_TX1_HDMI+
IV_TX1_HDMIIV_TX0_HDMI+
IV_TX0_HDMIIV_TXC_HDMI+
IV_TXC_HDMI-

[23]
[23]
[23]
[23]
[23]
[23]
[23]
[23]

PROJECT : ZQA
Quanta Computer Inc.
Size

Rev
1A

RS880M-PCIE I/F 2/4

Date:

Document Number

Monday, May 31, 2010

Sheet

7
1

of

48

U16C

R59

*4.7K_4

INT_EDIDDATA

R60

*4.7K_4

INT_EDIDCLK

R58

*4.7K_4

110mA

+3V_AVDD_NB

20mA

+1.8V_AVDDDI_NB

4mA

+1.8V_AVDDQ_NB

IV_HDMI_DDC_DATA
[22] INT_CRT_RED
[22] INT_CRT_GRE

[22] INT_CRT_BLU

R74

IV@140/F_4

R77

IV@150/F_4

R79

IV@150/F_4

[22] INT_CRT_HSYNC
[22] INT_CRT_VSYNC
[22] INT_DDCDATA
[22] INT_DDCCLK

VGA

R80

715/F_4

[11,14]

R53
R55

*49.9/F_4
*49.9/F_4

G14

DAC_RSET(PWM_GPIO1)

A12
D14
B12

PLLVDD(NC)
PLLVDD18(NC)
PLLVSS(NC)

H17

VDDA18HTPLL

+1.8V_VDDA18HTPLL

120mA

+1.8V_VDDA18PCIEPLL

A_RST#_SB

CLK_NB_REF_CLKP
CLK_NB_REF_CLKN

[10] CLK_NB_REF_CLKP
[10] CLK_NB_REF_CLKN
4.7K_4
4.7K_4
T97
T95

[22] INT_EDIDDATA
[22] INT_EDIDCLK
[23] IV_HDMI_DDC_DATA
[23] IV_HDMI_DDC_CLK

SYSRESETb
POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP

C25
C24

HT_REFCLKP
HT_REFCLKN

E11
F11

REFCLK_P/OSCIN(OSCIN)
REFCLK_N(PWM_GPIO3)
GFX_REFCLKP
GFX_REFCLKN

GPP_REFCLKP
GPP_REFCLKN

U1
U2

GPP_REFCLKP
GPP_REFCLKN

V4
V3

GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)

A9
B9
B8
A8
B7
A7

I2C_DATA
I2C_CLK
DDC_DATA/AUX0N(NC)
DDC_CLK/AUX0P(NC)
AUX1P(NC)
AUX1N(NC)

DDC_DATA & DDC_CLK Not applicable to RX881

+NB_CORE_ON

RS880_AUX_CAL

T35

VDDA18PCIEPLL1
VDDA18PCIEPLL2

D8
A10
C10
C12

T2
T1

IV_HDMI_DDC_DATA

[39] +NB_CORE_ON

D7
E7

NBGFX_CLKP
NBGFX_CLKN

[10] CLK_SBLINKP
[10] CLK_SBLINKN

CLK_SBLINKN

RED(DFT_GPIO0)
REDb(NC)
GREEN(DFT_GPIO1)
GREENb(NC)
BLUE(DFT_GPIO3)
BLUEb(NC)

+1.1V_PLLVDD
+1.8V_PLLVDD18

20mA

CLK_SBLINKP

G18
G17
E18
F18
E19
F19

DAC_RSET_NB

[10] CLK_NB_HTREFP_PR
[10] CLK_NB_HTREFN_PR

R48
R47

C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)

DAC_HSYNC(PWM_GPIO4)
DAC_VSYNC(PWM_GPIO6)
DAC_SDA(PCE_TCALRN)
DAC_SCL(PCE_RCALRN)

NB_LDT_STOP#
NB_ALLOW_LDTSTOP

(02/10) Dont need 49.9 ohm PD.

E17
F17
F15

B10

STRP_DATA

G11

RSVD

C8

TXOUT_L0P(NC)
TXOUT_L0N(NC)
TXOUT_L1P(NC)
TXOUT_L1N(NC)
TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)

A22
B22
A21
B21
B20
A20
A19
B19

TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U2P(NC)
TXOUT_U2N(NC)
TXOUT_U3P(PCIE_RESET_GPIO5)
TXOUT_U3N(NC)

B18
A18
A17
B17
D20
D21
D18
D19

TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)

B16
A16
D16
D17

PART 3 OF 6

A11
B11
E8
F8

NB_PWRGD_IN

For A11 version

[10,34]

AVDD1(NC)
AVDD2(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
AVSSQ(NC)

INT_CRT_HSYNC
INT_CRT_VSYNC

+1.8V

R21
300/F_4

F12
E12
F14
G15
H15
H14

CRT/TVOUT

NB_PWRGD_IN

LA_DATAP0 [22]
LA_DATAN0 [22]
LA_DATAP1 [22]
LA_DATAN1 [22]
LA_DATAP2 [22]
LA_DATAN2 [22]

LA_CLK [22]
LA_CLK# [22]

VDDLTP18(NC)
VSSLTP18(NC)

A13
B13

+1.8V_VDDLTP18_NB

15mA

VDDLT18_1(NC)
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT33_2(NC)

A15
B15
A14
B14

+1.8V_VDDLT_18_NB

300mA

VSSLT1(VSS)
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
VSSLT7(VSS)

C14
D15
C16
C18
C20
E20
C22

LVDS_DIGON(PCE_TCALRP)
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)

E9
F7
G12

PLL PWR
LVTM

+3V

*4.7K_4

PM

+3V

R325

CLOCKs

For Check list JTAG

INT_LVDS_DIGON
[22]
INT_DPST_PWM [22]
INT_LVDS_BLON [22]

MIS.

TMDS_HPD(NC)
HPD(NC)

D9
D10

TVCLKIN(PWM_GPIO5)

D12

THERMALDIODE_P
THERMALDIODE_N

AE8
AD8

TESTMODE

D13

INT_HDMI_HPD
SUS_STAT#_NB

R324
R329
*3K_4

TEST_EN
R68
1.8K/F_4

AUX_CAL(NC)

*Short_4

[23]

SUS_STAT# [11]

Made provision for external pull-down which is not

installed by default. Pulled up externally for
bypassing EEPROM strapping and using default
values.

RS880/RX881

RS880M --- ADD

+1.1V

+1.8V

+3V
L23
BLM18PG221SN1D(220_1.4A)_6

STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.

solve CRTflicker
B

RS880M
1 Disable
0 Enable

+3V_AVDD_NB

C118
22u/6.3V_8

L56
BLM18PG221SN1D(220_1.4A)_6

+1.1V_PLLVDD

L19
BLM18PG221SN1D(220_1.4A)_6

+1.8V_VDDLTP18_NB
C91
2.2U/6.3V_6

PLLVDD - Graphics PLL

not applicable to RX780

AVDD-DAC Analog
not applicable to RX780

C88
2.2U/6.3V_6

VDDLTP18 - LVDS or DVI/HDMI PLL

not applicable to RX780

C576
2.2U/6.3V_6

L57

INT_CRT_VSYNC

R64

3K_4

+3V

+1.8V

+1.8V_VDDLT_18_NB

+1.8V

C105
.1u/10V_4

RS880M: Enables Side port memory

L20
BLM18PG221SN1D(220_1.4A)_6

AVDDI-DAC Digital
not applicable to RX780

Selects if Memory SIDE PORT is available or not

C578

C577

4.7U/6.3V_6

.1u/10V_4

VDDLT18 - LVDS or DVI/HDMI digital

not applicable to RX780

C93
4.7U/6.3V_6

C113
10u/6.3V_8
L21
BLM18PG221SN1D(220_1.4A)_6

+1.8V_PLLVDD18

PLLVDD18 - Graphics PLL

not applicable to RX780

RS880M:INT_CRT_HSYNC

BLM21PG221SN1D(220_2A)_8

+1.8V_AVDDDI_NB

+1.8V_AVDDQ_NB
C100
2.2U/6.3V_6

1 = Memory Side port Not available

AVDDQ-DAC Bandgap Reference

not applicable to RX780

0 = Memory Side port available

Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]
+1.8V

+1.8V

20mils width
+1.8V

VDDA18PCIEPLL -PCIE PLL

R66

3K_4

L18
+1.8V_VDDA18PCIEPLL
BLM18PG221SN1D(220_1.4A)_6

+3V

INT_CRT_HSYNC

C104
2.2U/6.3V_6

VDDA18HTPLL -HT LINK PLL

R328

- 74LVC07
1K_4

20mils width

L22
+1.8V_VDDA18HTPLL
BLM18PG221SN1D(220_1.4A)_6
+NB_CORE_ON

NB_LDT_STOP#

Drain

R332

RS780/RX780/RS880

For extrnal EEPROM Debug only

[10] ALLOW_LDTSTOP

2K/F_4

DDR3 based CPU : Level shifted to 1.8 V on the

Northbridge side using an open-drain buffer and
pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor
on the Northbridge side.

+ U15

2 Open

CPU_LDT_STOP#

[2,10]

9/16 need modify PN

R323
2.2K_4

R331

*Short_4

+1.8V

NB_ALLOW_LDTSTOP

C112
2.2U/6.3V_6

Display Port interface from PCIeGraphics (RS880/rs880M only)

RS880_AUX_CAL

R57

The RS880 family does not support CLMC architecture

The LDTREQ# connection from the CPU to ALLOW_LDTSTOP
of the Northbridge is no longer required.

*150/F_4

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

RS880M-SYSTEM I/F 3/4

Date:

Monday, May 31, 2010

Sheet
1

of

48

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

U16F

PART 6/6

AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10

A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11

A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27

GROUND

+1.1V

+1.1V 2A for RS880M

0.68A

L27

0.68A

+1.1V

L61

*Short_8

L28

*Short_8
C136
4.7U/6.3V_6

C108
.1u/10V_4

C107
.1u/10V_4

C135
4.7U/6.3V_6

C128
.1u/10V_4

C125
.1u/10V_4

*Short_8

C110
.1u/10V_4

+1.1V_VDDHTRX

2A

C132
.1u/10V_4

+1.1V_VDDHTTX
C590
4.7U/6.3V_6

C116
.1u/10V_4

C593
.1u/10V_4

C598
.1u/10V_4

C595
.1u/10V_4

+1.8V 1A for RS780M+SB700

+1.8V

L17
BLM21PG221SN1D(220_2A)_8

0.7A

+1.8V_VDDA18PCIE

C85
4.7U/6.3V_6

+1.8V

R76

C99
4.7U/6.3V_6

*Short_6

C86
.1u/10V_4

C82
.1u/10V_4

25mA

1.1A

U16E
+1.1V_VDDHT

C101
.1u/10V_4

C92
.1u/10V_4

+1.8V_VDDG18_NB

VDD18-RS880 I/O Transform

C90
1U/6.3V_4

VDD18_MEM For UMA RS880 only

Not applicable to RX780
memory I/O transform

J17
K16
L16
M16
P16
R16
T16

VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7

H18
G19
F20
E21
D22
B23
A23

VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7

AE25
AD24
AC23
AB22
AA21
Y20
W 19
V18
U17
T17
R17
P17
M17
J10
P10
K10
M10
L10
W9
H9
T10
R10
Y9
AA9
AB9
AD9
AE9
U10
F9
G9
AE11
AD11

PART 5/6

VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13

POWER

VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15

VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD_MEM1(NC)
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM5(NC)
VDD_MEM6(NC)

VDDG18_1(VDD18_1)
VDDG18_2(VDD18_2)
VDD18_MEM1(NC)
VDD18_MEM2(NC)

VDDG33_1(NC)
VDDG33_2(NC)

RS880/RX881

A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12

+1.1V_VDD_PCIE
C81
.1u/10V_4

C80
.1u/10V_4

C87
1U/6.3V_4

C79
1U/6.3V_4

R65

*Short_8

C84
4.7U/6.3V_6

+1.1V

VDDPCIE - PCIE-E Main power

0.95~1.1V@10A
+NB_CORE
C102
.1u/10V_4

C96
.1u/10V_4

C89
.1u/10V_4

C95
.1u/10V_4

C579
10u/6.3V_8

VDDC - Core Logic power

C106
.1u/10V_4

C313
(Ra)

C97
.1u/10V_4

C94
.1u/10V_4

W/I SP

W/O SP

0.1U

0 ohm

C575
10u/6.3V_8

No need side port

W/O sideport contect to GND

VDD_MEM For UMA RS780 only

Not applicable to RX780
memory I/O transform
+3V_VDDG33
C124
.1u/10V_4

R83

*Short_4

60mA

C121
.1u/10V_4

+3V

3.3V(0.03A)

VDD33 - 3.3V I/O

Not applicable to RX780
W/O side port
-->stuff 0 Ohm
CS00002JB38

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

RS880M-POWER4/4
Date:
5

Monday, May 31, 2010

Sheet
1

of

48

+1.1V_PCIE_VDDR

R315
R37

590/F_4
2K/F_4

AD26
AD27
AC28
AC29
AB29
AB28
AB26
AB27

A_TX0P
A_TX0N
A_TX1P
A_TX1N
A_TX2P
A_TX2N
A_TX3P
A_TX3N

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3

AE24
AE23
AD25
AD24
AC24
AC25
AB25
AB24

A_RX0P
A_RX0N
A_RX1P
A_RX1N
A_RX2P
A_RX2N
A_RX3P
A_RX3N

PCIE_CALRP_SB
PCIE_CALRN_SB

AD29
AD28

PCIE_CALRP
PCIE_CALRN

AA28
AA29
Y29
Y28
Y26
Y27
W 28
W 29

GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N

AA22
Y21
AA25
AA24
W 23
V24
W 24
W 25

GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N

PCIRST#

M23
P23

PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN

CLK_NB_REF_CLKP
CLK_NB_REF_CLKN

U29
U28

NB_DISP_CLKP
NB_DISP_CLKN

[8] CLK_NB_HTREFP_PR
[8] CLK_NB_HTREFN_PR

CLK_NB_HTREFP_PR
CLK_NB_HTREFN_PR

T26
T27

NB_HT_CLKP
NB_HT_CLKN

[2] CLK_CPU_BCLKP_PR
[2] CLK_CPU_BCLKN_PR

CLK_CPU_BCLKP_PR
CLK_CPU_BCLKN_PR

V21
T21

CPU_HT_CLKP
CPU_HT_CLKN

4
2

SLT_GFX_CLKP
3
SLT_GFX_CLKN
1
EV@0_4P2R_4
CLK_PCIE_LOM
CLK_PCIE_LOM#

V23
T23

SLT_GFX_CLKP
SLT_GFX_CLKN

L29
L28

GPP_CLK0P
GPP_CLK0N

[24] CLK_PCIE_LOM
[24] CLK_PCIE_LOM#

CLK_PCIE_WLANP_2
CLK_PCIE_WLANN_2

[26] CLK_PCIE_WLANP_2
[26] CLK_PCIE_WLANN_2

N29
N28

GPP_CLK1P
GPP_CLK1N

M29
M28

GPP_CLK2P
GPP_CLK2N

T25
V25

GPP_CLK3P
GPP_CLK3N

L24
L23

GPP_CLK4P
GPP_CLK4N

P25
M25

GPP_CLK5P
GPP_CLK5N

P29
P28

GPP_CLK6P
GPP_CLK6N

N26
N27

CLK_14M_VGA

T20

C515

25M_X1

25M_X2

LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48

ALLOW _LDTSTP/DMA_ACTIVE#
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#

GPP_CLK8P
GPP_CLK8N

L25

14M_25M_48M_OSC

L27

[14]
[14]
[14]
[14]

A_RST#_SB

A_RST#_AND

4
1

SB_GPIO_PCIE_RST#

C507

GPU
MINI-PCIE
Card reader

*10P/50V_4

AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
AC12
AD12
AJ5
AH6
AB12
AB11
AD7

20mil
T102

+AVBAT

20MIL
BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

D18
+3VRTC

[12]
[12]
[12]
[12]
[12]

R263

10/F_4

25M_X1

25M_X2

+3VRTC_1

R262

499/F_4

VCCRTC_1
BAT54C

20MIL

20MIL
C498
1U/6.3V_4

R267
1K_4

T98

AD23

[14]

AD25
AD26
AD27

[14]
[14]
[14]

AD24
R42

*Short_4

[14]

20MIL

VDDR_1.05_EN

[12]
C

CN6
+BAT

1
2

1
2
RTC_CONN

CR2032 (Non-Chargeable)
AHL03003003
AHL03003014
AHL030M0009

T112
T29
T103
dGPU_VRON [18]
T25
CLKRUN# [34]
T31

AJ6
AG6
AG4
AJ4

dGPU_PWROK [18]

For STRAPS
dGPU_RST_GPIO

H24
H25
J27
J26
H29
H28
G28
J25
AA18
AB19

R281
R290

[15]

22_4
22_4

PCLK_DEBUG [26]
CLK_PCI_775 [34]

LPC_LAD0 [26,34]
LPC_LAD1 [26,34]
LPC_LAD2 [26,34]
LPC_LAD3 [26,34]
LPC_LFRAME# [26,34]

LDRQ0#_SB
LDRQ1#_SB

C509
*5.6p/50V_4

T19
T22
IRQ_SERIRQ

G21
H21
K19
G22
J24

C505
*22P/50V_4

RTC_X1

for EMI suggestion

[34]

R18

ALLOW_LDTSTOP [8]

Y3

*10K/F_4
CPU_PROCHOT#

[2]

CPU_PWRGD [2,37]
CPU_LDT_STOP# [2,8]
CPU_LDT_RST# [2]

RTC_X2

R276
*20M_6

32.768KHZ

32K_X1

C1

RTC_X1

R269

32K_X2

C2

RTC_X2

RTCCLK
INTRUDER_ALERT#
VDDBT_RTC_G

D2
B2
B1

INTRUDER_ALERT#

27p/50V_4

RTC_CLK [34]
+AVBAT

SB800 A12

G1
*SHORT_ PAD1

IC CTRL(528P) SB710 A14(218-0660017)

P/N : AJ066000T01

C504
.1u/10V_4

20M_6

C499
18p/50V_4
R280

*1M_4

C502
18p/50V_4

+AVBAT

INTRUDER_ALERT# Left not connected

(Southbridge has 50-kohm internal
pull-up to VBAT).

PROJECT : ZQA
Quanta Computer Inc.

20mil

Size

Document Number

Rev
1A

SB820-PCIE/PCI/CPU/LPC 1/4
Date:
5

[11]

U13
TC7SH08FU

+3VPCU

C512

R297
1M_4

R287
33_4

[15,24,26] A_RST#
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

V2

25MHz
Y4

T94

LPC_CLK0 [14]
LPC_CLK1 [14]

GPP_CLK7P
GPP_CLK7N

T29
T28

L26

PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4

+3V_S5

27p/50V_4

INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35

CPU

RP1

AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT0#
GNT1#/GPO44
GNT2#/GPO45
GNT3#/CLK_REQ7#/GPIO46
CLKRUN#
LOCK#

RTC

[15] CLK_PCIE_VGAP
[15] CLK_PCIE_VGAN

CLOCK GENERATOR

[8] CLK_NB_REF_CLKP
[8] CLK_NB_REF_CLKN

W2
W1
W3
W4
Y1

CLK_SBLINKP
CLK_SBLINKN

[8] CLK_SBLINKP
[8] CLK_SBLINKN

PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

Part 1 of 5

A_TXP0
A_TXN0
A_TXP1
A_TXN1
A_TXP2
A_TXN2
A_TXP3
A_TXN3

SB800
PCIE_RST#
A_RST#

.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4
.1u/10V_4

P1
L1

PCI INTERFACE

C554
C550
C542
C538
C517
C516
C528
C524

A_RXP0
A_RXN0
A_RXP1
A_RXN1
A_RXP2
A_RXN2
A_RXP3
A_RXN3

PCIE_RST#_SB
A_RST#_SB

33_4

LPC

R296

.1u/10V_4

C508
U14A

PCI CLKS

[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]

+3V_S5

For AMD RST

PLACE CAPS VERY CLOSE TO
BALL OF SB800M

[26,30] PCIE_RST#
[8,34] A_RST#_SB

[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]

180p/50V_4

NB & EC

PCI EXPRESS INTERFACES

C514

Monday, May 31, 2010

Sheet 10
1

of

48

NC only ,Can't be install

11

USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode.

It is output CLK source when INT CLKGEN mode.

+3V_S5
R271

SB_TEST0

*2.2K_4

Clk Gen/ Robson/ TV tuner/ DDR2/ Thermal/ Accelerometer

SIO_RCIN#
LANLINK_STATE#

T92

+3V

[34] SIO_EXT_SMI#
[34] SIO_EXT_SCI#
R49

2.2K_4

PCLK_SMB

R51

2.2K_4

PDAT_SMB

SYS_RST#

T91
[24] PCIE_WAKE#

IR_RX1
SB_THERMTRIP#

T89
T21
[8,14] NB_PWRGD_IN

SB_SMBCLK1
SB_SMBDATA1

SCL2/SDATA2 is 3V/S5 tolerance.

AMD datasheet define it

SB_GPIO59
PCLK_SMB
PDAT_SMB
SB_SMBCLK1
SB_SMBDATA1

[26] CLK_PCIE_2_REQ#

+3V_S5
T93
R23
R22

10K_4
10K_4

SB_SCLK2
SB_SDATA2

[31]
[31]
R31

4.7K_4

OC_7#
OC_6#

+3V
8.2K_4
8.2K_4

OC_4#
SB_JTAG_TDO
SB_JTAG_TCK
SB_JTAG_TDI
SB_JTAG_RST#

T8
T1
T10
T7
T11

Eliot (02/26)
Current Agesa bios doesnt
program ALERT_L and SB
wont process alert.
R54
R56

SB_PM_THERM#

T3

SUS_STAT#

ACZ_BCLK
ACZ_SDOUT
ACZ_SDIN0

ACZ_SDOUT

ACZ_SYNC
ACZ_RST#

+3V_S5

R299
R300

10K_4
10K_4

GBE_COL
GBE_CRS

R33

10K_4

GBE_MDIO

R301

10K_4

GBE_RXERR

R302

10K_4

GBE_PHY_INTR

To Azalia

ACZ_SYNC

R294

33_4

R295

ACZ_BCLK

ACZ_SDOUT_AUDIO
C511

*10P/50V_4

C513

*10P/50V_4

C510

*10P/50V_4

33_4

R291

[28]
T9

ACZ_SYNC_AUDIO

33_4

H9
J8

RSMRST#
CLK_REQ4#/SATA_IS0#/GPIO64
CLK_REQ3#/SATA_IS1#/GPIO63
SMARTVOLT1/SATA_IS2#/GPIO50
CLK_REQ0#/SATA_IS3#/GPIO60
SATA_IS4#/FANOUT3/GPIO55
SATA_IS5#/FANIN3/GPIO59
SPKR/GPIO66
SCL0/GPIO43
SDA0/GPIO47
SCL1/GPIO227
SDA1/GPIO228
CLK_REQ2#/FANIN4/GPIO62
CLK_REQ1#/FANOUT4/GPIO61
IR_LED#/LLB#/GPIO184
SMARTVOLT2/SHUTDOW N#/GPIO51
DDR3_RST#/GEVENT7#
GBE_LED0/GPIO183
GBE_LED1/GEVENT9#
GBE_LED2/GEVENT10#
GBE_STAT0/GEVENT11#
CLK_REQG#/GPIO65/OSCIN
BLINK/USB_OC7#/GEVENT18#
USB_OC6#/IR_TX1/GEVENT6#
USB_OC5#/IR_TX0/GEVENT17#
USB_OC4#/IR_RX0/GEVENT16#
USB_OC3#/AC_PRES/TDO/GEVENT15#
USB_OC2#/TCK/GEVENT14#
USB_OC1#/TDI/GEVENT13#
USB_OC0#/TRST#/GEVENT12#

USB_FDS12P
USB_FSD12N

T13
T17

USB_HSD13P
USB_HSD13N

B12
A12

USB_HSD12P
USB_HSD12N

F11
E11

USBP12+ [31]
USBP12- [31]

USBX3 board

USB_HSD11P
USB_HSD11N

E14
E12

USBP11+ [31]
USBP11- [31]

USBX3 board

USB_HSD10P
USB_HSD10N

J12
J14

USBP10+ [30]
USBP10- [30]

Card reader

USB_HSD9P
USB_HSD9N

A13
B13

USBP9+
USBP9-

[31]
[31]

USB_HSD8P
USB_HSD8N

D13
C13

USBP8+
USBP8-

[31]
[31]

USB_HSD7P
USB_HSD7N

G12
G14

USB_HSD6P
USB_HSD6N

G16
G18

USB_HSD5P
USB_HSD5N

D16
C16

USB_HSD4P
USB_HSD4N

B14
A14

USB_HSD3P
USB_HSD3N

E18
E16

USB_HSD2P
USB_HSD2N

J16
J18

USB_HSD1P
USB_HSD1N

B17
A17

USB_HSD0P
USB_HSD0N

A16
B16

USBP13+
USBP13-

USBP4+
USBP4-

USBP1+
USBP1-

[22]
[22]

CAMERA

BLUETOOTH -1
A04

[26]
[26]

ACZ_BITCLK_AUDIO

[28]

ADP_PRES0

[02/22] AMD FAE and checklist request PL.

[28]

M3
N1
L2
M2
M1
M4
N2
P2
T1
T4
L6
L5
T9
U1
U3
T2
U2
T5
V5
P5
M5
P9
T7
P7
M7
P4
M9
V7

AZ_BITCLK
AZ_SDOUT
AZ_SDIN0/GPIO167
AZ_SDIN1/GPIO168
AZ_SDIN2/GPIO169
AZ_SDIN3/GPIO170
AZ_SYNC
AZ_RST#
GBE_COL
GBE_CRS
GBE_MDCK
GBE_MDIO
GBE_RXCLK
GBE_RXD3
GBE_RXD2
GBE_RXD1
GBE_RXD0
GBE_RXCTL/RXDV
GBE_RXERR
GBE_TXCLK
GBE_TXD3
GBE_TXD2
GBE_TXD1
GBE_TXD0
GBE_TXCTL/TXEN
GBE_PHY_PD
GBE_PHY_RST#
GBE_PHY_INTR

E23
E24
F21
G29

PS2_DAT/SDA4/GPIO187
PS2_CLK/SCL4/GPIO188
SPI_CS2#/GBE_STAT2/GPIO166
FC_RST#/GPO160

D27
F28
F29
E27

PS2KB_DAT/GPIO189
PS2KB_CLK/GPIO190
PS2M_DAT/GPIO191
PS2M_CLK/GPIO192

T6
T2
USBP0+
USBP0-

R298

33_4

ACZ_SDIN0

ACZ_RST#_AUDIO
ACZ_SDIN0

On Board USB Connector

SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
EC_PW M0/EC_TIMER0/GPIO197
EC_PW M1/EC_TIMER1/GPIO198
EC_PW M2/EC_TIMER2/GPIO199
EC_PW M3/EC_TIMER3/GPIO200

D25
F23
B26
E26
F25
E22
F22
E21

KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208

G24
G25
E28
E29
D29
D28
C29
C28

KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226

B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22

Only USB Port0 can be

configured as debug port.

SB_SCLK2
SB_SDATA2
SB_GPIO195
SB_GPIO196
T87

GPIO199 [14]
GPIO200 [14]

Check list
SB_GPIO195

R284

10K_4

SB_GPIO196

R283

10K_4
A

PROJECT : ZQA
Quanta Computer Inc.

[28]
Size

[28]

Document Number

Rev
1A

SB820-ACPI/GPIO/USB 2/4
Date:

[31]
[31]

SB800 A12
ACZ_RST#

BLUETOOTH -2

WLAN Min-Card

HD audio interface is +3VS5 voltage

CLK_PCIE_LAN_REQ#
CLK_PCIE_2_REQ#
[14]

ACZ_SDOUT

H3
D1
E4
D4
E8
F7
E7
F8

USB_FSD0P/GPIO185
USB_FSD0N

EHCI1/ OHCI1

E_SB_OSC

T28
+3V

AD19
AA16
AB21
AC18
AF20
AE19
AF19
AD22
AE22
F5
F4
AH21
AB18
E1
AJ21
H4
D5
D7
G5
K3
AA20

J10
H11

11.8K/F_6

EHCI2/ OHCI2

10K_4
10K_4

SB_GPIO_PCIE_RST#
CLK_PCIE_LAN_REQ#

[10] SB_GPIO_PCIE_RST#
[24] CLK_PCIE_LAN_REQ#
[18] dGPU_PWR_EN
T30
[28]
SPKR
[5,26] PCLK_SMB
[5,26] PDAT_SMB

+3V_S5

R26
R25

G1

[34] ICH_RSMRST#

SCL1/SDATA1 is 3V/S5 tolerance

AMD datasheet define it

USB_FSD1P/GPIO186
USB_FSD1N

T90
R30

EHCI3/ OHCI3

[34] SIO_A20GATE
[34] SIO_RCIN#

USB_RCOMP_SB

USB 1.1 USB MISC

SCL0/SDATA0 is 3V tolerance. AMD datasheet define it

SB800

USB_14_48M

G19

USB 2.0

SB_TEST0
SB_TEST1
SB_TEST2

A10

USB_RCOMP

GPIO

SUSC#

USBCLK/14M_25M_48M_OSC

USB OC

[34]
SUSB#
[34]
SUSC#
[34] DNBSWON#
[14] SB_PWRGD_IN
[8]
SUS_STAT#

SB_TEST2

PCI_PME#/GEVENT4#
RI#/GEVENT22#
SPI_CS3#/GBE_STAT1/GEVENT21#
SLP_S3#
SLP_S5#
PW R_BTN#
PW R_GOOD
SUS_STAT#
Part 4 of 5
TEST0
TEST1/TMS
TEST2
GA20IN/GEVENT0#
KBRST#/GEVENT1#
LPC_PME#/GEVENT3#
LPC_SMI#/GEVENT23#
GEVENT5#
SYS_RESET#/GEVENT19#
W AKE#/GEVENT8#
IR_RX1/GEVENT20#
THRMTRIP#/SMBALERT#/GEVENT2#
NB_PW RGD

EMBEDDED CTRL

*2.2K_4

J2
K1
D3
F1
H1
F2
H5
G6
B3
C4
F6
AD21
AE21
K2
J29
H2
J1
H6
F3
J6
AC19

EMBEDDED CTRL

R28

SB_PCI_PME#

T12

SB_TEST1

HD AUDIO

*2.2K_4

GBE LAN

R32

ACPI / WAKE UP EVENTS

U14D

Monday, May 31, 2010

Sheet 11
1

of

48

Max trace length: 6"

SATA_TX0+_C
SATA_TX0-_C

C565
C564

[27] SATA_TX1+
[27] SATA_TX1-

.01u/16V_4
.01u/16V_4

SATA_TX1+_C
SATA_TX1-_C

[27] SATA_RX1[27] SATA_RX1+

SATA PORT 0,1,2,3 can support AHCI mode

Signal Name

SATA_CALRP

SATA_CALRN

Explanation
SB800 A11: 800 ohm 1% resistor to GND.
SB800 A12: 1K ohm 1% resistor to GND.

SB800 A11: 931 ohm 1% resistor to VDDAN_11_SATA.

SB800 A12: 931 ohm 1% resistor to VDDAN_11_SATA.

E-SATA

AJ8
AH8

SATA_RX0N
SATA_RX0P

AH10
AJ10

SATA_TX1P
SATA_TX1N

AG10
AF10

SATA_RX1N
SATA_RX1P

AG12
AF12

SATA_TX2P
SATA_TX2N

AJ12
AH12

SATA_RX2N
SATA_RX2P

AH14
AJ14

SATA_TX3P
SATA_TX3N

AG14
AF14

SATA_RX3N
SATA_RX3P

AG17
AF17

SATA_TX4P
SATA_TX4N

AJ17
AH17

SATA_RX4N
SATA_RX4P

AJ18
AH18

SATA_TX5P
SATA_TX5N

AH19
AJ19

SATA_RX5N
SATA_RX5P

Part 2 of 5

+1.1V_AVDD_SATA
R39
R40

[32]

1K/F_4
931/F_4

SATA_CALRP
SATA_CALRN

AB14
AA14
AD11

SATA_ACT#
+3V

SATA_ACT#/GPIO67

10K_4

*27p/50V_4

SATA_X1

AD16

SATA_X1

C572

R52

SATA_CALRP
SATA_CALRN

HW MONITOR

SATA_TX0P
SATA_TX0N

*25MHz R322
Y5
*1M_4

PLACE SATA_CAL
RES VERY CLOSE
TO BALL OF SB820

AC16
SATA_X2

AH28
AG28
AF26

FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_W E#/GPIOD148
FC_CE1#/GPIOD149
FC_CE2#/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147

AF28
AG29
AG26
AF27
AE29
AF29
AH27

T101
T121
T127
T100
T99
T111
T119

FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143

AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26

T104
T114
T115
T106
T107
T117
T118
T110
T109
T108
T126
T116
T125
T124
T105
T123

SB_GPIO164
SB_GPIO163
SB_GPIO162
SB_GPIO165
SB_GPIO161

T18
T4
T14
T15
T16

J5
E2
K4
K9
G2

SPI_DI/GPIO164
SPI_DO/GPIO163
SPI_CLK/GPIO162
SPI_CS1#/GPIO165
ROM_RST#/GPIO161

W5
W6
Y9

BT_OFF#

FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58

W7
V9
W8

WWAN_DET#
CPPE_NC1#
CRD_REQ1#

TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM

B6
A6
A5
B5
C7

TEMPIN0
TEMPIN1
MB_THRMDA_SB
SB_GPIO174
TEMP_COMM

VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182

A3
B4
A4
C5
A7
B7
B8
A8

SB_GPIO175
SB_GPIO176
SIDE_PORT_ID0
SIDE_PORT_ID1
MEM_1V5
SB820_GPIO180
SB820_GPIO182

Check list

R275

*10K_4

SIDE_PORT_ID0

R278

*10K_4

R265

*10K_4

SIDE_PORT_ID1

R270

*10K_4

R277

10K_4

TEMPIN1

R274

10K_4

MB_THRMDA_SB

R266

10K_4

SB_GPIO174

R264

10K_4

SB_GPIO175

R279

10K_4

SB_GPIO176

R268

10K_4

R29

*Short_4

BOM check

T88
T5

R311

*SP@10K_4

BOARD_ID0

R312

SP@10K_4

ID0

R316

EV@10K_4

BOARD_ID1

R317

IV@10K_4

ID1

R313

*SP@10K_4

BOARD_ID2

R314

SP@10K_4

ID2

R318

*SP@10K_4

BOARD_ID3

R319

SP@10K_4

ID3

R320

*SP@10K_4

BOARD_ID4

R321

SP@10K_4

ID4

G27
Y2

NC1
NC2

T23
T24
T26

[10]
[10]
[10]
[10]
[10]

+3V_S5

TEMPIN0

T27

+3V

SB800 A12

T113
T122
T120

FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54

*27p/50V_4

SPI ROM

C571

SATA_X2

FC_CLK
FC_FBCLKOUT
FC_FBCLKIN

IF THERE IS NO IDE, TEST POINTS FOR

DEBUG BUS IS MANDATORY

SATA ODD

12

SB800

AH9
AJ9

FLASH

[27] SATA_TX0+
[27] SATA_TX0-

.01u/16V_4
.01u/16V_4

[27] SATA_RX0[27] SATA_RX0+

D

U14B
C567
C566

SERIAL ATA

SATA HDD

DIS UMA

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

BOARD_ID0
BOARD_ID1
BOARD_ID2
BOARD_ID3
BOARD_ID4

+3V

PC36
.1u/10V_4

MEM_1V5

U3
TC7SH08FU

2
4
1

VDDR_OPT [41]

[10] VDDR_1.05_EN

VDDR_1.05_EN:
1 : VDDR =1.05V
0 : VDDR = 0.9V (Default)

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

SB820-SATA/IDE/SPI 3/4
Date:
5

Monday, May 31, 2010

Sheet
1

12

of

48

PLACE ALL THE DECOUPLING CAPS ON

THIS SHEET CLOSE TO SB AS POSSIBLE.

10u/6.3V_8 10u/6.3V_8 1U/6.3V_4 1U/6.3V_4

USB I/O

1
C23

C26

C19

For support USB

wakeup-->3V_S5

1
C501

VDDAN_33_USB_S_1
VDDAN_33_USB_S_2
VDDAN_33_USB_S_3
VDDAN_33_USB_S_4
VDDAN_33_USB_S_5
VDDAN_33_USB_S_6
VDDAN_33_USB_S_7
VDDAN_33_USB_S_8
VDDAN_33_USB_S_9
VDDAN_33_USB_S_10
VDDAN_33_USB_S_11
VDDAN_33_USB_S_12

xx mA

L7
+1.1V_VDDAN_USB
BLM18PG221SN1D(220_1.4A)_6

C11
D11

VDDAN_11_USB_S_1
VDDAN_11_USB_S_2

F26
G26
M8

197mA

1
2

1
2

M21

+3V_VDDPL

47mA

VDDPL_11_SYS_S

L22

+1.1V_VDDPL

62mA

VDDPL_33_USB_S

F19

VDDPL_3.3V_USB

17mA

D6

+3V_HWM_VDDAN

5mA

L20

VDDXL_3.3V

*Short_6

+3V_S5

*Short_6

+1.1V_S5

C21
2.2U/6.3V_6

R27

C31
1U/6.3V_4

C27
1U/6.3V_4

+1.2V_USB_PHY_R

1
SB800 A12

1
2

+VDDIO_AZ

VDDPL_33_SYS

C28
.1u/10V_4

R24

C25
2.2U/6.3V_6

+1.1V_VDDCR_11

A11
B11

VDDAN_33_HW M_S

1
2

1
2
1

113mA

VDDCR_11_USB_S_1
VDDCR_11_USB_S_2

VDDXL_33_S

C24
2.2U/6.3V_6

+3V_VDDIO
C22
*.1u/10V_4

C40
*.1u/10V_4

SB800
VSSIO_SATA_1
VSSIO_SATA_2
VSSIO_SATA_3
VSSIO_SATA_4
VSSIO_SATA_5
VSSIO_SATA_6
VSSIO_SATA_7
VSSIO_SATA_8
VSSIO_SATA_9
VSSIO_SATA_10
VSSIO_SATA_11
VSSIO_SATA_12
VSSIO_SATA_13
VSSIO_SATA_14
VSSIO_SATA_15
VSSIO_SATA_16
VSSIO_SATA_17
VSSIO_SATA_18
VSSIO_SATA_19
VSSIO_USB_1
VSSIO_USB_2
VSSIO_USB_3
VSSIO_USB_4
VSSIO_USB_5
VSSIO_USB_6
VSSIO_USB_7
VSSIO_USB_8
VSSIO_USB_9
VSSIO_USB_10
VSSIO_USB_11
VSSIO_USB_12
VSSIO_USB_13
VSSIO_USB_14
VSSIO_USB_15
VSSIO_USB_16
VSSIO_USB_17
VSSIO_USB_18
VSSIO_USB_19
VSSIO_USB_20
VSSIO_USB_21
VSSIO_USB_22
VSSIO_USB_23
VSSIO_USB_24
VSSIO_USB_25
VSSIO_USB_26
VSSIO_USB_27
VSSIO_USB_28

VSS_1
VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52

GROUND

VDDCR_11_S_1
VDDCR_11_S_2

32mA

A21
D21
B21
K10
L10
J9
T6
T8

VDDIO_33_S_1
VDDIO_33_S_2
VDDIO_33_S_3
VDDIO_33_S_4
VDDIO_33_S_5
VDDIO_33_S_6
VDDIO_33_S_7
VDDIO_33_S_8

M6
P8

A9
B10
K11
B9
D10
D12
D14
D17
E9
F9
F12
F14
F16
C9
G11
F18
D9
H12
H14
H16
H18
J11
J19
K12
K14
K16
K18
H19

SB820 without GBE/ Connected to GND plane.

If the VDDIO_AZ_S power rail

is configured for 1.5V_S5
then AZ_SDIN[3:0] can not be
connected to 3.3-V devices.

+1.1V_S5

VDDIO_GBE_S_1
VDDIO_GBE_S_2

VDDIO_AZ_S

C37
C35
C33
C29
1U/6.3V_4 1U/6.3V_4 10u/6.3V_8 10u/6.3V_8

Y14
Y16
AB16
AC14
AE12
AE14
AF9
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ7
AJ11
AJ13
AJ16

M10

L7
L9

PLL

A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19

658mA

L55
BLM18PG221SN1D(220_1.4A)_6

GBE LAN

C59

800A50T _8 +1.1V

V1

VDDCR_11_GBE_S_1
VDDCR_11_GBE_S_2

CORE S5

C62

1U/6.3V_4 1U/6.3V_4

+3.3V_VDDAN_USB
+3V_S5

VDDAN_11_SATA_1
VDDAN_11_SATA_4
VDDAN_11_SATA_2
VDDAN_11_SATA_3
VDDAN_11_SATA_5
VDDAN_11_SATA_6
VDDAN_11_SATA_7

.1u/10V_4

C60

C65

1
C69

C74

*10u/6.3V_8 10u/6.3V_8 .1u/10V_4

VDDPL_33_SATA

AJ20
AF18
AH20
AG19
AE18
AD18
AE16

C34
.1u/10V_4

U14E

567mA

+1.1V

800A50T _8

AD14

C36
.1u/10V_4

*Short_6 +1.1V

C47
10u/6.3V_8

L8

2.2U/6.3V_6 *.1u/10V_4

+1.1V_AVDD_SATA
L16

C58

C50
1U/6.3V_4

+1.1V_VDDAN_CLK

C63

C43
1U/6.3V_4

93mA

L13
+3V_VDDPL_SATA
BLM18PG221SN1D(220_1.4A)_6

+3V

.1u/10V_4

400 mA

.1u/10V_4

10u/6.3V_8 10u/6.3V_8 1U/6.3V_4 .1u/10V_4

C57

C77

VDDAN_11_PCIE_1
VDDAN_11_PCIE_2
VDDAN_11_PCIE_3
VDDAN_11_PCIE_4
VDDAN_11_PCIE_5
VDDAN_11_PCIE_6
VDDAN_11_PCIE_7
VDDAN_11_PCIE_8

3.3V_S5 I/O

1
C52

C54

C51

C55

800A50T _8

L15

U26
V22
V26
V27
V28
V29
W 22
W 26

600mA

VDDPL_33_PCIE

PCI EXPRESS

C70
*.1u/10V_4

+1.1V_PCIE_VDDR

+1.1V

AE28

SERIAL ATA

43mA

L14
+3V_VDDPLL_33_PCIE
BLM18PG221SN1D(220_1.4A)_6
C72
2.2U/6.3V_6

+3V

VDDIO_33_GBE_S

K28
K29
J28
K26
J21
J20
K21
J22

R35

C45
.1u/10V_4

VDDRF_GBE_S

POWER

13

+1.1V_VDDCR
C48
.1u/10V_4

CORE S0

VDDIO_18_FC_1
VDDIO_18_FC_2
VDDIO_18_FC_3
VDDIO_18_FC_4

VDDAN_11_CLK_1
VDDAN_11_CLK_2
VDDAN_11_CLK_3
VDDAN_11_CLK_4
VDDAN_11_CLK_5
VDDAN_11_CLK_6
VDDAN_11_CLK_7
VDDAN_11_CLK_8

N13
R15
N17
U13
U17
V12
V18
W 12
W 18

R46
*Short_4

AF22
AE25
AF24
AC22

VDDCR_11_1
VDDCR_11_2
VDDCR_11_3
VDDCR_11_4
VDDCR_11_5
VDDCR_11_6
VDDCR_11_7
VDDCR_11_8
VDDCR_11_9

510mA

SB_VDDIO_18_FC

VDDIO_33_PCIGP_1
VDDIO_33_PCIGP_2
VDDIO_33_PCIGP_3
VDDIO_33_PCIGP_4
VDDIO_33_PCIGP_5
VDDIO_33_PCIGP_6
VDDIO_33_PCIGP_7
VDDIO_33_PCIGP_8
VDDIO_33_PCIGP_9
VDDIO_33_PCIGP_10
VDDIO_33_PCIGP_11
VDDIO_33_PCIGP_12

PCI/GPIO I/O

C49
.1u/10V_4

AH1
V6
Y19
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19

CLKGEN I/O

C53
.1u/10V_4

Part 3 of 5

SB800

FLASH I/O

C56
.1u/10V_4

C61
10u/6.3V_8

C66
10u/6.3V_8

+3V_VDDIO_PCIGP

*Short_6

R50

+3V

131mA

VDD-- S/B CORE power

U14C

VDDQ--3.3V I/O power

L10
BLM18PG221SN1D(220_1.4A)_6

+3V_S5

C41
2.2U/6.3V_6

Y4

EFUSE

D8

VSSAN_HW M

M19

VSSXL

P21
P20
M22
M24
M26
P22
P24
P26
T20
T22
T24
V20
J23

VSSIO_PCIECLK_1
VSSIO_PCIECLK_2
VSSIO_PCIECLK_3
VSSIO_PCIECLK_4
VSSIO_PCIECLK_5
VSSIO_PCIECLK_6
VSSIO_PCIECLK_7
VSSIO_PCIECLK_8
VSSIO_PCIECLK_9
VSSIO_PCIECLK_10
VSSIO_PCIECLK_11
VSSIO_PCIECLK_12
VSSIO_PCIECLK_13

VSSPL_SYS

+1.2V_S5

VSSIO_PCIECLK_14
VSSIO_PCIECLK_15
VSSIO_PCIECLK_16
VSSIO_PCIECLK_17
VSSIO_PCIECLK_18
VSSIO_PCIECLK_19
VSSIO_PCIECLK_20
VSSIO_PCIECLK_21
VSSIO_PCIECLK_22
VSSIO_PCIECLK_23
VSSIO_PCIECLK_24
VSSIO_PCIECLK_25
VSSIO_PCIECLK_26
VSSIO_PCIECLK_27

AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W 10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8

M20
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W 21
W 20
AE26
L21
K20

Part 5 of 5
+1.1V_S5

+1.2V_USB_PHY_R

+3V

1
1
C500
10u/6.3V_8

C503
.1u/10V_4

1
C506
.1u/10V_4

C46
2.2U/6.3V_6

+3V_VDDPL

SB800 A12

L12
BLM18PG221SN1D(220_1.4A)_6

L54
*0_6

*Short_6

R34

L53
0_6

+VDDIO_AZ

C42
*.1u/10V_4

+3V_S5

C44
2.2U/6.3V_6

+1.1V_S5
+3V_S5

+3V_HWM_VDDAN

+1.1V_VDDPL

+3V_S5

VDDPL_3.3V_USB
A

*Short_6

1
C38
*.1u/10V_4

C18
2.2U/6.3V_6

L9

L11
BLM18PG221SN1D(220_1.4A)_6

1
C20
*.1u/10V_4

L6
BLM18PG221SN1D(220_1.4A)_6

C39
2.2U/6.3V_6

(0212) AMD FAE confirmed

C32
2.2U/6.3V_6

C30
.1u/10V_4

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

SB820-PWR/DECOUPLING 4/4
Date:
5

Monday, May 31, 2010

Sheet
1

13

of

48

OVERLAP COMMON PADS WHERE

POSSIBLE FOR DUAL-OP RESISTORS.

REQUIRED STRAPS
SB820M is
supported
Gen.1 mode
only.
+3V_S5

14

For internal clock GEN.

+3V

+3V

+3V

+3V

+3V_S5

+3V_S5

+3V_S5

R304
*10K_4

R306
*10K_4

R310
*10K_4

R308
10K_4

R292
10K_4

R303
10K_4

R305
10K_4

R309
10K_4

R307
*10K_4

R289
10K_4

R272
*10K_4

[11]
GPIO199
[11]
GPIO200
[10]
LPC_CLK1
[10]
LPC_CLK0
[10]
PCI_CLK4
[10]
PCI_CLK3
[10]
PCI_CLK2
[10]
PCI_CLK1
[11] ACZ_SDOUT

R273
*10K_4

PULL
HIGH

PULL
LOW

PCI_CLK1

PCI_CLK2

PCI_CLK3

PCI_CLK4

LOW POWER
MODE

ALLOW
PCIE Gen2

Watchdog
Timer Enable

USE
DEBUG
STRAPS

EC
non_Fusion
CLOCK MODE ENABLED

CLKGEN
ENABLED

DEFAULT

DEFAULT

Fusion
EC
CLOCK MODE DISABLED

CLKGEN
DISABLED

PERFORMANCE FORCE
PCIE Gen1
MODE

DEFAULT

Watchdog
Timer Disable

DEFAULT

DEFAULT

IGNORE
DEBUG
STRAPS

DEFAULT

LPC_CLK0

LPC_CLK1

R285
*2.2K_4
2

R286
2.2K_4

R282
10K_4

AZ_SDOUT

R293
*10K_4

GPIO200 GPIO199
C

H, H=Reserved
H, L=SPI ROM

L, H=LPC ROM DEFAULT

L, L=FWH ROM

DEFAULT
internal have
pull Hi 10K

DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
AD23
AD24
AD25
AD26
AD27

NB_PWRGD_IN:
RS880/RX881 = 1.8V;
Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)

R44
*2.2K_4
2

R41
*2.2K_4
2

R36
*2.2K_4
2

R45
*2.2K_4
2

R43
*2.2K_4

[10]
[10]
[10]
[10]
[10]

+3V_S5

R17

10K_4

R19

SB_PWRGD_IN

*Short_4

SB_PWRGD_IN [11]

C16
*2.2u/6.3V_6

NB/SB POWER GOOD CIRCUIT

+1.8V

PCI_AD27

PCI_AD26

PCI_AD25

PCI_AD24

PCI_AD23

USE PCI
PLL

DISABLE ILA
AUTORUN

USE FC
PLL

USE DEFAULT
PCIE STRAPS

DISABLE PCI
MEM BOOT

D2

*BAS316

D3

BAS316

U2
1

[34,37,39] CPU_COREPG

PULL
HIGH

PULL
LOW

DEFAULT

DEFAULT

DEFAULT

DEFAULT

DEFAULT

BYPASS
PCI PLL

ENABLE ILA
AUTORUN

BYPASS FC
PLL

USE EEPROM
PCIE STRAPS

ENABLE PCI
MEM BOOT

[34] PWROK_EC

NC VCC

C17

*.1u/10V_4

A
GND

R20

*33_4

NB_PWRGD_IN [8,11]

*NL17SZ17DFT2G
SOT-353
AL17SZ17000

IC(5P) NL17SZ17DFT2G(SOT-353)

SOT-353

ALUC1G17000

IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5)

SOT23-5

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

SB820-STRAPS
Date:
5

Monday, May 31, 2010

Sheet 14
1

of

48

15

U20A

PEG_TXP[15..0]

[7] PEG_TXP[15..0]

PEG_TXN[15..0]

[7] PEG_TXN[15..0]

PEG_TXP0
PEG_TXN0

AA38
Y37

PCIE_TX0P
PCIE_TX0N

Y33
Y32

PEG_RXP0_C
PEG_RXN0_C

C214
C206

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP0
PEG_RXN0

PEG_TXP1
PEG_TXN1

Y35
W36

PCIE_RX1P
PCIE_RX1N

PCIE_TX1P
PCIE_TX1N

W33
W32

PEG_RXP1_C
PEG_RXN1_C

C219
C216

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP1
PEG_RXN1

PEG_TXP2
PEG_TXN2

W38
V37

PCIE_RX2P
PCIE_RX2N

PCIE_TX2P
PCIE_TX2N

U33
U32

PEG_RXP2_C
PEG_RXN2_C

C227
C220

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP2
PEG_RXN2

PEG_TXP3
PEG_TXN3

V35
U36

PCIE_RX3P
PCIE_RX3N

PCIE_TX3P
PCIE_TX3N

U30
U29

PEG_RXP3_C
PEG_RXN3_C

C229
C243

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP3
PEG_RXN3

PEG_TXP4
PEG_TXN4

U38
T37

PCIE_RX4P
PCIE_RX4N

PCIE_TX4P
PCIE_TX4N

T33
T32

PEG_RXP4_C
PEG_RXN4_C

C258
C246

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP4
PEG_RXN4

PEG_TXP5
PEG_TXN5

T35
R36

PCIE_RX5P
PCIE_RX5N

PCIE_TX5P
PCIE_TX5N

T30
T29

PEG_RXP5_C
PEG_RXN5_C

C264
C272

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP5
PEG_RXN5

PEG_TXP6
PEG_TXN6

R38
P37

PCIE_RX6P
PCIE_RX6N

PCIE_TX6P
PCIE_TX6N

P33
P32

PEG_RXP6_C
PEG_RXN6_C

C274
C286

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP6
PEG_RXN6

PEG_TXP7
PEG_TXN7

P35
N36

PCIE_RX7P
PCIE_RX7N

PCIE_TX7P
PCIE_TX7N

P30
P29

PEG_RXP7_C
PEG_RXN7_C

C289
C295

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP7
PEG_RXN7

PEG_TXP8
PEG_TXN8

N38
M37

PCIE_RX8P
PCIE_RX8N

PCIE_TX8P
PCIE_TX8N

N33
N32

PEG_RXP8_C
PEG_RXN8_C

C297
C309

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP8
PEG_RXN8

PEG_TXP9
PEG_TXN9

M35
L36

PCIE_RX9P
PCIE_RX9N

PCIE_TX9P
PCIE_TX9N

N30
N29

PEG_RXP9_C
PEG_RXN9_C

C321
C310

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP9
PEG_RXN9

PEG_TXP10
PEG_TXN10

L38
K37

PCIE_RX10P
PCIE_RX10N

PCIE_TX10P
PCIE_TX10N

L33
L32

PEG_RXP10_C
PEG_RXN10_C

C323
C333

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP10
PEG_RXN10

PEG_TXP11
PEG_TXN11

K35
J36

PCIE_RX11P
PCIE_RX11N

PCIE_TX11P
PCIE_TX11N

L30
L29

PEG_RXP11_C
PEG_RXN11_C

C334
C341

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP11
PEG_RXN11

PEG_TXP12
PEG_TXN12

J38
H37

PCIE_RX12P
PCIE_RX12N

PCIE_TX12P
PCIE_TX12N

K33
K32

PEG_RXP12_C
PEG_RXN12_C

C347
C342

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP12
PEG_RXN12

PEG_TXP13
PEG_TXN13

H35
G36

PCIE_RX13P
PCIE_RX13N

PCIE_TX13P
PCIE_TX13N

J33
J32

PEG_RXP13_C
PEG_RXN13_C

C353
C348

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP13
PEG_RXN13

PEG_TXP14
PEG_TXN14

G38
F37

PCIE_RX14P
PCIE_RX14N

PCIE_TX14P
PCIE_TX14N

K30
K29

PEG_RXP14_C
PEG_RXN14_C

C358
C369

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP14
PEG_RXN14

PEG_TXP15
PEG_TXN15

F35
E37

PCIE_RX15P
PCIE_RX15N

PCIE_TX15P
PCIE_TX15N

H33
H32

PEG_RXP15_C
PEG_RXN15_C

C354
C357

EV@.1u/10V_4
EV@.1u/10V_4

PEG_RXP15
PEG_RXN15

PEG_RXP[15..0]

[7] PEG_RXP[15..0]

PCIE_RX0P
PCIE_RX0N

PEG_RXN[15..0]

[7] PEG_RXN[15..0]

PCI EXPRESS INTERFACE

+3V_D

R375
EV@10K/F_4
D22

EV@BAS316

D21

EV@BAS316

PCIE_RST_VGA#

A_RST# [10,24,26]

CLOCK
AB35
AA36

PCIE_REFCLKP
PCIE_REFCLKN

EV@10K_4

AJ21
AK21
AH16

NC#1
NC#2
PWRGOOD

PCIE_RST_VGA#

AA30

PERSTB

[10] CLK_PCIE_VGAP
[10] CLK_PCIE_VGAN

For Madison and Park

the PWRGOOD ball must
be conneccted to ground

dGPU_RST_GPIO [10]

CALIBRATION

R98

PCIE_CALRP

Y30

R137

EV@1.27K/F_4

PCIE_CALRN

Y29

R142

EV@2K/F_4

+1V

+1.0V

For Madison and Park PCIE_VDDC is 1.0V

PROJECT : ZQA
Quanta Computer Inc.

EV@Park_M2
Size

Document Number

Rev
1A

Madison/Park-PCIE 1/6
Date:
5

Monday, May 31, 2010

Sheet 15
1

of

48

16

U20B
U20G
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N

MUTI GFX
DPA

TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TXCCM_DPC3N
TX0P_DPC2P
TX0M_DPC2N
DPC

TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TXCDM_DPD3N
TX3P_DPD2P
TX3M_DPD2N

DPD
R89
EV@10K/F_4

R96
EV@10K/F_4

I2C
AK26
AJ26

TX4P_DPD1P
TX4M_DPD1N
TX5P_DPD0P
TX5M_DPD0N

[22] EV_LVDS_BLON

[20] GPU_GPIO11
[20] GPU_GPIO12
[20] GPU_GPIO13
[42]

T55
T57
T136

[20] SIN_GPIO9

3.3V GPIO

IO_VID1
IO_VID0
EV_LVDS_BLON
SOUT_GPIO8
SIN_GPIO9
SCLK_GPIO10

T65

T39

GPU_VID1

GPU_VID3
T67

[20] ALT#_GPIO17
[42]

T37
T45

GPU_VID2

SCS#_GPIO22

T62
[20] SCS#_GPIO22
R108

GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO

EV@10K/F_4
T48
T56
T54
T38

AH20
AH18
AN16
AH23
AJ23
AH17
AJ17
AK17
AJ13
AH15
AJ16
AK16
AL16
AM16
AM14
AM13
AK14
AG30
AN14
AM17
AL13
AJ14
AK13
AN13
AM23
AN23
AK23
AL24
AM24
AJ19
AK19
AJ20
AK20
AJ24
AH26
AH24

EXT_HDMI_HPD AK24

[23] EXT_HDMI_HPD

GPIO_0
GPIO_1
GPIO_2
GPIO_3_SMBDATA
GPIO_4_SMBCLK
GPIO_5_AC_BATT
GPIO_6
GPIO_7_BLON
GPIO_8_ROMSO
GPIO_9_ROMSI
GPIO_10_ROMSCK
GPIO_11
GPIO_12
GPIO_13
GPIO_14_HPD2
GPIO_15_PWRCNTL_0
GPIO_16_SSIN
GPIO_17_THERMAL_INT
GPIO_18_HPD3
GPIO_19_CTF
GPIO_20_PWRCNTL_1
GPIO_21_BB_EN
GPIO_22_ROMCSB
GPIO_23_CLKREQB
JTAG_TRSTB
JTAG_TDI
JTAG_TCK
JTAG_TMS
JTAG_TDO
GENERICA
GENERICB
GENERICC
GENERICD
GENERICE_HPD4
GENERICF
GENERICG

G
GB
B
BB

DAC1

HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
R2
R2B
G2
G2B
B2
B2B
C
Y
COMP

EV@499/F_4

VREFG

AH13

AV31
AU30

TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N

AR32
AT31

TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N

AT33
AU32

TXOUT_U3P
TXOUT_U3N

AU14
AV13

[22]
[22]

AK35
AL36

AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36

LVTMDP

AT15
AR14

TXCLK_LP_DPE3P
TXCLK_LN_DPE3N

AU16
AV15

TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N

AT17
AR16

TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N

AU20
AT19

TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N

AT21
AR20

TXOUT_L3P
TXOUT_L3N

AP34
AR34

EV_TXLCLKOUT+ [22]
EV_TXLCLKOUT- [22]

AW37
AU35

EV_TXLOUT0+ [22]
EV_TXLOUT0- [22]

AR37
AU39

EV_TXLOUT1+ [22]
EV_TXLOUT1- [22]

AP35
AR35

EV_TXLOUT2+ [22]
EV_TXLOUT2- [22]

AN36
AP37

AU22
AV21
AT23
AR22

EV@Park_M2

AD39
AD37

EXT_CRT_RED

AE36
AD35

EXT_CRT_GRN

AF37
AE38

EXT_CRT_BLU

AC36
AC38
AB34

EXT_HSYNC
EXT_VSYNC
R134

EXT_CRT_RED

[20,22]
[20,22]

EV@499/F_4

AD34
AE34

AVDD

AC33
AC34

VDD1DI

[22]

EXT_CRT_GRN

[22]

EXT_CRT_BLU

[22]

+1.8V_GPU

(1.8V@70mA AVDD)
AVDD
EV@.1u/10V_4
C170

AC30
AC31
AD30
AD31

C168
EV@1U/6.3V_4

120 ohm/300mA
L35
EV@SBY100505T-121Y-N/0.3A/120ohm_4
EV@10U/6.3V_6
C167

(1.8V@100mA VDD1DI)
VDD1DI

AF30
AF31

EV@.1u/10V_4
C169
AC32
AD32
AF32

C173
EV@1U/6.3V_4

120 ohm/300mA
L34
EV@SBY100505T-121Y-N/0.3A/120ohm_4

EV@10U/6.3V_6
C166

DAC2
H2SYNC
V2SYNC

HPD1

A2VDD
R94

TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N

EV_LVDS_BRIGHT
EV_LVDS_VDDEN

R
RB

VDD2DI
VSS2DI

+1.8V_GPU

TXCLK_UP_DPF3P
TXCLK_UN_DPF3N

AR30
AT29

EV@10K_4

AK27
AJ27

SCL
SDA
GENERAL PURPOSE I/O

[20] GPU_GPIO0
[20] GPU_GPIO1
[20] GPU_GPIO2
[20] GPIO3_SMBDAT
[20] GPIO4_SMBCLK

EV_TX2_HDMI+ [23]
EV_TX2_HDMI- [23]

VARY_BL
DIGON

R131

For Park-M2 NC
pin
DVPDATA_17 +3V_D
DVPDATA_23

TX4P_DPB1P
TX4M_DPB1N

AT27
AR26

R128

1.8V GPIO

TX3P_DPB2P
TX3M_DPB2N

DPB

EV_TX1_HDMI+ [23]
EV_TX1_HDMI- [23]

EV@150/F_4

T135

1 => +3V_D
2 => +VGPU_CORE
3 => +1V
4 => +1.5V_GPU
5 => +1.8V_GPU
6 => dGPU_PWROK

TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N

AU26
AV25

R9
LVDS CONTROL

R118

[20] RAM_STRAP0
[20] RAM_STRAP1
[20] RAM_STRAP2

DVPCNTL_MVP_0
DVPCNTL_MVP_1
DVPCNTL_0
DVPCNTL_1
DVPCNTL_2
DVPCLK
DVPDATA_0
DVPDATA_1
DVPDATA_2
DVPDATA_3
DVPDATA_4
DVPDATA_5
DVPDATA_6
DVPDATA_7
DVPDATA_8
DVPDATA_9
DVPDATA_10
DVPDATA_11
DVPDATA_12
DVPDATA_13
DVPDATA_14
DVPDATA_15
DVPDATA_16
DVPDATA_17
DVPDATA_18
DVPDATA_19
DVPDATA_20
DVPDATA_21
DVPDATA_22
DVPDATA_23

EV_TX0_HDMI+ [23]
EV_TX0_HDMI- [23]

EV@150/F_4

GPU Power-on sequence

AU8
AP8
AW8
AR3
AR1
AU1
AU3
AW3
AP6
AW5
AU5
AR6
AW6
AU6
AT7
AV7
AN7
AV9
AT9
AR10
AW10
AU10
AP10
AV11
AT11
AR12
AW12
AU12
AP12

EV_TXC_HDMI+ [23]
EV_TXC_HDMI- [23]

AT25
AR24

EV@150/F_4

For Park-M2 NC
pin
AR8
D

TX1P_DPA1P
TX1M_DPA1N

AU24
AV23

A2VDDQ
VREFG
A2VSSQ

R104
C143
EV@249/F_4
EV@.1u/10V_4

R2SET

T69

AD29
AC29
AG31
AG32

V2SYNC
VDD1DI

AG33
AD33

+3V_D

(3.3V@130mA A2VDD)

A2VDDQ
C119
EV@.1u/10V_4

AF33
AA29

[20]

R132

EV@715/F_4

+1.8V(75mA)

+1.8V_GPU

120 ohm/300mA
L25
EV@SBY100505T-121Y-N/0.3A/120ohm_4

DPLL_PVDD

DDC/AUX
PLL/CLOCK

C126

C130

C134

DPLL_PVDD

AM32
AN32

EV@10U/6.3V_6
EV@1U/6.3V_4
EV@.1u/10V_4
DPLL_VDDC
C145
120 ohm/300mA
L24
EV@SBY100505T-121Y-N/0.3A/120ohm_4
C129

DPLL_VDDC

Y1
R97
EV@27MHZEV@1M_4

C133

EV@10U/6.3V_6
EV@1U/6.3V_4
EV@.1u/10V_4

C146

+1.8V(5mA)

+1.8V_GPU

C151

EV@10U/6.3V_6

EV@.1u/10V_4

DDC2CLK
DDC2DATA

XTALIN
XTALOUT

AUX2P
AUX2N
DDCCLK_AUX3P
DDCDATA_AUX3N

TS_VDD

AF29
AG29

GPU_D+
GPU_DT137
TS_VDD

C150

AV33
AU34

DPLL_VDDC

EV@27p/50V_4
[20]
[20]

120 ohm/300mA
L31
EV@SBY100505T-121Y-N/0.3A/120ohm_4

XTALI_27M
XTALO_27M

AUX1P
AUX1N

C123

+1.0V(125mA)

+1V

AN31

EV@27p/50V_4

DDC1CLK
DDC1DATA

DPLL_PVDD
DPLL_PVSS

AK32
AJ32
AJ33

DPLUS
DMINUS

THERMAL

DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N

TS_FDO
TSVDD
TSVSS

DDC6CLK
DDC6DATA
NC_DDCCLK_AUX7P
NC_DDCDATA_AUX7N

AM26
AN26
AM27
AL27
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29

EV_HDMI_DDCCK
EV_HDMI_DDCDAT

HDMI
+1.8V_GPU

(1.8V@2mA A2VDDQ)

T41
T42

A2VDDQ

120 ohm/300mA
L67
EV@SBY100505T-121Y-N/0.3A/120ohm_4

EV@1U/6.3V_4
C613
C614
EV@.1u/10V_4

T51
T50
T46
T52
T53
T40

AN21
AM21

EV_LVDS_DDCCLK
EV_LVDS_DDCDAT

AJ30
AJ31
AK30
AK29

[23]
[23]

T47
T43

EV_CRTDCLK
EV_CRTDDAT

[22]
[22]

[22]
[22]

LVDS
CRT

T61
T44

PROJECT : ZQA
Quanta Computer Inc.

EV@Park_M2
Size

Document Number

Rev
1A

Madison/Park-HOST 2/6
Date:
5

Monday, May 31, 2010

1

Sheet 16

of

48

17
VMB_DQ[63..0]

R161
R150
R123

*EV@240/F_4
L27
EV@240/F_4
N12
*EV@240/F_4 AG12

R157
R154
R107

EV@240/F_4
M12
*EV@240/F_4 M27
*EV@240/F_4 AH12

CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1

MVREFDA
MVREFSA

CKEA0
CKEA1

MEM_CALRN0
MEM_CALRN1
MEM_CALRN2

WEA0B
WEA1B

MEM_CALRP1
MEM_CALRP0
MEM_CALRP2

MAA0_8
MAA1_8

VMB_MA[13..0]

A32
C32
D23
E22
C14
A14
E10
D9
C34
D29
D25
E20
E16
E12
J10
D7
A34
E30
E26
C20
C16
C12
J11
F8
J21
G19
H27
G27
J14
H14
K23
K19
K20
K17
+1.5V_GPU
K24
K27
M13
K16

R170
EV@40.2/F_4

K21
J20

MVREFDB
MVREFSB

K26
L15
H23
J19

C349

EV@.1u/10V_4

+3V_D

R129
R126

EV@10K_4 TESTEN

R100

R163
EV@40.2/F_4

WCKB0_0/DQMB_0
WCKB0B_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0B_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1B_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1B_1/DQMB_7
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7

DDBIB0_0/QSB_0B/WDQSB_0
DDBIB0_1/QSB_1B/WDQSB_1
DDBIB0_2/QSB_2B/WDQSB_2
DDBIB0_3/QSB_3B/WDQSB_3
DDBIB1_0/QSB_4B/WDQSB_4
DDBIB1_1/QSB_5B/WDQSB_5
DDBIB1_2/QSB_6B/WDQSB_6
DDBIB1_3/QSB_7B/WDQSB_7
ADBIB0/ODTB0
ADBIB1/ODTB1
CLKB0
CLKB0B
CLKB1
CLKB1B
RASB0B
RASB1B
CASB0B
CASB1B
CSB0B_0
CSB0B_1
CSB1B_0
CSB1B_1
CKEB0
CKEB1

MVREFDB
MVREFSB

AD28

TESTEN
CLKTESTA
CLKTESTB

MAB0_8
MAB1_8

DRAM_RST

P8
T9
P9
N7
N8
N9
U9
U8
Y9
W9
AC8
AC9
AA7
AA8
Y8
AA9

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_BA2
VMB_BA0
VMB_BA1

H3
H1
T3
T5
AE4
AF5
AK6
AK5

VMB_DM0
VMB_DM1
VMB_DM2
VMB_DM3
VMB_DM4
VMB_DM5
VMB_DM6
VMB_DM7

F6
K3
P3
V5
AB5
AH1
AJ9
AM5

VMB_RDQS0
VMB_RDQS1
VMB_RDQS2
VMB_RDQS3
VMB_RDQS4
VMB_RDQS5
VMB_RDQS6
VMB_RDQS7

QSB[7..0]

G7
K1
P1
W4
AC4
AH3
AJ8
AM3

VMB_WDQS0
VMB_WDQS1
VMB_WDQS2
VMB_WDQS3
VMB_WDQS4
VMB_WDQS5
VMB_WDQS6
VMB_WDQS7

QSB#[7..0]

VMB_BA2 [21]
VMB_BA0 [21]
VMB_BA1 [21]

T7
W7

VMB_ODT0 [21]
VMB_ODT1 [21]

L9
L8

VMB_CLKP0
VMB_CLKN0

AD8
AD7

VMB_CLKP1
VMB_CLKN1

T10
Y10

VMB_RAS0#
VMB_RAS1#

W10
AA10

VMB_CAS0#
VMB_CAS1#

P10
L10

VMB_CS0#

AD10
AC10

VMB_CS1#

U10
AA11

VMB_CKE0
VMB_CKE1

N10
AB11

VMB_WE0#
VMB_WE1#

T8
W8

VMB_MA13

AH11

R85

VMB_CLKP0
VMB_CLKN0

[21]
[21]

VMB_CLKP1 [21]
VMB_CLKN1 [21]
VMB_RAS0#
VMB_RAS1#

[21]
[21]

VMB_CAS0#
VMB_CAS1#

[21]
[21]

VMB_CS0#

[21]

VMB_CS1#

[21]

VMB_CKE0
VMB_CKE1

[21]
[21]

VMB_WE0#
VMB_WE1#

[21]
[21]

R151

*EV@4.7K_4

EV@51_4

+1.5V_GPU

MEM_RST# [21]
B

R90

RSVD

EV@Park_M2

MAB0_0/MAB_0
MAB0_1/MAB_1
MAB0_2/MAB_2
MAB0_3/MAB_3
MAB0_4/MAB_4
MAB0_5/MAB_5
MAB0_6/MAB_6
MAB0_7/MAB_7
MAB1_0/MAB_8
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
MAB1_5/BA2
MAB1_6/BA0
MAB1_7/BA1

WEB0B
WEB1B

AK10
AL10
+1.5V_GPU

AL31

Y12
AA12

DDR2
GDDR5/GDDR3
DDR3

DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63

*EV@10K_4

+1.5V_GPU
TP1

C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5

R168
EV@40.2/F_4

*EV@0_4

EV@100/F_4

+1.5V_GPU

L18
L20

CLKA0
CLKA0B

VMB_DQ0
VMB_DQ1
VMB_DQ2
VMB_DQ3
VMB_DQ4
VMB_DQ5
VMB_DQ6
VMB_DQ7
VMB_DQ8
VMB_DQ9
VMB_DQ10
VMB_DQ11
VMB_DQ12
VMB_DQ13
VMB_DQ14
VMB_DQ15
VMB_DQ16
VMB_DQ17
VMB_DQ18
VMB_DQ19
VMB_DQ20
VMB_DQ21
VMB_DQ22
VMB_DQ23
VMB_DQ24
VMB_DQ25
VMB_DQ26
VMB_DQ27
VMB_DQ28
VMB_DQ29
VMB_DQ30
VMB_DQ31
VMB_DQ32
VMB_DQ33
VMB_DQ34
VMB_DQ35
VMB_DQ36
VMB_DQ37
VMB_DQ38
VMB_DQ39
VMB_DQ40
VMB_DQ41
VMB_DQ42
VMB_DQ43
VMB_DQ44
VMB_DQ45
VMB_DQ46
VMB_DQ47
VMB_DQ48
VMB_DQ49
VMB_DQ50
VMB_DQ51
VMB_DQ52
VMB_DQ53
VMB_DQ54
VMB_DQ55
VMB_DQ56
VMB_DQ57
VMB_DQ58
VMB_DQ59
VMB_DQ60
VMB_DQ61
VMB_DQ62
VMB_DQ63

*EV@0_4

C312

R162

MVREFDA
MVREFSA

ADBIA0/ODTA0
ADBIA1/ODTA1

[21] VMB_MA[13..0]

EV@.1u/10V_4

R166
EV@40.2/F_4

DDBIA0_0/QSA_0B/WDQSA_0
DDBIA0_1/QSA_1B/WDQSA_1
DDBIA0_2/QSA_2B/WDQSA_2
DDBIA0_3/QSA_3B/WDQSA_3
DDBIA1_0/QSA_4B/WDQSA_4
DDBIA1_1/QSA_5B/WDQSA_5
DDBIA1_2/QSA_6B/WDQSA_6
DDBIA1_3/QSA_7B/WDQSA_7

U20D
DDR2
GDDR3/GDDR5
DDR3

VMB_WDQS[7..0]

[21] VMB_WDQS[7..0]

R171

+1.5V_GPU

WCKA0_0/DQMA_0
WCKA0B_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0B_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1B_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1B_1/DQMA_7
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7

G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17

VMB_DM[7..0]
VMB_RDQS[7..0]

[21] VMB_RDQS[7..0]

EV@100/F_4

MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1

GDDR5

DQA0_0/DQA_0
DQA0_1/DQA_1
DQA0_2/DQA_2
DQA0_3/DQA_3
DQA0_4/DQA_4
DQA0_5/DQA_5
DQA0_6/DQA_6
DQA0_7/DQA_7
DQA0_8/DQA_8
DQA0_9/DQA_9
DQA0_10/DQA_10
DQA0_11/DQA_11
DQA0_12/DQA_12
DQA0_13/DQA_13
DQA0_14/DQA_14
DQA0_15/DQA_15
DQA0_16/DQA_16
DQA0_17/DQA_17
DQA0_18/DQA_18
DQA0_19/DQA_19
DQA0_20/DQA_20
DQA0_21/DQA_21
DQA0_22/DQA_22
DQA0_23/DQA_23
DQA0_24/DQA_24
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63

MEMORY INTERFACE A

C37
C35
A35
E34
G32
D33
F32
E32
D31
F30
C30
A30
F28
C28
A28
E28
D27
F26
C26
A26
F24
C24
A24
E24
C22
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5

DDR2
GDDR5/GDDR3
DDR3

GDDR5

[21] VMB_DM[7..0]

MEMORY INTERFACE B

[21] VMB_DQ[63..0]
U20C
DDR2
GDDR3/GDDR5
DDR3

C137
EV@68p/50V_4

R148

EV@Park_M2

EV@10K_4

C350

EV@.1u/10V_4

stuff

EV@100/F_4

MEM_CALRNP1

R172

MEM_CALRNP0

EV@.1u/10V_4

C314

R158

EV@100/F_4

For PARK

MEM_CALRNP2

DDR3/GDDR3 Memory Stuff Option

Designator

GDDR5

GDDR3

DDR3

1.5V

1.8V/1.5V

1.5V

Ra

40.2R

40.2R

40.2R

Rb

100R

100R

100R

+1.5V_VGA
A

For M97-M2

For Mannhatton

Ra

10K

Rb

0R/Short

680R

Rc

DNI

DNI

Ca

2.2nF

68pF

10K

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

Madison/Park-MEM 3/6
Date:
5

Monday, May 31, 2010

1

Sheet 17

of

48

18

U20F
U20E
MEM I/O
PCIE

C284

C320
C651
C267
C657
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6

C198

C329
C330
C255
C337
C316
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C318

C304
C340
C332
C236
C178
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C275

C338
C319
C313
C336
EV@.1u/10V_4
EV@.1u/10V_4
EV@1U/6.3V_4
EV@.1u/10V_4
EV@.1u/10V_4

VDDC_CT

EV@SBY100505T-121Y-N/0.3A/120ohm_4

AF26
AF27
AG26
AG27

C152

C154
C153
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4

I/O
AF23
AF24
AG23
AG24

+3V_D
C120

C185
C181
C182
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@1U/6.3V_4

C601

C610
EV@.1u/10V_4
EV@1U/6.3V_4

+1.8V_GPU

L68

120 ohm/300mA
(1.8V@40mA PCIE_PVDD)
EV@SBY100505T-121Y-N/0.3A/120ohm_4

T80
T81

M20
M21

T75
T77

V12
U12

120 ohm/300mA
(1.8V@150mA MPV18)
EV@SBY100505T-121Y-N/0.3A/120ohm_4

VDDR4#1
VDDR4#2
VDDR4#3
VDDR4#6

NC_VDDRHA
NC_VSSRHA
NC_VDDRHB
NC_VSSRHB

PLL
PCIE_PVDD

AB37

MPV18

H7
H8

SPV18

AM10

C630
C633
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4
L39

VDDR4#4
VDDR4#5
VDDR4#7
VDDR4#8

AD12
AF11
AF12
AG11

C624

+1.8V_GPU

VDDR3#1
VDDR3#2
VDDR3#3
VDDR3#4

AF13
AF15
AG13
AG15

120 ohm/300mA
VDDR4
L62
EV@SBY100505T-121Y-N/0.3A/120ohm_4

SPV10

PCIE_PVDD
MPV18#1
MPV18#2

SPVSS

C328
C335
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4

+1.8V_GPU

VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
VDDCI#9
VDDCI#10
VDDCI#11
VDDCI#12
VDDCI#13
VDDCI#14
ISOLATED VDDCI#15
CORE I/O VDDCI#16
VDDCI#17
VDDCI#18
VDDCI#19
VDDCI#20
VDDCI#21
VDDCI#22

SPV10

C344

L26

VOLTAGE
SENESE

120 ohm/300mA
(1.8V@75mA SPV18)
EV@SBY100505T-121Y-N/0.3A/120ohm_4
T59
C139
EV@.1u/10V_4
EV@10U/6.3V_6

AF28

FB_VDDC

C138

+1V

T64

AG28

T58

AH29

FB_VDDCI
FB_GND

120 ohm/300mA
(1.0V@120mA SPV10)
L30
EV@SBY100505T-121Y-N/0.3A/120ohm_4
C149
EV@.1u/10V_4
EV@10U/6.3V_6

VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#19
VDDC#20
VDDC#21
VDDC#22
VDDC#23
VDDC#24
VDDC#25
VDDC#26
VDDC#27
VDDC#28
VDDC#29
VDDC#30
VDDC#31
VDDC#32
VDDC#33
VDDC#34
VDDC#35
VDDC#36
VDDC#37
VDDC#38
VDDC#39
VDDC#40
VDDC#41
VDDC#42
VDDC#43
VDDC#44
VDDC#45
VDDC#46
VDDC#47
VDDC#48
VDDC#49
VDDC#50
VDDC#51
VDDC#52
VDDC#53
VDDC#54
VDDC#55
VDDC#56
VDDC#57
VDDC#58

SPV18

AN9
AN10

AA31
AA32
AA33
AA34
V28
W29
W30
Y31
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28

PCIE_VDDR

(1.8V@400mA PCIE_VDDR)

L40

C144

C362

C202
C213
C364
C360
C363
C361
C366
EV@.1u/10V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

+1V

(1.0V@1.1A PCIE_VDDC)

C308

C288
C277
C262
C224
C296
C242
C221
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@10U/6.3V_6
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28

+VGPU_CORE

AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13

C276

C188
C222
C201
C235
C217
C199
C252
C225
C204
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C238
C209
C176
C215
C194
C273
C249
C211
C261
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C268

C218
C192
C280
C203
C205
C266
C234
C191
C195
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C179

C180
C210
C240
C271
C187
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6

C282

C263
C285
C248
C290
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
+VGPU_CORE
+3V
C233
C270
C294
C307
C260
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

R75
2
*EV@0_6
C665

C664
C291
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6

Q5 EV@AO3413

+3V

GPU +3V_D power

+3V

>1mS delay is required between all MXM power rail stable

and MXM_PWREN(enables the module internal power)

+1.8V_GPU

R99
*EV@0_4

Pin AL21 to Ground

for Broadway

PowerXpress control signal for Park only

If not used, can be disconnected.
PX_EN = LOW, turn on
PX_EN = HIGH, turn off
PX_EN is used to turn ON/OFF some
regulators for PowerXpress mode. An
output high 3.3V will turn the regulators
OFF. An output low 0V will turn the
regulators ON. PX_EN outputs low (0V)
by default.
If this signal is unused, it can be NC (not
connected) or connected to ground.

*EV@0_6

R82
R63
EV@0_4

*EV@0_6

R61
*EV@0_4

Q7 EV@AO3413
EV@DTC144EUA
Q4

C83
EV@1U/6.3V_4

Q8
EV@PDTC143TT

1A

PROJECT : ZQA
Quanta Computer Inc.

+3V_D
C127

C131

C122

EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4

Size

Document Number

Madison/Park (PWR/GND)4/6
Date:

2
dGPU_PWREN

Q6
EV@2N7002K
2

+1.5V_GPU
C98
EV@.1u/10V_4

A39
AW1
AW39

D4

VSS_MECH#1
VSS_MECH#2
VSS_MECH#3

*EV@BAS316

R78
EV@10K_4

dGPU_PWREN [42]

D5

[10] dGPU_VRON

EV@BAS316

R69
EV@4.7K_4

dGPU_PWROK [10]

[11] dGPU_PWR_EN

GND
GND#100
GND#101
GND#102
GND#103
GND#104
GND#105
GND#106
GND#107
GND#108
GND#109
GND#110
GND#111
GND#112
GND#113
GND#114
GND#115
GND#116
GND#117
GND#118
GND#119
GND#120
GND#121
GND#122
GND#123
GND#124
GND#125
GND#126
GND#127
GND#128
GND#129
GND#130
GND#131
GND#132
GND#133
GND#134
GND#135
GND#136
GND#137
GND#138
GND#139
GND#140
GND#141
GND#142
GND#143
GND#144
GND#145
GND#146
GND#147
GND#148
GND#149
GND#150
GND#151
GND#153
GND#154
GND#155
GND#156
GND#157
GND#158
GND#159
GND#160
GND#161
GND#163
GND#164
GND#165
GND#166
GND#167
GND#168
GND#169
GND#170
GND#171
GND#172
GND#173
GND#174
GND#175
GND#152
GND#162

A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
AW34
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13

R81

R72
EV@4.7K_4

F15
F17
F19
F21
F23
F25
F27
F29
F31
F33
F7
F9
G2
G6
H9
J2
J27
J6
J8
K14
K7
L11
L17
L2
L22
L24
L6
M17
M22
M24
N16
N18
N2
N21
N23
N26
N6
R15
R17
R2
R20
R22
R24
R27
R6
T11
T13
T16
T18
T21
T23
T26
U15
U17
U2
U20
U22
U24
U27
U6
V11
V16
V18
V21
V23
V26
W2
W6
Y15
Y17
Y20
Y22
Y24
Y27
U13
V13

GND#1
GND#2
GND#3
GND#4
GND#5
GND#6
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#85
GND#86
GND#87
GND#88
GND#89
GND#90
GND#91
GND#92
GND#93
GND#94
GND#95
GND#96
GND#97
GND#98
GND#99

EV@Park_M2

+3V

dGPU_VRON
2ms

C114

R71
EV@10K_4

Change from 100K to 4.7K

dGPU_PWREN

C115

EV@1U/6.3V_4
EV@10U/6.3V_6
EV@.1u/10V_4

+3V
A

1A
+3V_D_EXT

C111

GPU all PWROK

PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
PCIE_VSS#32
PCIE_VSS#33
PCIE_VSS#34
PCIE_VSS#35

C196

EV@Park_M2

GPU power enable

AB39
E39
F34
F39
G33
G34
H31
H34
H39
J31
J34
K31
K34
K39
L31
L34
M34
M39
N31
N34
P31
P34
P39
R34
T31
T34
T39
U31
U34
V34
V39
W31
W34
Y34
Y39

+1.8V_GPU
180 ohm/1.5A
EV@HCB1608KF-181T15/180ohm/1.5A_6

(30A or more)
CORE

VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4

(3.3V@60mA))

+1.8V_GPU

PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12

LEVEL
TRANSLATION

(1.8V@110mA VDD_CT)

L32

PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8

POWER

+1.8V_GPU

VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
VDDR1#18
VDDR1#19
VDDR1#20
VDDR1#21
VDDR1#22
VDDR1#23
VDDR1#24
VDDR1#25
VDDR1#26
VDDR1#27
VDDR1#28
VDDR1#29
VDDR1#30
VDDR1#31
VDDR1#32
VDDR1#33
VDDR1#34

AC7
AD11
AF7
AG10
AJ7
AK8
AL9
G11
G14
G17
G20
G23
G26
G29
H10
J7
J9
K11
K13
K8
L12
L16
L21
L23
L26
L7
M11
N11
P7
R11
U11
U7
Y11
Y7

For DDR3, MVDDQ = 1.5V (1.5A)

+1.5V_GPU

Monday, May 31, 2010

1

Sheet 18

of

Rev
1A
48

19

U20H
DPAB_VDD18
AP20
AP21

DP C/D POWER
DPC_VDD18#1
DPC_VDD18#2

DP A/B POWER

DPAB_VDD18

DPA_VDD18#1
DPA_VDD18#2

AN24
AP24

DPAB_VDD10

DPC_VDD10#1
DPC_VDD10#2

DPA_VDD10#1
DPA_VDD10#2

AP31
AP32

AN17
AP16
AP17
AW14
AW16

DPC_VSSR#1
DPC_VSSR#2
DPC_VSSR#3
DPC_VSSR#4
DPC_VSSR#5

DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5

AN27
AP27
AP28
AW24
AW26

DPB_VDD18#1
DPB_VDD18#2

AP25
AP26

DPB_VDD10#1
DPB_VDD10#2

AN33
AP33

DPAB_VDD18

NOTE : DPD is NA on Park,Robson and Seymour.

DPD_VDD18#1
DPD_VDD18#2

DP mode
(1.8V@300mA DPEF_VDD18)
LVDS mode
(1.8V@440mA DPEF_VDD18)

+1.8V_GPU
L65

R357

EV@150/F_4 DPCD_CALR

DPD_VDD10#1
DPD_VDD10#2

C157
EV@10U/6.3V_6

AN19
AP18
AP19
AW20
AW22

DPD_VSSR#1
DPD_VSSR#2
DPD_VSSR#3
DPD_VSSR#4
DPD_VSSR#5

DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5

AN29
AP29
AP30
AW30
AW32

AW18

DPCD_CALR

DPAB_CALR

AW28

DPEF_VDD18

EV@BLM15BB121SS1

AH34
AJ34
C603
EV@1U/6.3V_4

C602
EV@.1u/10V_4

L63

EV@BLM15BB121SS1
C596
EV@10U/6.3V_6

DP E/F POWER
DPE_VDD18#1
DPE_VDD18#2

R363

DP PLL POWER
DPA_PVDD
DPA_PVSS

AU28
AV27

AL33
AM33

DPE_VDD10#1
DPE_VDD10#2

DPB_PVDD
DPB_PVSS

AV29
AR28

AN34
AP39
AR39
AU37
AW35

DPE_VSSR#1
DPE_VSSR#2
DPE_VSSR#3
DPE_VSSR#4
DPE_VSSR#5

DPC_PVDD
DPC_PVSS

AU18
AV17

DPD_PVDD
DPD_PVSS

AV19
AR18

DPE_PVDD
DPE_PVSS

AM37
AN38

NC_DPF_PVDD
NC_DPF_PVSS

AL38
AM35

AF34
AG34

+1V

(1.0V@220mA DPAB_VDD10)
C160
EV@1U/6.3V_4

L33

EV@BLM15BB121SS1

C155
EV@10U/6.3V_6
C

DPAB_CALR R358

EV@150/F_4

C600
EV@.1u/10V_4

EV@150/F_4 DPEF_CALR

DPF_VDD10#1
DPF_VDD10#2

AF39
AH39
AK39
AL34
AM34

DPF_VSSR#1
DPF_VSSR#2
DPF_VSSR#3
DPF_VSSR#4
DPF_VSSR#5

AM39

DPEF_CALR

DPEF_VDD18

DPF_VDD18#1
DPF_VDD18#2

DPEF_VDD10
AK33
AK34

C599
EV@1U/6.3V_4

DPAB_VDD18

DPEF_VDD18

+1V

EV@BLM15BB121SS1

DPEF_VDD10

DP mode
(1.0V@220mA DPEF_VDD10)
LVDS mode
(1.0V@240mA DPEF_VDD10)

L29
C140
EV@10U/6.3V_6

DPAB_VDD10

C163
EV@.1u/10V_4
C

C148
EV@1U/6.3V_4

DPAB_VDD18

DPAB_VDD10
AP14
AP15

C147
EV@.1u/10V_4

DPAB_VDD10

AP13
AT13

AP22
AP23

+1.8V_GPU

(1.8V@300mA DPAB_VDD18)

EV@Park_M2

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

Madison/Park (DP_PWR/GND)5/6
Date:
5

Monday, May 31, 2010

Sheet 19
1

of

48

Memory Aperture size

PIN STRAPS

[16] GPU_GPIO12

*EV@10K/F_4

R101

*EV@10K/F_4

R93

[16] GPU_GPIO11

[16] GPU_GPIO0
[16] GPU_GPIO1

*EV@10K/F_4

R91

*EV@10K/F_4

R84

*EV@10K/F_4

000

128MB

001

256MB

010

64MB

011

32MB

STRAPS

PIN

[16] GPIO4_SMBCLK

R88

*EV@10K/F_4

R95

*EV@10K/F_4

ROM Table
R92

[16] SCS#_GPIO22

R359

[16,22] EXT_VSYNC
[16] SIN_GPIO9
V2SYNC

EXT_VSYNC

Discription

*EV@10K/F_4

R130

[16,22] EXT_HSYNC

DEFAULT

GPIO0

0 = 50% TX OUTPUT SWING

1 = FULL TX OUTPUT SWING

TX_DEEMPH_EN

GPIO1

PCIE TRANSMITTER DE-EMPHASIS ENABLED

0 = TX DE-EMPHASIS DISABLED
1 = TX DE-EMPHASIS ENABLED
ENABLE EXTERNAL BIOS ROM
0 = DISABLE
1 = ENABLE

GPIO_22_ROMCSB

ROMIDCFG(2:0)

GPIO[13:11]

BIF_GEN2_EN_A

GPIO2

GPIO_8_ROMSO
H2SYNC
GPIO_21_BB_EN

GPIO8
H2SYNC
GPIO21

AUD[1]

HSYNC

AUD[0]

VSYNC

REMARK

SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

NUMONYX M25P10A : 101

000

0 = PCIE DEVICE AS 2.5GT/S CAPABLE

1 = PCIE DEVICE AS 5GT/S CAPABLE

Reserved Only

See ROM table

*EV@10K/F_4

EXT_HSYNC

[16] GPU_GPIO2

DESCRIPTION OF DEFAULT SETTINGS

TX_PWRS_ENB

BIOS_ROM_EN

[16] GPIO3_SMBDAT

[16]

R87

20

CONFIGURATION STRAPS

GPIO[13:11] Size
[16] GPU_GPIO13

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET

+3V_D

EV@10K/F_4

R133

EV@10K/F_4

R86

*EV@10K/F_4

R122

*EV@10K/F_4

0
0
1
1

No Audio

0
1
0
1

Any one by dectec

DP only
Both DP & HDMI

AUD[1:0]
00: NO AUDIO FUNCTION.
01: AUDIO FOR DISPLAYPORT AND HDMI IF
ADAPTER IS DETECTED.
10: AUDIO FOR DISPLAYPORT ONLY.

11

See Audio table

11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.

GPIO_9_ROMSI

0 = VGA controller capacity enable

GPIO9

VIP_DEVICE_STRAP_ENA

V2SYNC

DDR3 Memory Aperture size

Vendor

Hynix

Samsung

DDR3 Memory Aperture size

Vendor P/N

STN B/S P/N

H5TQ1G63BFR-12C

AKD5LZGTW04
(64M*16)

Thermal Sensor

0 = DRIVER would ignore the value sample on VHAD_0 during RESET.

Size

RAM_STRAP2

RAM_STRAP1

RAM_STRAP0

DVPDATA_2

DVPDATA_1

DVPDATA_0

512MB

1GB

2GB

512MB

K4W1G1646E-HC12

AKD5LGGT506
(64M*16)

1GB

K4W2G1646B-HC12

AKD5MGGT500

2GB

+3V_D_EXT

+3V_D_EXT
R105

R109

EV@10K_4

EV@10K_4

C161

EV@.1u/10V_4

+1.8V_GPU

Samsung-1GB

U5
A

[34] MXM_SMCLK12

[34] MXM_SMDATA12

[16] ALT#_GPIO17

[34] VGA_THERM#

SCLK

VCC

SDA

DXP

ALERT#

DXN

OVERT#

GND

[16] RAM_STRAP2

1
2

C156

EV@2.2n/50V_4

GPU_D+

[16]

GPU_D-

[16]

[16] RAM_STRAP1

R354

*SP@10K/F_4

R361

SP@10K/F_4

R352

*SP@10K/F_4

R362

SP@10K/F_4

R353

*SP@10K/F_4

R360

SP@10K/F_4

RAM_STRAP2 SET DDR3 Vendor

RAM_STRAP[1:0] SET SIZE.
PROJECT : ZQA
Quanta Computer Inc.

EV@G780-1P81U(MSOP)

Address ID: 98H

[16] RAM_STRAP0

Size

Document Number

Rev
1A

Medison/Park Strip/Thermal 6/6

Date:

Monday, May 31, 2010

Sheet 20
1

of

48

[17] VMB_RDQS[7..0]
[17] VMB_WDQS[7..0]

VMB_RDQS[7..0]

QSA[7..0]

VMB_WDQS[7..0]

QSA#[7..0]

21

U6

VREFC_VMB1
VREFD_VMB1
VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

[17]
[17]
[17]

VMB_BA0
VMB_BA1
VMB_BA2

[17]
[17]
[17]

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

[17]
[17]
[17]
[17]
[17]

VMB_DM[7..0]

[17] VMB_DM[7..0]

[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]
[17]

CHANNEL B: 512MB DDR3 (64M*16*4pcs)

VMB_DQ[63..0]

[17] VMB_DQ[63..0]

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

U7
M8
H1

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

J7
K7
K9

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

K1
L2
J3
K3
L3

VMB_RDQS0
VMB_RDQS3

F3
C7

VMB_DM0
VMB_DM3

E7
D3

VMB_WDQS0
VMB_WDQS3

G3
B7

MEM_RST#

T2

[17] MEM_RST#

VMB_ZQ1

L8

VREFCA
VREFDQ

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU

RESET
ZQ

NC#J1
NC#L1
NC#J9
NC#L9

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ5
VMB_DQ3
VMB_DQ4
VMB_DQ2
VMB_DQ7
VMB_DQ0
VMB_DQ6
VMB_DQ1

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ24
VMB_DQ31
VMB_DQ25
VMB_DQ29
VMB_DQ26
VMB_DQ30
VMB_DQ28
VMB_DQ27

VREFC_VMB2
VREFD_VMB2

0
3

M8
H1

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

VMB_CLKP0
VMB_CLKN0
VMB_CKE0

J7
K7
K9

+1.5V_GPU
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

R164
EV@240/F_4
J1
L1
J9
L9

U19

U23

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GPU
A1
A8
C1
C9
D2
E9
F1
H2
H9

VMB_ODT0
VMB_CS0#
VMB_RAS0#
VMB_CAS0#
VMB_WE0#

K1
L2
J3
K3
L3

VMB_RDQS1
VMB_RDQS2

F3
C7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMB_DM1
VMB_DM2

E7
D3

VMB_WDQS1
VMB_WDQS2

G3
B7

MEM_RST#

T2

VMB_ZQ2

B1
B9
D1
D8
E2
E8
F9
G1
G9

L8

VREFCA
VREFDQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15
BA0
BA1
BA2

CK
CK
CKE
ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU

RESET
ZQ

R409
EV@240/F_4
J1
L1
J9
L9

100-BALL
SDRAM DDR3
EV@VRAM _DDR3

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

NC#J1
NC#L1
NC#J9
NC#L9

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ9
VMB_DQ13
VMB_DQ11
VMB_DQ12
VMB_DQ10
VMB_DQ14
VMB_DQ8
VMB_DQ15

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ21
VMB_DQ19
VMB_DQ23
VMB_DQ17
VMB_DQ20
VMB_DQ16
VMB_DQ22
VMB_DQ18

VREFC_VMB3
VREFD_VMB3

M8
H1

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

J7
K7
K9

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ63
VMB_DQ57
VMB_DQ60
VMB_DQ58
VMB_DQ62
VMB_DQ59
VMB_DQ61
VMB_DQ56

VREFC_VMB4
VREFD_VMB4

M8
H1

VMB_MA0
VMB_MA1
VMB_MA2
VMB_MA3
VMB_MA4
VMB_MA5
VMB_MA6
VMB_MA7
VMB_MA8
VMB_MA9
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA13

N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
T7
M7

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ34
VMB_DQ37
VMB_DQ33
VMB_DQ36
VMB_DQ32
VMB_DQ39
VMB_DQ35
VMB_DQ38

VMB_BA0
VMB_BA1
VMB_BA2

M2
N8
M3

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

J7
K7
K9

A1
A8
C1
C9
D2
E9
F1
H2
H9

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

K1
L2
J3
K3
L3

VMB_RDQS6
VMB_RDQS5

F3
C7

A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMB_DM6
VMB_DM5

E7
D3

VMB_WDQS6
VMB_WDQS5

G3
B7

MEM_RST#

T2

7
4

VREFCA
VREFDQ

DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC
A13
A14
A15

+1.5V_GPU

E3
F7
F2
F8
H3
H8
G2
H7

VMB_DQ51
VMB_DQ52
VMB_DQ50
VMB_DQ53
VMB_DQ49
VMB_DQ54
VMB_DQ48
VMB_DQ55

D7
C3
C8
C2
A7
A2
B8
A3

VMB_DQ45
VMB_DQ41
VMB_DQ47
VMB_DQ42
VMB_DQ44
VMB_DQ40
VMB_DQ46
VMB_DQ43

6
D

DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7

+1.5V_GPU

+1.5V_GPU
VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9
VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

B2
D9
G7
K2
K8
N1
N9
R1
R9

[17]
[17]
[17]

VMB_CLKP1
VMB_CLKN1
VMB_CKE1

[17]
[17]
[17]
[17]
[17]

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

BA0
BA1
BA2

CK
CK
CKE

B2
D9
G7
K2
K8
N1
N9
R1
R9

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

BA0
BA1
BA2

VDD#B2
VDD#D9
VDD#G7
VDD#K2
VDD#K8
VDD#N1
VDD#N9
VDD#R1
VDD#R9

CK
CK
CKE

+1.5V_GPU

B2
D9
G7
K2
K8
N1
N9
R1
R9
+1.5V_GPU

+1.5V_GPU
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

VMB_ODT1
VMB_CS1#
VMB_RAS1#
VMB_CAS1#
VMB_WE1#

K1
L2
J3
K3
L3

VMB_RDQS7
VMB_RDQS4

F3
C7

VMB_DM7
VMB_DM4

E7
D3

VMB_WDQS7
VMB_WDQS4

G3
B7

MEM_RST#

T2

VMB_ZQ3

B1
B9
D1
D8
E2
E8
F9
G1
G9

L8

ODT
CS
RAS
CAS
WE
DQSL
DQSU
DML
DMU
DQSL
DQSU

RESET
ZQ

R112
EV@240/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9
VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9

VMB_ZQ4

B1
B9
D1
D8
E2
E8
F9
G1
G9

VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

ODT
CS
RAS
CAS
WE

DML
DMU
DQSL
DQSU

RESET
ZQ

R377
EV@240/F_4
J1
L1
J9
L9

NC#J1
NC#L1
NC#J9
NC#L9

Group-B0 VREF

VSS#A9
VSS#B3
VSS#E1
VSS#G8
VSS#J2
VSS#J8
VSS#M1
VSS#M9
VSS#P1
VSS#P9
VSS#T1
VSS#T9
VSSQ#B1
VSSQ#B9
VSSQ#D1
VSSQ#D8
VSSQ#E2
VSSQ#E8
VSSQ#F9
VSSQ#G1
VSSQ#G9

A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9

B1
B9
D1
D8
E2
E8
F9
G1
G9

100-BALL
SDRAM DDR3
EV@VRAM _DDR3

TOP Up

TOP Down

VDDQ#A1
VDDQ#A8
VDDQ#C1
VDDQ#C9
VDDQ#D2
VDDQ#E9
VDDQ#F1
VDDQ#H2
VDDQ#H9

DQSL
DQSU

L8

100-BALL
SDRAM DDR3
EV@VRAM _DDR3

100-BALL
SDRAM DDR3
EV@VRAM _DDR3

BOT Down

VREFCA
VREFDQ

BOT Up

Group-B1 VREF
+1.5V_GPU

+1.5V_GPU

R160
EV@4.99K/F_4

R173
EV@4.99K/F_4

VREFC_VMB1
R156
EV@4.99K/F_4

+1.5V_GPU

C299
EV@.1u/10V_4

R404
EV@4.99K/F_4

VREFD_VMB1
R165

+1.5V_GPU

R412
EV@4.99K/F_4

VREFC_VMB2

C343
EV@.1u/10V_4

R407

EV@4.99K/F_4

+1.5V_GPU

C644
EV@.1u/10V_4

EV@4.99K/F_4

R115
EV@4.99K/F_4

VREFD_VMB2
R411

C660
EV@.1u/10V_4

R114

EV@4.99K/F_4

EV@4.99K/F_4

+1.5V_GPU

R365
EV@4.99K/F_4

VREFC_VMB3

Group-B0 decoupling CAP

MEM_B0 CLK

+1.5V_GPU

C174
EV@.1u/10V_4

R380
EV@4.99K/F_4

VREFD_VMB3
R368

C617
EV@.1u/10V_4

EV@4.99K/F_4

Group-B1 decoupling CAP

+1.5V_GPU

+1.5V_GPU

R110
EV@4.99K/F_4

VREFC_VMB4
R376

VREFD_VMB4

C620
EV@.1u/10V_4

EV@4.99K/F_4

R111

C165
EV@.1u/10V_4

EV@4.99K/F_4

MEM_B1 CLK

+1.5V_GPU
VMB_CLKP1

VMB_CLKP0

VMB_CLKN1
C659

C641
C663
C654
C662
C352
C190
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

VMB_CLKN0
R167

R169
EV@56.2/F_4

C164

C212
C615
C200
C626
C162
C159
C171
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

R373

R371
EV@56.2/F_4

EV@56.2/F_4
+1.5V_GPU

+1.5V_GPU

EV@56.2/F_4
C618
EV@.01u/16V_4

C645
C345
EV@.01u/16V_4

EV@1U/6.3V_4

C186
C368
C355
C311
C647
C359
C197
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

C184
EV@1U/6.3V_4

+1.5V_GPU

C324
EV@10U/6.3V_6

C141
C239
C158
C189
C177
C175
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4

+1.5V_GPU

C370
C636
C638
C649
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6

C142
EV@10U/6.3V_6

PROJECT : ZQA
Quanta Computer Inc.

C298
C631
C257
C632
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
EV@10U/6.3V_6
Size

Document Number

Rev
1A

MEMORY 2 channel B
Date:
5

Monday, May 31, 2010

1

Sheet 21

of

48

OPTION SIGNAL FROM NB to LVDS/CRT for UMA

CRT

30V/ 1A

+5V

F1 2

OPTION SIGNAL FROM NB to CRT for UMA

C640

30V/ 0.5A
CRTVDD5_F

D28
2
B0520WS-7-F

.22u/6.3V_4
CRTVDD5

16

SMD1206P100TF
INT_DDCCLK RP2
INT_DDCDATA

[8] INT_DDCCLK
[8] INT_DDCDATA

INT_CRT_HSYNCRP5
INT_CRT_VSYNC

[8] INT_CRT_HSYNC
[8] INT_CRT_VSYNC
A

INT_CRT_RED
INT_CRT_GRE
INT_CRT_BLU

CRTDCLK
CRTDDAT

3
1

4 IV@0_4P2R_4
2

HSYNC
VSYNC

R125
R121
R117

IV@0_4
IV@0_4
IV@0_4

VGA_RED_SYS

L38

BLM18BA470SN1_6

CRT_R1

VGA_GRN_SYS

L37

BLM18BA470SN1_6

CRT_G1

VGA_BLU_SYS

VGA_RED_SYS
VGA_GRN_SYS
VGA_BLU_SYS

L36
R147

R145
SP@140/F_4

R146

150/F_4

C251

150/F_4

C237

10P/50V_4

BLM18BA470SN1_6
C254

10P/50V_4

CRT_B1

C281

10P/50V_4

C279

10P/50V_4

C293

10P/50V_4

CN9
CRT

6
1
7
2
8
3
9
4
10
5

11

CRT_11

12

DDCDAT_1

13

CRTHSYNC

14

CRTVSYNC

15

DDCCLK_1

T79

10P/50V_4

17

[8] INT_CRT_RED
[8] INT_CRT_GRE
[8] INT_CRT_BLU

3
1

4 IV@0_4P2R_4
2

EV_CRTDDAT
EV_CRTDCLK

[16] EV_CRTDDAT
[16] EV_CRTDCLK

EXT_VSYNC
EXT_HSYNC

[16,20] EXT_VSYNC
[16,20] EXT_HSYNC

RP3

4 EV@0_4P2R_4
2

3
1

RP4

4 EV@0_4P2R_4
2

3
1

CRTDDAT
CRTDCLK

+3V

VSYNC
HSYNC

C250 .22u/6.3V_4 CRT_BYP

7
8

C648
EXT_CRT_RED
EXT_CRT_GRN
EXT_CRT_BLU

[16] EXT_CRT_RED
[16] EXT_CRT_GRN
[16] EXT_CRT_BLU

R124
R120
R116

VGA_RED_SYS
VGA_GRN_SYS
VGA_BLU_SYS

EV@0_4
EV@0_4
EV@0_4

+3V

U21
CRTVDD5

0.1u/10V_4

+3V

VCC_SYNC SYNC_OUT2
SYNC_OUT1
VCC_DDC
BYP
SYNC_IN2
VCC_VIDEO SYNC_IN1

16
14

CRTVSYNC
CRTHSYNC

15
13

VSYNC
HSYNC

VIDEO_1
VIDEO_2
VIDEO_3

DDC_IN1
DDC_IN2

10
11

DDC_OUT1
DDC_OUT2

9
12

R384
2.7K_4

R385
2.7K_4

C635

*.1u/10V_4 CRTVDD5

C193

*10P/50V_4 CRTVSYNC

C223

*10P/50V_4 CRTHSYNC

C183

*10P/50V_4 DDCCLK_1

C646

*10P/50V_4 DDCDAT_1

C245
CRT_R1
CRT_G1
CRT_B1

0.1u/10V_4

3
4
5
6

GND

CRTDCLK
CRTDDAT
DDCCLK_1
DDCDAT_1

R383
R386

2.7K_4
2.7K_4

CRTVDD5

CM2009-02QR

OPTION LCDVCC SIGNAL FROM NB to LVDS for UMA

IV@0_4P2R_4
IV@0_4P2R_4
IV@0_4P2R_4

EV@0_4P2R_4
EV@0_4P2R_4
EV@0_4P2R_4
EV@0_4P2R_4
EV@0_4P2R_4

LCD_EDIDCLK
LCD_EDIDDATA
TXLCLKOUTTXLCLKOUT+
TXLOUT0TXLOUT0+
TXLOUT1TXLOUT1+
TXLOUT2TXLOUT2+

C13
1000P/50V_4

C2

C7

0.1u/10V_4

1000P/50V_4

[16] EV_LVDS_BRIGHT
[34] CONTRAST
[8] INT_DPST_PWM

[11]
[11]

R5

*EV@0_4

R7

EV@0_4

R6

IV@0_4

*10P/50V_4
L1
0_6

*10P/50V_4

C8
1U/6.3V_4

CCD_POWER
C10
*10P/50V_4

C15
*10P/50V_4

[8]

U1

INT_LVDS_DIGON
R3

IV@0_4

R4

EV@0_4 LVDS_VDDEN

CN5

USBP13USBP13+

LVDS_BRIGHT

LCD_VIN

1
+3V
2
LCDVCC_L
3
4
5
6
R10
2.2K_4
LCD_EDIDCLK
7
R11
2.2K_4
LCD_EDIDDATA 8
9
TXLOUT010
TXLOUT0+
11
12
TXLOUT113
TXLOUT1+
14
15
TXLOUT216
TXLOUT2+
17
18
TXLCLKOUT19
TXLCLKOUT+
L3
20
*DLW21HN900SQ2L
21
USBP133 3
22
4 4
USBP13+
2 2
23
1 1
24
25
CCD_POWER
26
27
28
A05
29
BL_ON
30

60mil
40mil

LCD_EDIDDATA
LCD_EDIDCLK
TXLCLKOUT+
TXLCLKOUTTXLOUT0+
TXLOUT0TXLOUT1+
TXLOUT1TXLOUT2+
TXLOUT2-

+3V

4.7u/25V_8

LCDVCC_L
C9

*10P/50V_4
+3V

VIN

C12

0_6

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

[16]

EV_LVDS_VDDEN

OUT

IN

GND

ON/OFF

GND

IN

C5

C1

C6

1U/6.3V_4

*.1u/10V_4

.01u/16V_4

C3
22u/6.3V_8

IC(5P) G5243T11U
100K_4

A46
32

32

33

33

34

34

31

31

Backlight Control(LDS)

+3V

R13

R12

10K_4

10K_4
BL_ON

BL#

[8] INT_LVDS_BLON

Lid Switch (HSR)

LCDVCC

R2

LVDS

[16] EV_LVDS_BLON

+3VPCU

*10P/50V_4

40mil

D1

1 BAS316

LID591#

[34]

2
4
2
4
2
4
2
4
2
4

IV@0_4P2R_4

LCDVCC L2
C4

R16

IV@0_4

R14

EV@0_4 LVDS_BLON

Q1
2N7002K

RP13 1
3
RP18 1
3
RP19 1
3
RP20 1
3
RP21 1
3

IV@0_4P2R_4

+3V

LCD_VIN
C11

2
4
2
4
2
4
2
4
2
4

*0_6
0_6

EC_FPBACK# [34]

Q2
DTC144EUA

EV_LVDS_DDCDAT
EV_LVDS_DDCCLK
EV_TXLCLKOUT+
EV_TXLCLKOUTEV_TXLOUT0+
EV_TXLOUT0EV_TXLOUT1+
EV_TXLOUT1EV_TXLOUT2+
EV_TXLOUT2-

[16] EV_LVDS_DDCDAT
[16] EV_LVDS_DDCCLK
[16] EV_TXLCLKOUT+
[16] EV_TXLCLKOUT[16] EV_TXLOUT0+
[16] EV_TXLOUT0[16] EV_TXLOUT1+
[16] EV_TXLOUT1[16] EV_TXLOUT2+
[16] EV_TXLOUT2-

RP12 1
3
RP14 1
3
RP15 1
3
RP16 1
3
RP17 1
3

L5
L4
C14

INT_EDIDCLK
INT_EDIDDATA
LA_CLK#
LA_CLK
LA_DATAN0
LA_DATAP0
LA_DATAN1
LA_DATAP1
LA_DATAN2
LA_DATAP2

[8] INT_EDIDCLK
[8] INT_EDIDDATA
[8]
LA_CLK#
[8]
LA_CLK
[8]
LA_DATAN0
[8]
LA_DATAP0
[8]
LA_DATAN1
[8]
LA_DATAP1
[8]
LA_DATAN2
[8]
LA_DATAP2

LCD PW(LDS)

VIN

OPTION SIGNAL FROM NB to LVDS for UMA

2
Q3
2N7002K

C495

R15

R251

1U/6.3V_4

LVDS(LDS)

100K_4

*470K/F_4
LID591#

HE1
AH9249NTR-G1
SOT23_123-2_8-1_9

PROJECT : ZQA
Quanta Computer Inc.

PT3661-BB (PLC) : AL003661003

ME268-002 (FCE) : AL000268000
Size

Document Number

Rev
1A

CRT/LVDS/LID
Date:
1

Monday, May 31, 2010

Sheet

22
8

of

48

HDMI SDVO I2C Control

3
1

[8] IV_HDMI_DDC_DATA
[8] IV_HDMI_DDC_CLK

DIS

4
2

UMA use +3V for the detect pin

Dis use +3V_DELAY for the detect pin

HDMI_DDCDATA
HDMI_DDCCLK

R422
EV@10K_4

+3V
D

[16] EXT_HDMI_HPD

R190
10K_4

Q18
EV@2N7002K

R433
*EV@4.7K_4

23

+3V_D

IV@0_4P2R_4
RP6
+5V

+3V

HDMI HPD SENSE (HDM)

Close to HDMI Connector

UMA

HDMI_DDCDATA

2
1

[16] EV_HDMI_DDCDAT

+3V
1

Q20
*EV@2N7002K
R432
EV@0_4

2
R191
IV@10K_4

+3V

HDMI_DET

200K/F_4

R421
200K/F_4

[8] INT_HDMI_HPD

R438
*EV@4.7K_4
1

[16] EV_HDMI_DDCCK

HDMI_DDCCLK

2
Q21
*EV@2N7002K
R437
EV@0_4

HDMI (HDM)

HDMI_HPD_EC# [34]

Q9
IV@2N7002K
1

R423

+5V

HDMI_DET_R

Q19
2N7002K

EMI reserve for HDMI(EMC)

Close to HDMI Connector

Close connector

HDMI PORT (HDM)

TX2_HDMI+
+5V

HDMI_PL_MOS

R440

EV@499/F_4 TX2_HDMI+

R441

EV@499/F_4 TX2_HDMI-

R435

EV@499/F_4 TX1_HDMI+

R212
*100/F_4

CN13

TX2_HDMI-

+5V

+5V

TX2_HDMI+

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19

EV@499/F_4 TX1_HDMI-

R439

EV@499/F_4 TX0_HDMI+

R436

EV@499/F_4 TX0_HDMI-

R431

EV@499/F_4 TXC_HDMI+

R430

EV@499/F_4 TXC_HDMI-

R205
*100/F_4

R434

TX1_HDMI+

Q17
2N7002K
2

D12

TX1_HDMI1

1
R420

R206
*100/F_4

CH501H-40PT
TX0_HDMI+

TX2_HDMITX1_HDMI+
D11
CH501H-40PT TX1_HDMITX0_HDMI+

R428

R426

2K/F_4

2K/F_4

TX0_HDMITXC_HDMI+

TX0_HDMI-

Due to HDMI item7-2 is fail,

Change to CS16492FB13.

100K/F_4

+5V
R200
*100/F_4

UMA RS880M
Stuff 715 ohm CS17152FB17

TXC_HDMI-

DIS Park-M2
Stuff 499 ohm CS14992FB24

[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]

IV_TX2_HDMI+
IV_TX2_HDMIIV_TX1_HDMI+
IV_TX1_HDMIIV_TX0_HDMI+
IV_TX0_HDMIIV_TXC_HDMI+
IV_TXC_HDMI-

[16]
[16]
[16]
[16]
[16]
[16]
[16]
[16]

EV_TX2_HDMI+
EV_TX2_HDMIEV_TX1_HDMI+
EV_TX1_HDMIEV_TX0_HDMI+
EV_TX0_HDMIEV_TXC_HDMI+
EV_TXC_HDMI-

TXC_HDMI-

TXC_HDMI+

4
2
2
4
2
4
2
4

IV@0_4P2R_4
IV@0_4P2R_4
IV@0_4P2R_4
IV@0_4P2R_4

HDMI_DDCCLK
HDMI_DDCDATA
D10
2
RSX101M-30

+5V_HDMI
HDMI_DET

30V/ 1A

for Layout concern

,placement close HDMI conn

RP10 3
1
RP8 1
3
RP9 1
3
RP7 1
3

F2
SMD1206P100TF
+5V_HDMI_F
2
1

20
22

23
21

QJ1119C-NK01-8F
C429
.22u/6.3V_4

Becuase HDMI item7-11 is fail,

Change to BC101M30Z00.

C725
*1000P/50V_4

TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMITXC_HDMI+
TXC_HDMI-

A17
C729
*1000P/50V_4
A

C695
C696
C691
C690
C694
C693
C688
C687

EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4
EV@.1u/10V_4

TX2_HDMI+
TX2_HDMITX1_HDMI+
TX1_HDMITX0_HDMI+
TX0_HDMITXC_HDMI+
TXC_HDMI-

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

HDMI
Date:

SHELL1
D2+SHELL3
D2 Shield
D2D1+
D1 Shield
D1D0+
D0 Shield
D0CK+
CK Shield
CKCE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET
SHELL4
SHELL2

Monday, May 31, 2010

Sheet
1

23

of

48

Giga-LAN BCM57780

24

+3V_S5

U8

15mil
42

+3V_S5

6
15
41

VAUX_12
D

L72

15mil

VAUX_12

C412
C419

BLM18AG601SN1_6

AVDDL
4.7U/6.3V_6
.1u/10V_4

27
33
39

VDDO

BIASVDDH

VDDC
VDDC
VDDC

XTALVDDH

AVDDL
AVDDL
AVDDL

BCM57780
7mm X 7mm

AVDDH
AVDDH

25

BIASVDD
C404

L42
.1u/10V_4

BLM18AG601SN1_6

14

XTALVDD
C393

L71
.1u/10V_4

BLM18AG601SN1_6

30

AVDDH

15mil
C389
C391

BLM18AG601SN1_6
L70

GPHY_PLLVDD
4.7U/6.3V_6
.1u/10V_4

15mil

BLM18AG601SN1_6

C380
C384

PCIE_PLLVDD

4.7U/6.3V_6
.1u/10V_4

24

18
21

GPHY_PLLVDDL

PCIE_RX1+
PCIE_RX1[7] PCIE_TX1+
[7] PCIE_TX1[11] PCIE_WAKE#
[10,15,26] A_RST#
[10] CLK_PCIE_LOM
[10] CLK_PCIE_LOM#

C385
C386

PCIE_RXP1_LAN_R 17
PCIE_RXN1_LAN_R 16
22
23
4
2
20
19

.1u/10V_4
.1u/10V_4

TRD3_N
TRD3_P
TRD2_N
TRD2_P

PCIE_PLLVDDL
TRD1_N
TRD1_P
PCIE_PLLVDDL

LINKLED#
SPD100LED#
SPD1000LED#
TRAFFICLED#
PCIE_TXDP
PCIE_TXDN
PCIE_RXDP
PCIE_RXDN
WAKE#
PERST#
PCIE_REFCLK_P
PCIE_REFCLK_N

MODE

+3V

VMA_PRES
LOW_PWR

1K_4
4.7K_4

40
1

EEDATA

R177

200_4

XTALO
XTALI

13
12

R181

1.24K/F_4

RDAC

26

33p/50V_4

1.2H

Y2
25MHz

LAN_TRD3N
LAN_TRD3P

[25]
[25]

35
34

LAN_TRD2N
LAN_TRD2P

[25]
[25]

31
32

LAN_TRD1N
LAN_TRD1P

[25]
[25]

29
28

LAN_TRD0N
LAN_TRD0P

[25]
[25]

LAN_LINKLED#

LAN_ACTLED#

LAN_ACTLED#

[25]
[25]

44

BCM_EEC

43

BCM_EED

XTALO
XTALI

VAUX_12

SR_VDDP
SR_VDD

L43

11
8
10
9

4.7uH

Don't route under Choke.

+3V_S5
C678

RDAC

4.7U/6.3V_6

C416

C420

.1u/10V_4

.1u/10V_4

C680
10u/6.3V_6

33p/50V_4
+3V_S5
R189

R188

*4.7K_4

CLK_REQ#

NC

0_4 BCM_CLKREQ#
GND

[11] CLK_PCIE_LAN_REQ#

BCM57780

49

C407

LAN_LINKLED#

48
47
46
45

VMAIN_PRSNT
LOW_PWR
SR_LX
SR_VFB

C381

.1u/10V_4

37
38

EECLK
R193
R187

.1u/10V_4

C423

TRD0_N
TRD0_P

[7]
[7]

BLM18AG601SN1_6

C415

36

48-Pin QFN
L41

L46

EEPROM

LAN POWER

+3V_S5

+3V_S5

VAUX_12
C675
C683

4.7U/6.3V_6
.1u/10V_4

20mil
C682

R201
*1K_4

4.7U/6.3V_6

C677

.1u/10V_4

C673

.1u/10V_4

C679

.1u/10V_4

R196
1K_4

BCM_EED
BCM_EEC

U9
5
6
7

R203
1K_4

R198
4
*1K_4

SDA
SCL

A0
A1
A2

1
2
3

WP
GND
*24LC02

VCC

+3V_S5
C431
*.1u/10V_4

EEPROM Strapping
EEPROM Type

EECLK EEDATA

24LC02

Internal

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

GLAN BCM57780
Date:
5

Monday, May 31, 2010

Sheet
1

24

of

48

25

4/27 modify it

TRANSFORMER

U24
[24] LAN_TRD0P
[24] LAN_TRD0N

C372

C395

.1u/10V_4

.1u/10V_4

C408

C414

.1u/10V_4

.1u/10V_4

[24] LAN_TRD1P
[24] LAN_TRD1N
[24] LAN_TRD2P
[24] LAN_TRD2N
[24] LAN_TRD3P
[24] LAN_TRD3N

LAN_TRD0P
LAN_TRD0N

1
2
3

TCT1
TD1+
TD1-

MCT1
MX1+
MX1-

24
23
22

X-TX0P
X-TX0N

LAN_TRD1P
LAN_TRD1N

4
5
6

TCT2
TD2+
TD2-

MCT2
MX2+
MX2-

21
20
19

X-TX1P
X-TX1N

LAN_TRD2P
LAN_TRD2N

7
8
9

TCT3
TD3+
TD3-

MCT3
MX3+
MX3-

18
17
16

X-TX2P
X-TX2N

LAN_TRD3P
LAN_TRD3N

10
11
12

TCT4
TD4+
TD4-

MCT4
MX4+
MX4-

15
14
13

X-TX3P
X-TX3N

TRANSFORMER
R175
75/F_8

R176
75/F_8

R179
75/F_8

R184
75/F_8

4/21 change Part number

DB0Z06LAN00 (follow Z08)

C371
1500p/3KV_18

For EMI

RJ45 Conn
C

LAN_ACTLED#

[24] LAN_ACTLED#
+3V_S5

[24] LAN_LINKLED#
+3V_S5

R413

220_8

R419

220_8

CN10

LAN_ACT_LED_PWR

9
10

X-TX0P
X-TX0N
X-TX1P
X-TX2P
X-TX2N
X-TX1N
X-TX3P
X-TX3N

1
2
3
4
5
6
7
8

LAN_LINKLED#
LAN_LNK_LED_PWR

11
12

YELLOW_N
YELLOW_P
0+
01+
2+
213+
3-

GND2
GND1

14
13

R185
R174

*0_6
*0_6

LAN_TRD0P

C378

*10P/50V_4

LAN_TRD0N

C388

*10P/50V_4

LAN_TRD1P

C399

*10P/50V_4

LAN_TRD1N

C402

*10P/50V_4

LAN_TRD2P

C410

*10P/50V_4

LAN_TRD2N

C413

*10P/50V_4

LAN_TRD3P

C417

*10P/50V_4

LAN_TRD3N

C421

*10P/50V_4

GREEN_N
GREEN_P
RJ45

LAN_ACTLED#
LAN_LINKLED#
D

C666
*0.1u//50V_6

C681

PROJECT : ZQA
Quanta Computer Inc.

*0.1u//50V_6
Size

Document Number

Rev
1A

LAN Transformer and RJ45

Date:
1

Monday, May 31, 2010

7

Sheet 25

of
8

48

Check LED signal. (active high or low)

MINI-CARD WLAN(MPC)

+3V

+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA

26

+WL_VDD
R223

*Short_8

CN16

[10,30] PCIE_RST#
[10] PCLK_DEBUG
+WL_VDD
A

[7]
[7]

PCIE_TXP2
PCIE_TXN2

[7]
[7]

PCIE_RXP2
PCIE_RXN2

[10] CLK_PCIE_WLANP_2
[10] CLK_PCIE_WLANN_2
[11] CLK_PCIE_2_REQ#
+5V_TV-CARD

TV use +5V

R427
R425
T158

*0_6 +5V_TV-CARD_R_A
*0_6 +5V_TV-CARD_R_B
PCIE_WAKE_WL

51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17

Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GND
PETp0
PETn0
GND
GND
PERp0
PERn0
GND
Reserved
Reserved

15
13
11
9
7
5
3
1
53

GND
REFCLK+
REFCLKGND
CLKREQ#
Reserved
Reserved
WAKE#
PAD53

+3.3V
GND
+1.5V
LED_WPAN#
LED_WLAN#
LED_WWAN#
GND
USB_D+
USB_DGND
SMB_DATA
SMB_CLK
+1.5V
GND
+3.3Vaux
PERST#
Reserved
GND

52
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18

Reserved
Reserved
Reserved
Reserved
Reserved
+1.5V
GND
+3.3V
PAD54

16
14
12
10
8
6
4
2
54

+WL_VDD

C465
10u/10V_8

+WL_1.5V
RF_LED#

C464
0.1u/10V_4

C705
*0.1u/10V_4

C697
*0.1u/10V_4

RF_LED# [32,34]
A

USBP4+ [11]
USBP4- [11]
PDAT_SMB [5,11]
PCLK_SMB [5,11]
+WL_1.5V
+WL_VDD

DEBUG_LFRAME#
DEBUG_LAD3
DEBUG_LAD2
DEBUG_LAD1
DEBUG_LAD0

R204
R202
R199
R197
R195

*Short_4
*Short_4
*Short_4
*Short_4
*Short_4

LPC_LFRAME# [10,34]
LPC_LAD3 [10,34]
LPC_LAD2 [10,34]
LPC_LAD1 [10,34]
LPC_LAD0 [10,34]

+1.5V

+WL_1.5V

A_RST# [10,15,24]
RF_EN [34]

R424
C702
*1000P/50V_4

Debug

C699
*0.1u/10V_4

*Short_8

C686
*10u/6.3V_8

+WL_1.5V
+WL_VDD

MINI CARD_A

+5V

500mA, 25mil
R429

*0_6

+5V_TV-CARD
C685

C684

*4.7u/6.3V_6

*.1u/10V_4

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

MINI PCI-E card/TV

Date:
1

Monday, May 31, 2010

Sheet

26
8

of

48

SATA HDD

27

CN14

GND23

23

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

3.3V
3.3V
3.3V
GND
GND
GND
5V
5V
5V
GND
RSVD
GND
12V
12V
12V

8
9
10
11
12
13
14
15
16
17
18
19
20
21
22

GND24

24

SATA_TX0+ [12]
SATA_TX0- [12]
SATA_RX0-_C
SATA_RX0+_C

C463
C461

.01u/16V_4
.01u/16V_4

120mil

SATA_RX0- [12]
SATA_RX0+ [12]

+5V_HDD
C676
10u/6.3V_6

C674
10u/6.3V_6

R414
C672
0.1u/10V_4

*Short_8

+5V

C669
.01u/16V_4

SATA_HDD

SATA ODD
CN8

GND14

14

GND1
RXP
RXN
GND2
TXN
TXP
GND3

1
2
3
4
5
6
7

DP
+5V
+5V
RSVD
GND
GND

8
9
10
11
12
13

GND15

15

SATA_TX1+ [12]
SATA_TX1- [12]
SATA_RX1-_C
SATA_RX1+_C

SATA_DP

R127

C247
C232

.01u/16V_4
.01u/16V_4

SATA_RX1- [12]
SATA_RX1+ [12]

*1K_4
+5V_ODD
C628
10u/6.3V_6

C623
10u/6.3V_6

R400
C621
0.1u/10V_4

*Short_8 +5V

C619
.01u/16V_4

C18534-11305-L

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

SATA-HDD/ODD/HOLE
Date:
1

Monday, May 31, 2010

Sheet
4

27

of

48

HP-R

MUTE(AMP)

SENSEB
R232 5.1K/F_4

+5VA

C493
INSPKR+

ADOGND

R454

C475

A02

*0.47u/10V_6 FRONT-R-1

R229

15
33K/F_4

FRONT-R-2

26

25
AVDD1

28

27
VREF

30

31

32

33

29

MIC1-VREFO

CBP

CBN

CPVEE

AVSS1

DMIC-CLK3/4

MIC2-R

SPDIFO2

MIC2-L

DMIC-CLK1/2

PCBEEP

RESET#

SYNC

R234

INSPKR+

[29]

RIN+

RVO2

INSPKR-

[29]

LVO1

LVO2

SHDN#

*100K_4

R238
MIC1-R

[29]

MIC1-L

[29]

0_4

Modify it 4/26

+3V_S5

MIC

20
1

[34] AMP_MUTE#

MIC2-VREFO

ADOGND

U26
4

EAPD#
18
17

MIC2_INT_R

C468

1u/16V_6

16

MIC2_INT_L

C466

1u/16V_6

MIC2_INTL1_R R227

1K_4

MIC2_INTL1

R240

13

12

36K/F_6
+3V

11

RVO1

R249

*10K_4

*TC7SH08FU

HP_MUTE# [29]

C492
*4.7u/10V_6

*0_4
C

15
14
SENSEA

13

R222

20K/F_4 MIC1_JD

MIC1_JD

[29]

ANALOG

12

11

10

DVDD-IO

SDATA-IN

Sense A

LINE2-L

DVSS2

DVDD1

SPDIFO1

EAPD

Split by DGND

LINE2-R

R239

ADOGND

BYPASS

LIN+

14

T85

19

FRONT-R+2

33K/F_4

5 C484 4.7U/6.3V_6

RIN-

MIC2-VREFO
LINE1-VREFO

BIT-CLK

48

NC

47

EAPD#

LINE2-VREFO

ALC272X<LQFP-48>

SDATA-OUT

46

Split by DGND

HPOUT-R

MIC1-L

DIGITAL

R461
4.7K_4

34

21

45

A01

HPOUT-L

MIC1-L

+5VA

35

JDREF

44

Sense B

MIC1-R

40

AVSS2

FRONT-R+1 R233

ADOGND

22

SURR-R

0.47u/10V_6

16

G1453L

T86

23

43

T84

24

MIC1-R

42

C483

INSPKRLINE1-R
LINE1-L

DVSS1

ANALOG

10u/6.3V_6

SURR-L

41
ADOGND

ADOGND

Place next to pin 38

0.1u/10V_4

AVDD2

DMIC-3/4/GPIO1

20K/F_4

C476

39

R225

ADOGND

ADOGND

C479

38

C477
C469
10u/6.3V_6 0.1u/10V_4

MONO-OUT

DMIC-1/2/GPIO0

+5VA

FRONT-R

37

MONO-OUT

FRONT-L

36

Place next to pin 25

5/10 Add

LIN-

NC

0.47u/10V_6

VSS

FRONT-L

+5VA

VCC

MONO-OUT C472

C481

0.1u/10V_4 10u/6.3V_6

VCC

C480

ADOGND

2.2U/6.3V_62.2U/6.3V_6

THERMALPAD

C482
+

FRONT-L

17

C487

Speaker

C494
4.7U/6.3V_6

ADOGND
U12

5/11 Del FRONT-R

U11

C474

36K/F_6

Place next to pin 27

FRONT-L= (L+R)/2

C473

0.1u/10V_4 0.1u/10V_4
0.1u/10V_4

MIC1-VREFO [29]

HP-L

HPOUT_JD

NC

[29]

[29]

VSS

HP

[29]

10

Codec(ADO)

DIGITAL
1.6Vrms
+3V

PCBEEP
C457

C455

1u/16V_6 BEEP_1

C454

C451

10u/6.3V_6 0.1u/10V_4

100p/50V_4

R209

47K_4

SPKR

[11]

R208
4.7K_4

Place next to pin 1

R442

ACZ_RST#_AUDIO [11]

ACZ_SYNC_AUDIO
ACZ_SDIN0_R R213

C453

22_4

[11]

2
A

OUT

R224
R226
R252
R453
R235
R447
R460
R444
C467
C710

GND
SHDN

SET

R457

*29.4K/F_4

*G923-330T1UF
R456
*10K/F_4
C718

ACZ_SDOUT_AUDIO

[11]

ACZ_BITCLK_AUDIO

[11]

Place next to pin 9

C720

C721

10u/10V_3216

0.1u/10V_4

5/7 update the footprint name

CN4

*0_6
*0_6
*0_6
*0_6
*0_6
*0_6
0_6
0_6
*1000P/50V_4
*1000P/50V_4

1
2

R259
1
2

MIC2_INTL1
C496

*INT_MIC

MIC2-VREFO
2.2K_4

*22P/50V_4
A

5/11 update Mic Partnumber

ADOGND

ADOGND

+
0.1u/10V_4

C719
R250

INT MIC array

UPB201209T-310Y-N/6A/31ohm_8

U27
IN

10u/6.3V_6

*22p/50V_4

+5VA
3

0.1u/10V_4

C452

ANALOG

L75

C456

*100p/50V_4

ACZ_SDIN0 [11]

Power (ADO)
DIGITAL
+5V

*Short_6 +3V

C698

C497 0.1u/10V_4

*0_4

PROJECT : ZQA
Quanta Computer Inc.

Tied at one point only under

the codec or near the codec

10u/10V_3216
ADOGND

ADOGND
Size
ADOGND

cap place close to MIC-connector

C730, C787 close U37 pin3 and L65

5

Document Number

Rev
1A

REALTEK ALC663&888/MDC
Date:
2

Monday, May 31, 2010

1

Sheet

28

of

48

MIC
[28]

MIC1-VREFO

D14

BAS316

D15

BAS316

Internal Speaker
Normal OPEN Jack
R248
4.7K/F_4

R247
4.7K/F_4

PINK
D

[28]
[28]

MIC1-L

C486

4.7U/6.3V_6

MIC1_L2

R236

1K/F_4

MIC1_L3

MIC1-R

C485

4.7U/6.3V_6

MIC1_R2

R237

1K/F_4

MIC1_R3
[28]

MIC1_L

L52
BLM15AG121SS1/0.5A/120ohm_4
L51
BLM15AG121SS1/0.5A/120ohm_4

MIC1_R
MIC1_JD

1 CN20
2
6
3
4

8
5
JAS7331-P30H9-7F

MIC1_JD
C489
470p/50V_4

Max. 100mVrms input for Mic-IN

[28]
[28]

CN19
2 2
1 1

INSPKRINSPKR+

C490
470p/50V_4

MIC1_JD

SPEAKER-CONN
C723
C724
*0.22u/25V_6 *0.22u/25V_6

ADOGND
ADOGND

D29
*VPORT_6

ADOGND
C

HP
[28]

56/F_4
56/F_4

HPL-1
HPR-1

L50
L49

1 CN21
2
6
3
4

BLM15AG121SS1/0.5A/120ohm_4 HPL_SYS
BLM15AG121SS1/0.5A/120ohm_4
HPR_SYS

HP_JD
R241
*1K_4

R246
*1K_4

C488

C491
2.2n/50V_4

7
2

HP-L-2 R245
HP-R-2 R242

[28]

8
5
JAS7331-P30H9-7F

2.2n/50V_4

HP_MUTE#

HP-L

HP-L-2

Q23
*FDV301N
R244

0_6

ADOGND

ADOGND

Normal OPEN Jack

HP_MUTE#

[28]

HP-R

HP-R-2

Q22
*FDV301N
R243

0_6

+5VA

HPOUT_JD

HPOUT_JD [28]

R231

+5VA

10K_4

HP_JD
HP_JD#

2
D16

2N7002K
1

20K/F_4
HP_JD

Q11

R230

Q10

PROJECT : ZQA
Quanta Computer Inc.

ADOGND
ADOGND

2N7002K

*VPORT_6

Size
ADOGND
4

Rev
1A

AMP /AUDIO JACK CONN

Date:

Document Number

Monday, May 31, 2010

Sheet 29
1

of

48

2 IN 1 CARD READER (MMC)

30

SD_WP

CARD READER Controller

SD_CMD
SD_DAT3
SD_DAT2

13

SD-CARD

GND1

VCC_XD

DATA1
DATA0
VSS2
CLK
VDD
VSS1
CMD
DATA3
DATA2

14

SD_CLK

WP/SW
SW COM

4
10
9
8
7
6
5
3
2
1

CD/SW

GND

CN3
SD_DAT1
SD_DAT0

11
12

SD_CD#

VCC_XD

Main

DFHS11FR011

Second

C706

0.1u/10V_4

0.1u/10V_4

+3V_VDD

U25

VDDHM
GND
VDD
XTALSEL
TRIST
NBMD
CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6

0_4

48
47
46
45
44
43
42
41
40
39
38
37

CTRL0, CRTL 1 trace length shorter ,

and surround with GND.

*100K_4

C711 *0.47u/10V_6
+3V

R446

*Short_6

+3V_VDD
C712
4.7u/10V_6
R450 330_4

[11]
[11]

USBP10+
USBP10C709
*5p/50V_4

XI
XO

C708
*5p/50V_4

+1.8V_VDD

1
2
3
4
5
6
7
8
9
10
11
12

GPON7
EXT48IN
RSTN
REXT
VD33P
DP
DM
VS33P
XI
XO
VDD
VDD

CTRL0
DATA5
CTRL2
GPI4
DATA4
DATA3
DATA2
XDWPN
GPI2
XDCEN
EEPDATA
GPI1

AU6437-GBL

36
35
34
33
32
31
30
29
28
27
26
25

4.7u/10V_6

18p/50V_4

R216

*Short_4

SD_DAT0

DATA1

R215

*Short_4

SD_DAT1

DATA2

R220

*Short_4

SD_DAT2

DATA3

R219

*Short_4

SD_DAT3

CTRL0

R217
SD_CLK
BLM15AG121SS1/0.5A/120ohm_4

CTRL1

R214

*Short_4

SD_WP

CTRL2

R218

*Short_4

SD_CMD

CTRL3

R221

*Short_4

SD_CD#

T161
EEPDATA
GPI1

T160
T159

T164

R451
270K_4
*0_4

VCC_XD

C713

DATA0
GPI2

VCC_XD

XI
Y6
12MHz

T162
DATA3
DATA2

EEPCLK
18p/50V_4

CTRL2
GPI4

pin13 output 20mils

C707

C714

CTRL0

13
14
15
16
17
18
19
20
21
22
23
24

close PIN11, 12

crystal trace width needs at least 10 mils.

XTALSEL
CRMD_N
NBMD
CTRL1
CTRL3
DATA1
DATA0

C704

V18
CF_V33
VCC33
AGND5V
V33
VDDHM
GND
VDD
CTRL4
XDCDN
SDWPEN
EEPCLK

R449

5/10 change Card Redaer conn

footpirnt sdcard-sdsn09-08-xa-11p-smt

Close to CNxx pin 14 & pin23

4.7u CAP close to pin23
T163

Clock input selection

'1' for 48MHz input [Default]
'0' for 12MHz input

[10,26] PCIE_RST#

0.1u/10V_4

C708 close PIN48, 47

*Short_4 XTALSEL

R452

DFHS11FR033

C460

T165

+3V_VDD

4.7u/10V_6

C743 close PIN46, 47

+1.8V_VDD

R445

C458

XO

+1.8V_VDD
+3V_VDD

+3V_VDD
C701

C703

4.7u/10V_6

0.1u/10V_4

R443

SD write protect
1:decided by SDWP[Default]
0:letting SD always
write-able

C459
*10P/50V_4

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

AU6433 CardReader
Date:
A

Monday, May 31, 2010

Sheet
E

30

of

48

+5V_S5

EXT. USB(USB)

INT. USB(USB)

+5V_S5

120mil

C462
1u/16V_6

[34]

USBON#

USBON#

L47

*0_6

L48
C470

0_6

2
3

IN1
IN2

4
1

EN#
GND

OUT3
OUT2
OUT1

8
7
6

USBPW

USBPW_L
C471

*10P/50V_4
5

*10P/50V_4

OC_6#

[11]

[11]

G547F2P81U
CN17

DLW21HN900SQ2L/330mA/90ohm
USBP0_L3 3
4 4
USBP0_L+
2 2
1 1
L73
1

USBPW_L

C692

1u/16V_6

CN12
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

1
2
3
4

1
2
3
4

8
7
6
5

8
7
6
5

OC_7#

A14

[11]
[11]

USBP11USBP11+

L45 DLW21HN900SQ2L/330mA/90ohm
USBP11_L3 3
4 4
USBP11_L+
2 2
1 1

[11]
[11]

USBP12USBP12+

L44 DLW21HN900SQ2L/330mA/90ohm
USBP12_L3 3
4 4
USBP12_L+
2 2
1 1

A15

USBON#

USB_MB

A13
USBP0USBP0+

10u/10V_8

+ C700
330u/6.3V_6X5.7

OC#

[11]
[11]

C689

U10

18
17

USB_BTB CONN
C722

RV2
*EGA10402V05AH_4

*EGA10402V05AH_4

RV1

*100p/50V_4

A16

BLUETOOTH V3.0 CONN(BTM)

BLUETOOTH V2.1 CONN(BTM)

A04
3

BT_POWER2

C717
.33u/10V_6

Q25
R462
47K_4

C726
.33u/10V_6

+ C728

30mil

BT_POWER1

3
Q24

R455
47K_4

+3V_S5

+3V_S5

30mil

+ C716

C715

AO3413

C727

2.2U/6.3V_6

1000P/50V_4

AO3413
2.2U/6.3V_6

1000P/50V_4

[34] BT_POWERON#
[34] BT_POWERON#

CN18
CN22
BT_POWER2
[11]
[11]

USBP8+
USBP8-

5
4
3
2
1

BT_POWER1

Need to modify.
[11]
[11]

5
4
3
2
1

USBP9+
USBP9-

7
6

7
6

BT_CONN

BT_CONN

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

USB/BT/TP
Date:
5

Monday, May 31, 2010

Sheet 31
1

of

48

EE RETURN-PATH CAPACITORS(EMC)

LED(UIF)
+3V_S5

VIN

EC2

.01u/50V_6

EC3

.01u/50V_6

EC1

.01u/50V_6

+1.5VSUS

VIN

EC5

.01u/50V_6

EC4

.01u/50V_6

.01u/16V_4

EC15

.01u/16V_4

EC20

+1.5VSUS

EC14

Amber
LED2

.01u/16V_4

[34]

SUSLED#

[34]

PWRLED#

R253

220_4

R254

220_4

2
1

+1.1V

LED_A/B

Blue

+1.8V
+1.1V

EC8

*.01u/16V_4

R256

*1M_4

EC9

*.01u/16V_4

R255

*1M_4

+3VPCU

+3VPCU

Amber
LED3

EC10

+1.8V

*.01u/16V_4
EC7

+1.1V

.01u/16V_4

+3V

[34]

BATLED1#

[34]

BATLED0#

R257

220_4

R258

220_4

2
1
LED_A/B
+3V

+1.1V_S5

EC6

.01u/16V_4

EC22

.01u/16V_4

EC21

*.01u/16V_4

+3V

Amber LED5

A22
+VCORE

R260

[26,34] RF_LED#

LED_Amber

Blue
R261

[12] SATA_ACT#
C

.01u/50V_6

+3V

EC23

.01u/50V_6

+3V

EC24

+5V

1000P/50V_4

+NB_CORE

EC19

.01u/16V_4
LED1

EC13

*.01u/16V_4

EC12

*.01u/16V_4

HOLE7
*HG-C315D118P2
7
6
8
5
9
4

+1.8V

HOLE9
*HG-C315D118P2
7
6
8
5
9
4

CPU
HOLE21
CPU C236D142

HOLE22
CPU C236D142

HOLE17
VGA-c256d161p2

220_4

HOLE2
*HG-C315D110P2
7
6
8
5
9
4

HOLE14
FAN-C315D146
7
6
8
5
9
4
1
2
3

HOLE13
*HG-C315D118P2
7
6
8
5
9
4

HOLE12
*HG-C315D118P2
7
6
8
5
9
4

HOLE19
CPU C236I182D142

HOLE18
CPU C236D142

HOLE16
VGA-c256d161p2
HOLE23
MPCIE-C197D87

HOLE3
*H-C94D94N

HG-C315D118P2
HOLE4
*HG-C315D118P2
7
6
8
5
9
4

HOLE5
*HG-C315D118P2
7
6
8
5
9
4

HOLE15
VGA-C256I161D161

HOLE24
*H-C1417D1417N

HOLE20
VGA-C256I161D161

PROJECT : ZQA
Quanta Computer Inc.

1
2
3

HOLE11
*H-C315D118P2

HOLE10
*HG-C315D118P2
7
6
8
5
9
4

1
2
3

1
2
3

1
2
3

HOLE1
*HG-C315D118P2
7
6
8
5
9
4

1
2
3

1
2
3

1
2
3

R1

For fix HyperTransport

nets across plane
splits

1
2
3

1
2
3

HOLE6
*HG-C315D118P2
7
6
8
5
9
4

HOLE8
*HG-C315D118P2
7
6
8
5
9
4

LED_Bule

D1 Power LED near PW SW

+VGPU_CORE

LED_B-LTST-C191TBKT-5A

+1.8V

*.01u/16V_4

HOLE(OTH)

220_4

LED4
1

1
2
3

+1.5VSUS

EC16

EC11

1
2
3

+5V

+VCORE

220_4

Size

Document Number

Rev
1A

POWER/USB/BT/TP/MDC
Date:
5

Monday, May 31, 2010

Sheet
1

32

of

48

K/B(KBC)

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17
MX7
MX6
MX5
MX4
MX3
MX2
MX1
MX0

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26

CPU FAN(THM)

CN2
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]
[34]

+3VPCU

MX0
MX1
MX2
MX3

RP11
10
9
8
7
6

10K_10P8R
1 MX7
2 MX6
3 MX5
4 MX4
5

+3V
D

R327
10K_4

+5V

R67

*0_8

[34]

FANSIG
C574 .01u/16V_4

30 MIL

U4
C103

2.2U/6.3V_6 2

VO
GND
FON# GND
GND
VSET GND

[2] PM_THERM#
[34]

VIN

CPUFAN#

3
5
6
7
8

CN7

TH_FAN_POWER
C109

C117

22u/6.3V_8

1000P/50V_4

1
2
3

4
5

FAN

G991

27
28

change footpirnt as SA6

4/23

KB

TOUCHPAD BOARD CONN(TPD)

+5V

+5V
SW2
MISAKI_SW_H1.5

50mil
B

+TPVDD +TPVDD
BK1608HS220/1A/22ohm_6

L58

LEFT#

L59
L60

TPDATA
TPCLK

C583
0.1u/10V_4

LZA10-2ACB104MT/100mA_6
LZA10-2ACB104MT/100mA_6

TPDATA_R
TPCLK_R
RIGHT#

C580
*.01u/16V_4

C582

TP/B
1
2
3
4
5
6
7
8
9
10
11
12

C581
*.01u/16V_4
LEFT#

2
4
5
6

D17
2

C588
*.1u/10V_4

*100p/50V_4

*VPORT_6
SW3
MISAKI_SW_H1.5

RIGHT#

1
3

[34]
[34]

R347
10K_4

C478

2
4
5
6

D13

13
14
*100p/50V_4

R346
10K_4

1
3

*VPORT_6

CN1

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

KB/FAN/EE RETURN CAP

Date:
5

Monday, May 31, 2010

Sheet
1

33

of

48

EC(KBC)

L66

BK1608HS220/1A/22ohm_6

+A3VPCU
+3V

30mil
+3VPCU

C592

0.1u/10V_4

4.7u/10V_6

E775AGND

0.03A(30mils)
R364

C594

D25

C625

C629

4.7u/10V_6

0.1u/10V_4

2.2/F_6 +3VPCU_EC

4.7u/10V_6

0.1u/10V_4

*.1u/10V_4

0.1u/10V_4

*.1u/10V_4

0.1u/10V_4

U18

Take care of power side

C586

VDD

C609

102

C622

AVCC

C585

VCC1
VCC2
VCC3
VCC4
VCC5

C612

19
46
76
88
115

BAS316
C584

C589

E775AGND

*.01u/50V_6

SIO_RCIN#

29

[11] SIO_EXT_SCI#
C172
*10P/50V_4

EC_FPBACK#

[22] EC_FPBACK#
T143

NOCIR#

124

USBON#

123

IRQ_SERIRQ

125

[8,10] A_RST#_SB
[31]

USBON#

[10] IRQ_SERIRQ

[11] SIO_EXT_SMI#

SM Bus 1 for BATTERY

SM Bus 2 for CPU THERMAL

[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]
[33]

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

TPCLK
TPDATA

[31] BT_POWERON#
[40,41,44] MAINON

54
55
56
57
58
59
60
61

MY0
MY1
MY2
MY3
MY4
MY5
MY6
MY7
MY8
MY9
MY10
MY11
MY12
MY13
MY14
MY15
MY16
MY17

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

MBCLK
MBDATA
CPU_SMBCLK
CPU_SMBDATA

[35]
MBCLK
[35]
MBDATA
[4] CPU_SMBCLK
[4] CPU_SMBDATA

[33]
[33]

MX0
MX1
MX2
MX3
MX4
MX5
MX6
MX7

TPCLK
TPDATA
T148
T145

70
69
67
68

72
71
1.2V_ON
10
11
12
13
77

[10] RTC_CLK

79

For ZQ2B (6L/ UMA)

Program this pin to GPI.

GPIO94/DA0
GPI95/DA1
GPI96/DA2
GPI97

101
105
106
107

GPIO11/CLKRUN
GPIO85/GA20

D/A

KBRST/GPIO86

GPIO24/LDRQ
GPIO10/LPCPD
LREST
GPIO67/PWUREQ
SERIRQ
GPIO65/SMI

GPIO

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
KBSOUT0/JENK
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KB
KBSOUT4/JEN0
KBSOUT5/TDO
KBSOUT6/RDY
KBSOUT7
KBSOUT8
KBSOUT9/SDP_VIS
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
KBSOUT15/GPIO61/XOR_OUT
GPIO60/KBSOUT16
GPIO57/KBSOUT17
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2

TIMER

GPIO72/IRRX1/SIN2
GPIO70/IRRX2_IRSL0
GPIO71/IRTX/SOUT2
GPIO87/CIRRXM/SIN_CR
GPIO34/CIRRXL
GPIO16/CIRTX
GPO83/SOUT_CR/XORTR
F_SDI
F_SDO
F_CS0
F_SCK

FIU

GPIO00/32KCLKIN

NPCE781

GPIO15/A_PWM
GPIO21/B_PWM
GPIO13/C_PWM
GPIO66/G_PWM

GPIO77/SPI_DI
GPO76/SPI_DO/SHBM
GPIO75/SPI_SCK

SPI

PS/2

GPIO02

GPIO01/TB2
GPIO03
GPIO06/IOX_DOUT
GPIO07
GPIO23/SCL3
GPIO30/CIRTX2
GPIO31/SDA3
GPIO32/D_PWM
GPIO33/H_PWM
GPIO36
GPIO40/F_PWM
GPIO42/TCK
GPIO43/TMS
GPIO44/TDI
GPIO45/E_PWM
GPIO46/CIRRXM/TRST
GPO47/SCL4
GPIO50/TDO
GPIO51
GPIO52/CIRTX2/RDY
GPIO53/SDA4
GPIO81
GPO82/TEST
GPO84/TRIST
GPIO41
GPIO56/TA1
GPIO20/TA2/IOX_DIN
GPIO14/TB1

SMB IR

GPIO37/PSCLK1
GPIO35/PSDAT1
GPIO26/PSCLK2
GPIO27PSDAT2
GPIO25/PSCLK3
GPIO12/PSDAT3

TEMP_MBAT [35]

WL_SW
TPD_TRIP

T131
ICMNT

NB_CORE_ON
R342

*0_4

[35]

T36
VGA_THERM# [20]

POWER_SAVE

T132
T134

TP_SW#

T133

A06
CPUFAN#

[33]

New add for Green Adapter

LPC

ECSCI/GPIO54

GPIO55/CLKOUT/IOX_DIN

L64
BK1608HS220/1A/22ohm_6

VCC_POR

VCORF

[11]

122

AGND

*22_4

97
98
99
100
108
96

.01u/16V_4

VREF

64
95
93
94
119
109
120
65
66
15
16
17
20
21
22
23
24
25
26
27
28
91
110
112
80
31
117
63

D20

BAS316

ACIN

NBSWON#

[35]

LID591# [22]
SUSB# [11]
MXM_SMCLK12 [20]

ACPRN

T139

VRON

T151

MXM_SMDATA12 [20]
BATLED0# [32]
BATLED1# [32]
SUSLED# [32]
AMP_MUTE# [28]
T49
T147
T152
T153
D/C#
[35]
S5_ON [36,38,41,44]
HDMI_HPD_EC# [23]

EC_ODD_EN

DNBSWON# [11]
RF_LED_EN#
DCR_EN

T141
T138
T130

ODDLED

T149

SM BUS PU(KBC)
+3VPCU

SUSON [40]
FANSIG [33]

32
118
62
81
84
83
82

ODD_EJ
SHBM_R
RF_LED#_EC

75
73
74
113
14
114
111

RF_EN

T142

CAPSLED#

T128

SPI_SDI_uR
SPI_SDO_uR_R
SPI_CS0#_uR
SPI_SCK_uR_R

30

ECDB_CLOCK

85
104

R336
R335

2.2K_4
2.2K_4

MXM_SMCLK12
MXM_SMDATA12

R366
R369

EV@2.2K_4
EV@2.2K_4

*0_4

+3VPCU
U17
SPI_SDI_uR R344

T140

R345

R340

22_4

SPI_SDO_uR

R341

22_4

SPI_SCK_uR

VCC_POR#

R339

47K_4

VREF_uR

R351

*Short_4

100K_4

+3VPCU

R343

+3VPCU
+A3VPCU

SM BUS ARRANGEMENT TABLE

SM Bus 1

Battery

SM Bus 2

CPU

SM Bus 3

No Use

RT1
100K/F/NTC_4

t
E775AGND

(02/25)
Per QSMC SMT request, change to
Mitsubishi.
Main: CU4100B0000
Second: CU410000Z07 (MIT)

Near TP on TOP side and only for

AMD platform Palm Rest use.

D19
*VPORT_6

SCK

SPI_CS0#_uR

[37,41] HWPG_2.5V
[36] SYS_HWPG
[38] HWPG_1.1V
[38,41] HWPG-1.8V
[41] HWPG_0.9V

SHBM_R

R338

10K_4

[14,37,39]

C616

0.1u/10V_4

CE
VSS
A25L080M

CPU_COREPG

D7

BAS316

D6

BAS316

D26

*BAS316

D24

BAS316

D23

BAS316

D9

*BAS316

D27

BAS316

D8

*BAS316

HWPG

HWPG

[2]

D27 for VRON enable +Vcore/0.9V

D8 for 1.2V_ON enable +1.1V

PROJECT : ZQA
Quanta Computer Inc.

Disabled ('1') if using FWH device on LPC.

Enabled ('0') if using SPI flash for both system BIOS and EC firmware

WP

Winbond W25X16AVSSIG
AKE38ZP0N01
MXIC
MX25L1605AM2C-15G
AKE37FP0Z13
EON
EN25F16-100HIP
AKE38ZA0Q00
AMIC A25L016
AKE38ZN0800

Size

Document Number

Rev
1A

WPCE775C_0DG & FLASH

Date:

VDD
HOLD

+3V

[40] HWPG_1.5V

SHBM=0: Enable shared memory with host BIOS

2
4
5
6

SPI_SCK_uR

TPD_TRIP

1
3

SI

R393
10K_4

+3V

NBSWON#

SO

HWPG(KBC)

POWER-ON SWITCH (KBC)

SW1
MISAKI_SW_H1.5

10K_4

SPI_SDO_uR

If the Southbridge enables 'Long Wait Abort' by

default, the flash device should be 50MHz (or faster)

[39] HWPG_NB

R348
47K_4

22_4 SPI_SDI_uR_R

T144

E775AGND

+3V_D_EXT

SPI FLASH(KBC)

T150

1U/6.3V_4

POWER-ON SWITCH (KBC)

10K_4
10K_4
*10K_4
10K_4

RF_LED# [26,32]
ICH_RSMRST# [11]
SUSC# [11]
PWROK_EC [14]
RF_EN [26]

C611

PALM REST THERMAL SENSOR (THM)

+3V
R333
R334
R379
R378

CPU_SMBCLK
CPU_SMBDATA
EC_ODD_EN
1.2V_ON

PWRLED# [32]

T129
R337

HWPG
P_SAVE_LED#

86
87
90
92

CONTRAST [22]

NUMLED#

MBCLK
MBDATA

44

121

GPIO90/AD0
GPIO91/AD1
GPIO92/AD2
GPIO93/AD3
GPIO05
GPIO04

VCORF_uR

CLKRUN#

[11] SIO_A20GATE

A/D

103

[10]
R113

CLK_PCI_775

LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK

GND1
GND2
GND3
GND4
GND5
GND6

CLK_PCI_775

3
126
127
128
1
2

5
18
45
78
89
116

[10,26] LPC_LFRAME#
[10,26] LPC_LAD0
[10,26] LPC_LAD1
[10,26] LPC_LAD2
[10,26] LPC_LAD3
[10] CLK_PCI_775

ICMNT
D

C587

Monday, May 31, 2010

1

Sheet

34

of

48

PW_JACK (65W/90W)
dcjk-2dc2003-000111-3p-v
PJ1
1
2

VA1

A03

PD10
SBR1045SP5-13
1

PL1
UPB201212T-121Y-N_8
VA

PQ32
FDD6685
VA2

PQ33
FDD6685

VIN

A08
1

2
PC2
0.1u/50V_6

PR1
220K/F_4

VIN

PR8
0.01_3720

PD9
SMAJ20A

PC3
0.1u/50V_6

PC7
2.2n/50V_4

PR3
33K/F_4

PC1
0.1u/50V_6

PC115
2.2n/50V_4

7
6
5
4

PC116
0.1u/50V_6

PL2
UPB201212T-121Y-N_8

CSIP_1

PD1
SW1010CPT

Modfiy 4/28 andy

ZH9

PR2
220K/F_4

For EMI

D/C#

PR4
10K_4

[34]

PQ1
IMD2AT108

VA

VIN

2
PQ2
DMN601K-7

+
EC17
*22u/25V_1210

CSIP_1

PC117
*100u/25V_6.3*5.8

VIN

PR17
10/F_4

QCI P/N

90W

Blue

DFPJ06MR013

PC18
0.1u/50V_6

27 CSIN

21

PD11
*RB500V-40

11
MBDATA

[34]

ACIN
PR151
49.9/F_6

VDDSMB

24

ISL88731_UGATE

10

SCL

PHASE

23

ISL88731_PHASE

13

ACOK

LGATE

20

ISL88731_LGATE

PGND

19

22

DCIN

88731ACSET

PC6
100p/50V_4

A07

ICOMP

CSON

TEMP_MBAT [34]

NC

TEMP_MBAT

PR7
100K_4

PR40
2.21K/F_4

18 CSOP

PR150
*4.7_6

CSOP_1

17 CSON
16

VBF

15

GND

29

GND

VCOMP

BAT-V

A23

PC120
PC122
2.2n/50V_4 10u/25V_1206

PC133
*680p/50V_6

PC119
10u/25V_1206

CSOP_1

BAT-V

BAT-V

PR37
10/F_4

BAT-V
PR38
100/F_4

12

NC

NC

PR6
100/F_4

14

10 1
2
3
4
5
6
7
9 8

ICM

5
PL4
UPB201212T-121Y-N_8

PL6
6.8uH

PQ37
AO4468

NC

BAT-V

C114F3-108A1-L_Batt_Conn

0.01_3720
PR142

PC29
0.1u/50V_6

MBAT+

VREF

PR32
22K/F_4

PL3
UPB201212T-121Y-N_8

ACIN

CSOP

A03
PQ35
AO4468

PR35
10/F_4
PU4
ISL88731A

PC19
0.1u/50V_6
88731B_1

UGATE

PR29
82.5K/F_4
PC5
0.1u/50V_6

PR22
2.7_6
25 88731B_2

SDA

PC136
0.1u/50V_6
DCIN

VDDP
BOOT

PR43
100K_4
MBCLK

VCC

PC139
0.1u/50V_6

CSSN

NC
GND
GND
GND
GND
CSSP

+3VPCU

+3VPCU

PC13
4.7u/25V_8

PC137
1u/16V_6

ISL88731_VDDP

26

1
33
32
31
30
28 CSIP

PC129
2.2n/50V_4

PR152
4.7_6

5
6
7
8

DFPJ06MR012

3
2
1

Yellow

5
6
7
8

Color

65W

PC135
1u/16V_6

PR18
10/F_4

3
2
1

Item

EC18
*22u/25V_1210

+3VPCU

PJ2
PC4
47p/50V_6

PC8
47p/50V_6

PC35
.01u/50V_6
ICMNT

PR139
100/F_4

A45

PR138
100/F_4
MBCLK

[34]

MBDATA

[34]

PC26
PC31
*1u/16V_6 .01u/50V_6

ISL88731 thermal pad

tie to Pin12
ICMNT

[34]

PC33
*0.01u/50V_6

PU1
CM1293A-04SO

TEMP_MBAT

CH1

VN

CH2

CH4

VP

CH3

MBDATA

PROJECT : ZQA
Quanta Computer Inc.

+3VPCU
MBCLK
Size

Add ESD diode base on EC FAE suggestion

Rev
1A

Charger(ISL88731A)
Date:

Document Number

Monday, May 31, 2010

Sheet
1

35

of

48

MAIND

MAIND

[40,44]

VL
[2,44] SYS_SHDN#
PR174
0_4

Note1

Note1
VIN

VIN

PR178
39K/F_4

PC84
2.2n/50V_4

+
PC175
100u/25V_6.3*5.8

PC85
4.7u/25V_8

PC77
1U/6.3V_4

PC69
0.1u/50V_6

3V5V_EN

PR181
*0_6

PC91
4.7u/25V_8

PC86
2.2n/50V_4

PC88
*4.7u/25V_8

VL
PR180
0_4

OCP:7A

PR175
0_4

PR179
0_4

6.3A

PR177
390K_4

+5VPCU
8
7
6
5

REF

PQ13
AO4710

PR93
0_4

PR192
1/F_6

3
2
1

LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF

PR94
174K/F_4

5
6
7
8

REFIN2

32
31
30
29
28
27
26
25

SKIP
DDPWRGD_R
3V_EN

A43
PR190
*4.7_6

+
PC87
0.1u/50V_6

PC176
330u/6.3V_6X5.7

PC174
*680p/50V_6

3
2
1

BST1
DL1
PVCC
NC
GND
PGND
DL2
BST2

5V_DL

PC173
0.1u/50V_6

PC177
*680p/50V_6

1
2
3

PC99
0.1u/50V_6

REFIN2
ILIM2
OUT2
SKIP#
PGOOD2
EN2
DH2
LX2

PU14
RT8206B

PL13
2.2uH

3V_LX

PC171
0.1u/50V_6
PR191
1/F_6

17
18
19
20
21
22
23
24

PR193
*4.7_6

PC185
330u/6.3V_6X5.7
PC102
*4.7u/25V_8

8
7
6
5

A44

PR183
*0_4

PR95
143K/F_4

BYP
OUT1
FB1
ILIM1
PGOOD1
EN1
DH1
LX1
PAD
PAD
PAD
PAD
PAD

1
2
3

5V_LX

9
10
11
12
DDPWRGD_R 13
5V_EN 14
15
16
37
36

35
34
33

A21

PQ12
AO4468

8
7
6
5
4
3
2
1

PR176
150K_4

5V_DH

PQ14
AO4468
PL14
2.2uH/8A

Note1

3V_DH 4

PC76
0.1u/50V_6

A12

+3VPCU

A42
8206_ONLDO

Note1

5.7A

PC74
4.7u/10V_6

5
6
7
8

3V_EN

5V_EN

PC75
1u/16V_6

OCP:8A

PR182
*0_4

PQ11
AO4710

PR186
0_4

PR185
*0_4

+3VPCU_OUT
PR184
*0_4

3V_DL

PR187
*0_4
VL

+5VPCU_FB

2
PD8
CHN217

OCP:6.3A
L(ripple current)
=(9-5)*5/(2.2u*0.4M*9)
=2.525A
Iocp=6.3-(2.525/2)=5.04A
Vth=5.04A*14.2mOhm=71.53mV
R(Ilim)=(71.53mV*10)/5uA=143K
Ipeak(choke)=10.487A

OCP:7A

PR99
0_6

+15V_ALWP

+15V
PR100
22_8

PC92
0.1u/50V_6

+15V

+5V_S5

PR133
22_8

PR125
22_8

+5VPCU

PR114
1M_6

+5VPCU

+3VPCU

PQ55
AO4468

PQ20
AO4468

PQ28
AO3404

PQ21
DMN601K-7

1.13A

3
2
1

PQ22
DMN601K-7

3
2
1

3
2
1

+3V_S5

PQ29
DMN601K-7

PR123
1M_6

PQ30
DTC144EU

[34,38,41,44]

PQ56
AO4468

2
2

SYS_HWPG [34]
PR173
*Short_6

MAIND 4

MAIND

S5_ON

DDPWRGD_R

+3VPCU

S5D
S5D

A41

L(ripple current)
=(9-3.3)*3.3/(2.2u*0.5M*9)
=1.9A
Iocp=7-(1.9/2)=6.05A
Vth=6.05A*14.2mOhm=8591mV
R(Ilim)=(85.91mV*10)/5uA=171.8K
Ipeak(choke)=8.679A

PR121
1M_6

5
6
7
8

+3V_S5

PC89
0.1u/50V_6

2
PD7
CHN217

5
6
7
8

VIN

PR107
*Short_6

5
6
7
8

SKIP
PC90
0.1u/50V_6

PC93
0.1u/50V_6

PR97 A40
*Short_6

PC172
1u/16V_6

PROJECT : ZQA
Quanta Computer Inc.

+5V_S5
+5V

3A

3.28A

+3V

3A

Size

Document Number

Rev
1A

SYSTEM 5V/3V (RT8206)

Date:
5

Monday, May 31, 2010

Sheet
1

36

of

48

3A
VFIX

X
X

PR85
10/F_6

D1

G2

D1

+5V

S2

+3.3V

VIN

[2] CPU_VDDNB_FB_H

SVI

+
PC71
330u/2V_7343

PC169
0.1u/50V_6

[2] CPU_VDDNB_FB_L

SVC

SVD

Output

1.1

1.0

0.9

0.8

PC72
4.7u/25V_8

PR89
22.1K/F_4

PR166

*Short_6

PR200

*Short_6

PC62
33p/50V_4
PC63
1200p/50V_4

VIN

1.2

1.0

0.8

PR86
10/F_6

VIN
PR83
11.3K/F_4

LGATE_NB
+
PC165
100u/25V_6.3*5.8

PHASE_NB

PR87
44.2K/F_4

PQ51
AOL1448
UGATE_NB

PC61
0.1u/50V_6

PC68
4.7u/25V_8

PC168
0.1u/50V_6

37

38

39

40

41

42

43

44

45

46

47

PC67
4.7u/25V_8
UGATE_0

20A

A39

[2,10] CPU_PWRGD

CPU_SVD

UGATE_NB

PHASE_NB

LGATE_NB

PGND_NB

OCSET_NB

RTN_NB

FSET_NB

VSEN_NB

FB_NB

VCC

1
2
3
2

CPU_COREPG

OFS/VFIXEN

COMP_NB

VIN

GND

+5VPCU
PR80
10K_4

[2]

48

49

+3V

A38

Note1

A10
PC60
0.1u/50V_6

PGOOD

PR82
1/F_6

BOOT_NB
BOOT_0

PWROK

UGATE_0

Pin 49 is GND Pin

SVD

PL10
0.36uH/30A
1

PHASE_0

+VCORE

36

PR79
1/F_6

1.4

Output

PQ50
AOL1718

35
34

UGATE_0

SVD

PR172
*2.2/F_6

PC59
0.1u/50V_6
4

33

PHASE_0

1
2
3

SVC

[14,34,39]

PC78
4.7u/25V_8

PQ52
AO4932

UGATE_NB

PC64
1u/16V_6

A37

VFIXEN VID Codes

+5VPCU

PC66
1000P/50V_4

Metal VID Codes

PR84
10/F_6

G1

PR88
10/F_6

S1/D2

GND

Note1
LGATE_NB

OFS/VFIXEN

PL11
2.2uH/8A

+CPU_VDDNB_CORE

Offset &
Droop
O

PC160
*1000P/50V_6

PC158
330u/2V_7343

PC65
330u/2V_7343

ISP_0

6265_EN
PR77

0_4
7

PR76
19.6K/F_4

PC57
4700p/25V_4
9
PR73
1K/F_4

10
11

PVCC

OCSET

LGATE_1

VDIFF_0

PGND_1

FB_0

PHASE_1

COMP_0

UGATE_1

32
ISN_0
31

LGATE_0

+5VPCU

A11

Note1
VIN

30
29

LGATE_1

PC58
2.2u/10V_8

+
PQ47
AOL1448

28
UGATE_1
27

PHASE_1

26

UGATE_1

PC156
4.7u/25V_8

PC157
4.7u/25V_8

PC151
0.1u/50V_6

PC153
100u/25V_6.3*5.8

20A

PL9
0.36uH/30A

+VCORE
1
3

PC56
0.1u/50V_6

PQ48
AOL1718

ISN_1

PR72
1/F_6

2
4

25

PR165
+

*2.2/F_6

24

ISP_1

LGATE_1

4
1
2
3

23

VW_1
22

COMP_1
21

FB_1
20

VSEN_1

RTN_1

VDIFF_1
19

13

PC53
1000P/50V_4

18

RTN_0

PR70
6.81K/F_4

BOOT_1

17

PC55
180p/50V_4

VW_0
VSEN_0

12

16

PC54
1200p/50V_4

LGATE_0

RBIAS

ISP_0

PR71
54.9K/F_4

PGND_0
PU8
ISL6265A

ENABLE

ISN_0

PR74
255/F_4

PR75
97.6K/F_4

SVC

HWPG_2.5V

1
2
3

CPU_SVC

15

[34,41]

6265_EN

14

[2]
PR167
100K_4

ISP_0
PC155
*1000P/50V_6

Close to
CPU socket

PR68
18.2K/F_4
PR69
3.92K/F_4

+VCORE
PR64
10/F_6

PC152
330u/2V_7343

PC154
330u/2V_7343

ISN_1
PC51
0.1u/50V_6

ISN_0

PC50
0.1u/50V_6

PR67
3.92K/F_4
ISP_1

[2] CPU_VDD0_FB_H
[2] CPU_VDD0_FB_L

PR62
18.2K/F_4

Parallel
PR63
10/F_6

+1.5VSUS

+VCORE

PR66
PR65

ISN_1

1K/F_4
10/F_6

[2] CPU_VDD1_FB_H

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

CPU Core (ISL6265)

Date:
A

Monday, May 31, 2010

E

Sheet

37

of

48

Note1
VIN
+5VPCU

OCP:8A
1.1V/6.3A

PR149
1M_4

A36

PR27
2.2/F_6

PC132
*0.1u/50V_6

[34] HWPG_1.1V

PC131
1u/16V_6

TON

VOUT

VDD

FB

PGOOD

PC28
0.1u/50V_6

BOOT

13

UGATE

12

UGATE-1.1V

PHASE

11

PHASE-1.1V

OC

10

VDDP

LGATE

GND

PGND

NC

TPAD

17

14

NC

PR33
4.32K/F_4

PR41
*4.7_6
LGATE-1.1V

4
PC34
*680p/50V_6
PQ38
AO4710

PC140
560u/2.5V_6X5.7

R1

PR146
+1.1V

PR155
22_8

R2

+1.1V_S5

+15V

PR153
1M_4

PR154
1M_4

10K/F_4

VOUT=(1+R1/R2)*0.75
L(ripple current)
A34
=(19-1.1)*1.1/(1u*272k*19)
PR148
*Short_6
=3.81A
PR201
*Short_6
RILIM=14.2mohm*(8-1.905)/20uA=4.327K
Ipeak(choke)=11.81A
A

PROJECT : ZQA
Quanta Computer Inc.

PQ40
DMN601K-7

PQ42
DMN601K-7

3
2
1

PQ43
DMN601K-7

Rds*OCP=RILIM*20uA
PC128
*33p/50V_4

PQ41
AO4468

PR156
100K_4

5.7A

Size
Date:

Document Number

Rev
1A

VCCP 1.1V(UP6111A)

+1.1V
5

PC40
0.1u/50V_6

PR144
4.75K/F_4

PC38
*10u/10V_8

1.1V_FB

PR157
1M_4

PC141
1U/6.3V_4

PC24
1u/16V_6

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

[34,41] HWPG-1.8V

Note1

PL7
1R0uH-3mR/15A

PC130
*1000P/50V_6

VIN

3
2
1

16

+1.1V_S5

PQ39
AO4468

5
6
7
8

EN/DEM

5
6
7
8

+3V

15

PC134
4.7u/25V_8

3
2
1

S5_ON

PR10
*10K_4

PC12
4.7U/6.3V_6

PU2
UP6111AQDD

PR145
*Short_6
[34,36,41,44]

PD2
RB500V-40

A35

PC32
2.2n/50V_4

5
6
7
8

PR143
10/F_6

Monday, May 31, 2010

Sheet
1

38

of

48

Note1
VIN
+5V_S5

PR57
10/F_6
PR54
2.2/F_6
PR164
100K_4

+3V

PR160
*10K/F_4

PC149
*0.1u/50V_6

EN/DEM

16

TON

VOUT

VDD

Note1

[34] HWPG_NB

PQ46
AO4468

13

UGATE

12

UGATE-1.05V

PHASE

11

PHASE-1.05V

OC

10

VDDP
LGATE

GND

PGND

NC

TPAD

17

14

NC

FB
PGOOD

PC147
0.1u/50V_6

BOOT

PC46
1u/16V_6

3
2
1

15

4.7u/25V_8

PL8
1R0uH-3mR/15A

PR56
5.6K/F_4

5
6
7
8

UP6111AQDD_EN

CPU_COREPG

+NB_CORE

PC45
1u/16V_6

PR159
*4.7_6
LGATE-1.05V

PC144
*680p/50V_6
PQ45
AO4710

3
2
1

34,37]

PC49
4.7U/6.3V_6

PU7
UP6111AQDD

PR163
*Short_6

PC146
2.2n/50V_4

5
6
7
8

PD6
RB500V-40

A32
PR61
1M_4

A31

OCP:10A
7.5A

PC145

PC48
*1000P/50V_6

PC142
560u/2.5V_6X5.7

PC143
*10u/10V_8

PC150
0.1u/50V_6

A33
PR59

*Short_6

PR60

*Short_6

VOUT=(1+R1/R2)*0.75
R1

PR161
2.74K/F_4

+5VPCU
PC148
*33p/50V_4

PR55
13.3K/F_4

1.05V_FB
B

PR162
10K/F_4

R2

PR58
10K/F_4

PQ9
DMN601K-7

PR158
100/F_4

HI --- 0.95V
LOW ---1.1V
3

PC47
.01u/16V_4

[8]

L(ripple current)
=(19-1.1)*1.1/(1u*272k*19)
~3.81A
RILIM=14.2mohm*(10-1.905)/20uA=5.747K
Ipeak(choke)=13.81A

TON=3.85p*RTON*Vout/(Vin-0.5)
Frequency=Vout/(Vin*TON)
TON=3.85p*1M*1/(Vin-0.5)
Frequency=1/(0.0036767)=272K

+NB_CORE_ON

PQ44
DMN601K-7

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

NB_CORE(UP6111A)
Date:
5

Monday, May 31, 2010

Sheet
1

39

of

48

PC101
10u/10V_8
PC100
0.1u/50V_6

A25

Note1

8207A_VBST

+0.75V_DDR_VTT

VIN

8207A_DH
PC103
10u/10V_8

8207A_LX
5

PC104
10u/10V_8

0.38A

8207A_DL

PC184
2.2n/50V_4

PC94
4.7u/25V_8

PC183
4.7u/25V_8

OCP:16A
12.99A

4
5

LL

DRVH

VBST

DRVL
CS_GND

17

CS

16

RT8207A
PU11

MODE

V5IN

VTTREF

V5FILT

PR198
6.2K/F_4

15
14

+
C

PC113
10u/10V_8

PQ54
AOL1718

PC106
1U/6.3V_4

PC95
*680p/50V_6

PC187
560u/2.5V_6X5.7

PR124
100K_4

NC

S5

PC186
1U/6.3V_4

13

PR101
*4.7_6

+5V_S5
PR122
5.1/F_6

PGOOD
S3

COMP
NC

VDDQSET

+5V_S5

VDDQSNS

PC108
.033u/50V_6

0.08A

Note1

+1.5VSUS

+SMDDR_VREF

18

PL15
1R0uH-3mR/15A

GND

PGND

1
2
3

+1.5VSUS

VTTSNS

PQ53
AOL1448

A20
C

VTTGND

VLDOIN

VTT

GND

1
2
3

19

20

21

22

23

24

25

12

11

10

+3V
FOR DDR III

HWPG_1.5V [34]
PR128
620K/F_4

VIN

(For RT8207A

S5_1.8V

PR132
0_4

SUSON

[34]

S3_1.8V

PR131
*0_4

MAINON

[34,41,44]

A24

400KHZ ) close to pc2008

PR199
*Short_6

PR202
*Short_6

PC114
*33p/50V_4

PR126
10K/F_4

Vout = (PR150/PR149) X 0.75 + 0.75

L(ripple current)
=(9-1.5)*1.5/(1u*400k*9)
=3.125A
Vtrip= (16-1.5625)*4.3mohm=0.062081V
RILIM=Vtrip/10u=6.208K

8207A_SET

S5_1.8V

PR130
10K/F_4

PR127
0_4

S3_1.8V

+1.5VSUS

MAIND

MAIND

[36,44]

PQ25
AO3404

S0

+1.5V

0.57A
A

S3

S5

+1.5VSUS

REF

VTT

ON

ON

ON

S3

ON

ON

OFF

S4/S5

OFF

OFF

OFF

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

DDR 1.5V(TPS51116)
Date:
5

Sheet

Monday, May 31, 2010

1

40

of

48

+3V
+3V

PC112
0.1u/50V_6

VEN

VO

NC

+1V

+1.5VSUS

1.5A

VIN
GND
GND

PC110
10u/10V_8

1V_ADJ

VEN

3
8
9

VIN
GND
GND

PU15
RT9025-25PSP

VPP PGOOD

HWPG_2.5V [34,37]

VEN

+2.5V

3
8
9

VIN
GND
GND

R1

PC125
0.1u/50V_6

0.19A
PR194
73.2K/F_4

PU12
RT9025-25PSP

PR140
0_4
[34,36,38,44]

S5_ON

PC179
10u/10V_8

+3VPCU

+2.5V_ADJ

0.8V
R2

PC180 PC181
10u/10V_8 0.1u/50V_6

PC118
*0.1u/50V_6

VPP PGOOD

VEN

3
8
9

VIN
GND
GND

VO

ADJ

PR136
*10K_4

+5VPCU

7
PC182
*0.1u/50V_6

+3V

PR197
10K_4

+5VPCU

NC

PC96
220P/50V_4

VO

Vout =0.8(1+R1/R2)
=0.9V

PQ15
DMN601K-7

+3V

+3VPCU

PR110
30.1K/F_6

PR102
33_4
[12] VDDR_OPT

+2.5V_ENABLE

PC111
10u/10V_8

0.8V

1.2VADJ0.9V

PR108
22.1K/F_4

VGA

MAINON

NC

0.94A

PR112
4.02K/F_6

PC109
0.1u/50V_6

PR170
EV@34K/F_4

PC178
1u/16V_6

HWPG_0.9V [34]
CPU_VDDR

PC162
EV@0.1u/50V_6

PR196
0_4

VO

Vout =0.8(1+R1/R2)
=1V

PR169
EV@100K_4
PC161
EV@10U/6.3V_6

VPP PGOOD

PC105
*0.1u/50V_6

0.8V
PC159
EV@0.1u/50V_6

PC163
EV@22u/6.3V_8

PR171
EV@9.1K/F_6

3
8
9

HWPG_2.5V

PG_1.5V_EN [43]

ADJ

+1.5VSUS

VPP PGOOD

ADJ

[42] PG_GPUIO_EN

PR111
0_4

ADJ

PU13
EV@RT9018A

PU10
RT9025-25PSP

PC164
EV@0.1u/50V_6
D

PR109
10K_4

+5VPCU

PR168
EV@10K_4

+5VPCU

NC

HWPG_1.2V
+1.2V_S5

PC121
10u/10V_8

0.8V

PR195
34K/F_4

PR135
34K/F_4

PC124 PC123
10u/10V_8 0.1u/50V_6

Vout =0.8(1+R1/R2)
=2.5V

1.2V
0.2A

PR137
17.4K/F_4

Vout =0.8(1+R1/R2)
=1.2V

+3VPCU

1.76A

A26

+1.8V

Note1

PC79
.1u/10V_4
PU9

HPA00835RTER

16

VIN

PH

10

VIN

PH

11

VIN

PH

12

15

EN

PR90
0_4
MAINON

[34,40,44] MAINON

PC70
1000P/50V_4

54418-1.8_VFB

PR98
15K/F_4

13

VSNS

PW RGD

14

COMP

GND

RT/CLK

GND

SS

AGND

PR96
182K/F_4

PL12
1uH_7X7X3
PC73
0.1u/50V_6

R1

54418-1.8_VFB
PC170
.1u/10V_4

+3V
PR91
10K_4

PC82
1200p/50V_4

PR189
100K/F_4

HWPG-1.8V [34,38]

22
21
20
19
18
17

PC83
*100P/50V_4

BOOT

PAD
PAD
PAD
PAD
PAD
PAD

PC81
10u/10V_8

R2

PC80
.01u/16V_4

PC166
10u/10V_8

PC167
10u/10V_8

PR188
78.7K/F_4

PROJECT : ZQA
Quanta Computer Inc.

V0=0.8*(R1+R2)/R2
Size

Document Number

Rev
1A

LDO
Date:
5

Monday, May 31, 2010

Sheet
1

41

of

48

Note1

+5V_S5

VIN

A28

+3V

OCP=16.38A
13.64A

+3V_D_EXT
EV@1u/10V_6

PC22

EV@1u/10V_6

2
8792VCC

[41] PG_GPUIO_EN
8792EN

[18] dGPU_PW REN

PR36
EV@0_4

PR24
*EV@0_4
PC25
EV@0.1u/10V_4
PR34
EV@100K_4

VDD

13

VCC

14

PGOOD

TON

8792TON

DH

8792DH

BST

8792BST

SKIP#

8792REFIN 10

REFIN

EV@AOL1448

LX
PU3
EV@MAX8792ETD+T
DL 3
FB

11

REF

ILIM

PR15
SPE@44.2K/F_4
PR21
EV@75K/F_4

PC11
EV@0.1u/50V_6

PC44
EV@330u/2V_7343
+

*Short_6

PR78

*Short_6

PC20
*EV@1000P/50V_6

A09

PQ36
EV@AOL1718

PC138
560u/2.5V_6X5.7

A29

PC43
EV@330u/2V_7343
B

Place near GND pin15

PR12
SPE@470K/F_4

PR16
EV@100K_4

Frequency(PR220=200K)

Rd
PC16
EV@.01u/16V_4

300K

Note: MAX8792 had integrate

discharge design.

PR23
SPE@49.9K/F_4

Rb

PR14
SPE@220K/F_4

Park / Robson / Seymour - XT

GPU_VID1 (GPIO15)

2
PQ4
EV@DMN601K-7

GPU_VID2 (GPIO20)

+VGPU_CORE

1.12V

0.85V

0.95V

0.9V

PR26
EV@100K_4

8792ILIM

PR28

PQ3
EV@DMN601K-7

[16] GPU_VID2

PR20
*EV@2.2/F_6

PC15
EV@1000P/50V_4

8792DL

+VGPU_CORE_FB

Ra

PR19
EV@100K_4

Note1

PL5
EV@0.36uH/30A

A30

15

Rc

8792LX

EP

8792REF

+VGPU_CORE

PC9
EV@4.7u/25V_8

REF-2V

[16] GPU_VID1

PC10
EV@4.7u/25V_8

PQ34

PR11
PC17
EV@1/F_6 EV@0.22u/25V_6

EN

8792SKIP# 12

PC127
EV@4.7u/25V_8

1
2
3

PC23

PR30
EV@10K_4

1
2
3

PR31
*EV@10K_4

PC126
EV@2.2n/50V_4

PR141
EV@200K/F_4

PC21
EV@.01u/16V_4

Ra

Rb

Rc

Rd

VREF

332K

130K

39.2K

49.9K

2V

Rc --> 39.2K/F_4 (CS33922FB15)

PROJECT : ZQA
Quanta Computer Inc.

Ra --> 332K/F_4 (CS43322FB15)

Rb --> 130K/F_4 (CS41302FB00)
Size

Document Number

Rev
1A

GPU CORE(MAX8792)
Date:
1

Monday, May 31, 2010

Sheet
5

42

of

48

+1.5VSUS

PR103
EV@22_8

+1.8V

+15V

PR104
EV@22_8

PR105
EV@1M_4

PC97

2.97A
1

PQ16
EV@DMN601K-7

EV@1U/6.3V_4

PQ17
EV@DMN601K-7

PQ18
EV@DMN601K-7

PC98
*2.2n/50V_4

PQ49
EV@AO3404

PQ10
EV@AO4468

0.23A

+1.8V_GPU

+1.5V_GPU

PQ19
EV@DTC144EU

EV@0_4

PR106

[41] PG_1.5V_EN

PR118
EV@1M_4

dGPU_D1

dGPU_D1

5
6
7
8

PR113
EV@1M_4

+1.8V_GPU

3
2
1

+1.5V_GPU

VIN

C730

A18

*100p/50V_4

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

GPU POWER
Date:
5

Monday, May 31, 2010

Sheet
1

43

of

48

VIN
PU5B
LM393
PD3
SW1010CPT

7
A

For EC control thermal protection (output 3.3V)

1

PR42
1M_6

Thermal protection

PQ6
AO3409

S5_ON 2

[34,36,38,41] S5_ON

VL

PR44
0_6

PQ7
DTC144EU
VL

SYS_SHDN#
PR39
220K/F_4

2.469V

2
+

PR51
*0_6

S5_ON

+5VPCU

PC27
0.1u/50V_6

PQ5
DMN601K-7

PU5A
LM393

PC30
0.1u/50V_6

PC42
*.1u/10V_4

2
PR45
200K/F_4

PR53
1
*1.2K/F_4
2

+3V

PR129
1M_4

+1.5V

+5V

PR115
22_8

PR116
22_8

PR117
22_8

GND

-CLK

TMSNS

-OT

TMGND

EN

PC41
*.1u/10V_4

PC39
*.1u/10V_4

PC37
*.1u/10V_4

SYS_SHDN# [2,36]
S5_ON_EN

S5_ON
C

PR50
*0_4

PR120
1M_4

[36,40]

MAIND

MAIND
3

+15V

+15V

MAINON_ON_G
3

CLK

PR49
*22_8

PU6
*RT9025-25PSP

PR52
*10K_6_NTC

VIN

VCC

PD4
*CHN217

PD5
*SW1010CPT

PQ8
DMN601K-7

+5VPCU

PR46
1.2K/F_4

PR47
200K/F_4
8

A27
PR48
10K_6_NTC

POWER TEST : Thermal & Charge pump test circuit

2
PQ23
DMN601K-7

PQ24
DMN601K-7

PQ27
DMN601K-7

PC107
*2.2n/50V_4
D

2
PQ26
DMN601K-7
1

PR134
*100K_4

PR119
1M_4

PQ31
DTC144EU

[34,40,41] MAINON

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

Thermal protect
Date:
1

Monday, May 31, 2010

Sheet
5

44

of

48

Power on Sequence required:

SB800:
1, +3.3VDUAL ramp before +1.1VDUAL
2, +3.3V ramp before +1.8v
CPU_LDT_RST#
(SB TO CPU)
3, +1.8V ramp before +1.1v
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS
CPU_PWROK

>1 mS

(SB TO CPU)

RS880:
1, 0 <(+3.3V) - (+1.8v) < 2.1
2, +1.8V ramp before +1.1v
3. +1.1V ramp before VCC_NB

CPU_CLKP/N

Req.
running
A

>1 mS Req.
running
>1 mS Req.

SB OUTPUT

NB_PWRGD
NB_PWRGD_IN

SB INPUT

SB_PWRGD_IN

NB_CORE(all NB power) valid before NB_PWRGD_IN

1V1DUAL_PWRGD
SLP_S3#
SYS_RST# 1V5_PWRGD/DNI
+1.2V_PWRGD KBC_GPIO77/DNI

HWPG_0.95V
RC=~22ms

NB_CORE should not ramp before +1.1v

NB_CORE

GROUP B

RC=~4.7ms
VLDT
VRM_PWRGD AND HWPG_1.8V (modify at B)
+1.1V
CPU_COREPG
RC=0
CPU_VDDR
RC=0
+VCC_CORE
RC=0
CPU_VDDNB_CORE
B

GROUP A

HWPG_2.5V
+2.5V
(CPU_VDDA_2.5_RUN)
+1.5V
HWPG_1.8V
RC=0
+1.8V
+5V/+3.3V
MAIN_ON
to S3
SUSB#
VDRAM_PWRGD

CPU MEM CTL &

DDR3 SODIMM PWRS

+0.75V_DDR_VTT
+SMDDR_VREF

+0.75V_DDR_VTT only will be shut down in S3 mode, and +0.75V_DDR_VTT for DDR3 SODIMM only.

+1.5V_SUS

SUSC#
C

Power button from EC to SB

DNBSWON#

CPU_THM/SB/SB_SCL1/2
SB_KB/SPI/LPC ROM PWRS

20mS
delay

RSMRST#

HWPG_1.1V
+5V_S5/+3.3_S5/+1.1_S5
When IMC, always on at all time( always PWR)

S5 RAILS
SUSD
S5_ON

Power button pressed

NBSWON#

KBC is ready
AC not present scenario = LOW AC present= high
ACIN
(ACIN detect)

KBC is powered by
+3.3VPCU

+5VPCU/+3.3VPCU
LDO:5.4V
(from DCIN)

Battery inserted/AC IN

VIN_SRC
+AVBAT
D

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

Power Squence Chart

Date:
1

Monday, May 31, 2010

Sheet

45
8

of

48

Group-A

+3VPCU

PWRGD

PWRGD
S5_ON

RT8206B

+1.1VEN

+5V_S5

UP6111A

+1.1V_S5

+1.5V

+1.5V_SUS

HWPG_1.8V
+1.8V

DNBSWON#

SWITCH
(OPTION)

HPA00835RTER

+1.8VEN

+1.5V_SUS

SB820

SUSON
MAIN_ON

+0.75V_DDR_VTT
+1.2V_ON

Power on Sequence required:

SWITCH
6

+2.5V_ON

+3.3V

+2.5V
RT9025

RT9025
LDO

9
9

SB800:
1, +3.3V_S5 ramp before +1.1_S5
2, +3.3V ramp before +1.8v
3, +1.8V ramp before +1.1v
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <=
40mS
7, 100uS <= +3.3VALW_R <= 40mS
RS880:
1, 0 <(+3.3V) - (+1.8v) < 2.1
2, +1.8V ramp before +1.1v
3. +1.1V ramp before VCC_NB

CPU_VDDR

+VCORE
B

EN

HWPG_2.5V

ISL6265A

H/W Thermal Follow Chart

CPU_VDDNB_CORE

CPU_COREPG

PWRGD

NB_CORE

10

NTC
Thermal
Protection

UP6111A

S5_ON

13

+1.8V

SB820 Sequencing
1

+3.3V_S5

RS880 Sequencing
1

+3.3V

EC Sequencing
1

3VPCU

+3.3V_S5

14

HWPG_1.8V

ICH_RSMRST#

NB POWER RAILS

NBSWON#

+5V_S5

15

+1.5V

S0 POWER

ATX PS_PWRGD

VIN_ON

+1.1V_S5

16

+2.5V

PCIE_RCLKP/N

NB INPUT CLOCKS

S5_ON

SideBand
Temp Sense I2C

POWER RAILS Sequencing

1

SWITCH

+5V

+3.3V_S5

+1.1V

+1.1V_S5

PWRGD

5 MAX8207A
5

MAIN_ON
+5V_S5

HWPG_1.1V
+3.3V_S5

EC
SMSC

CPU
CPU_SIC
CPU_SID

CPU_THRMTRIP_L#

THERMTRIP_L

SYS_SHDN#

WIRE-AND

3V/5 V
SYS PWR

PROCHOT_L
C

Level Shift

CPU_PROCHOT_L#

PM_THERM#

PROCHOT#

HWPG_1.1V

17

DNBSWON#

18

SUSON

8
9

HWPG_2.5V

PCICLK[4:0]

CPUCLK

ICH_RSMRST#

CPU_VDDNB_CORE

SB_PWRGD_IN

NB_PWRGD

-DNBSWON#

19

+VCC_CORE

NB_PWRGD_IN

SB_PWRGD

SUSB#/SUSC#

+1.5V_SUS

20

CPU_VDDR

LDT_PG

SUSON/USB_ON#

+SMDDR_VTERM

21

CPU_COREPG

KBRST#

PCIRST#,NB_RST#

MAIN_ON/HWPG

LDT_RST#

10

VRON
PWROK

FAN Driver

Level Shift

LDT_PG/CPU_PWRGD

S.B.

E.C.

CPUFAN#
The temperature listed blow first 3 items is CPU reading from EC.
The fourth value is thermal meter near fan.
Level 5 : Fan on =94C ; Fan Off =89C , Fan RPM= 95 % Duty
Throttling 50%: On =95C ; Off=90C
OS Shut down: 98C
H/W Shut down : 95C

CPI_SMBCLK
CPU_SMBDTA

10

MAIN_ON

22

+1.1V

10

A_RST#

10

11

+5V

23

NB_CORE

11

PCIRST#

11

11

12

+3.3V

24

12

LDT_RST#

12

12

FAN

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

PWR ON SEQ and THERM POLICY

Date:
1

Monday, May 31, 2010

Sheet

46
8

of

48

+5VPCU

ZQ2B Power tree

(6.15A)

<Alway ON>
AO4468
PQ27

<S5_ON--->S5D>
<S5D>

+5V_S5 (3~4A)

USB/M*1
USB/S*3
Page32

Page37

AO4468
PQ26

<MAINON--->MAIND>
<MAIND>

HDD
ODD
FAN
ALC271

+5V (3.2~4.3A)

Page37
D

ADAPTER
65W/90W

Smart
Charger

+3VPCU

ISL88731A
BATTERY

(5.03A)

<Alway ON>

RT8206B

BT

PU0001

PU4

AO3404
PQ29

<S5_ON--->S5D>

Page26

<S5D>

+3V_S5 (1.3A)

LAN

Page37
Page37

AO4468

VIN_SRC

<MAINON--->MAIND>
<MAIND>

(3.2A)

+3V

PQ28
Page37

EV@AO3413

--<EC>-<dGPU_VRON>

RT9025

--<EC>-*<VR2.5_ON>

+2.5V

(0.2A)

+CPUVDDA

Page44

<+3V>

HPA00835RTER

--<EC>--

(1A)

Page20

*<+1.5V_GPU>

PU6

+3V_D

Q26

+1.8V

(1.95A)

PU10

<MAINON>

Page44

EV@AO3404

+1.8V_GPU

(0.96A)

Q50
<+1.5V_GPU>

<PG_1V_EN--->PG_1.5V_EN>

EV@AO3404
PQ54

<PG_1.5V_EN>
--<EC>-<VIN_ON>

AO1413
PQ8

+1.5VSUS

+1.5V_GPU

(10.7A)

Page41

(18.71A)

Page36

Page45

+1.5VSUS

EV@G9018A
+1V (1.5A)

PU3

<PG_GPUIO_EN-->PG_1V_EN>

Page44

<PG_1V_EN>
RT8207A

--<EC>--

PU12

<SUSON>

RT9025

<VR2.5_ON-->HWPG_2.5V>

*<MAINON>

CPU_VDDR (0.75A)

PU5

<HWPG_2.5V>
Page41

--<EC>--

Page45

*<VRON>

VIN

AO4468
PQ25

--<EC>-<MAINON>

+1.5V

(7.87A)

Page41

(1.71A)

+0.75V_DDR_VTT
+SMDDR_VREF (0.75V)

UP6111A

--<EC>-<S5_ON>

+1.1V_S5

(0.75A)

(6A)

PU13
Page39

<MAINON--->HWPG_1.8V>
<HWPG_1.8V>

--<EC>--

<CPU_COREPG>

PU8

(5.5~7.8A)

(7.5A)

Page40

EV@MAX8792

--<EC>-<dGPU_VRON>

NB_CORE

+1.1V

PQ22
Page39

*<1.2V_ON>
UP6111A

<VRON-->CPU_COREPG>

AO4468

+VGPU_CORE

(22.5A)

PU7
Page42

EV@ISL62872

<dGPU_VRON-->PG_GPUIO_EN>
<PG_GPUIO_EN>

+VGPU_IO

PU2
Page43

+VCORE
ISL6265A

--<EC>-<VRON>

(4A)

(20A)

PU11
Page38

CPU_VDDNB_CORE

(3A)

PROJECT : ZQA
Quanta Computer Inc.
Size

Document Number

Rev
1A

Power Tree
Date:
5

Monday, May 31, 2010

1

Sheet 47

of

48

Model

MODEL

REV

ZQA M/B

3A

CHANGE LIST
A01
A02
A03
A04
A05
A06
A07
A08
A09
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30

PAGE28 :
PAGE28 :
PAGE35 :
PAGE31 :
PAGE22 :
PAGE34 :
PAGE35 :
PAGE35 :
PAGE42 :
PAGE37 :
PAGE37 :
PAGE36 :
PAGE31 :
PAGE31 :
PAGE31 :
PAGE31 :
PAGE23 :
PAGE23 :
PAGE02 :

Page

Add pull high resistor 4.7kohm on PD# pin, the reason is prevent speaker no sound.
Change R229,R223 to 33K for speaker 1W.
Change PR8,PR142 from 1m ohm to 10m ohm.
Add BT2.1 design for Customer request.
Delete R8 bead.
The connection of CPUFAN# is changed from 105pin to 106pin.
Change P/N
Change PR8 Package to 3720
Stuff PC44
Stuff PC165
Stuff PC153
Change P/N
Stuff L73
Stuff L45
Stuff L44
Add 100p for EMI
Add 1000p for EMI
Add 1000p for EMI
Delete R356

PAGE32 : Delete EC25,EC26,EC27,EC28

PAGE44 : Change PR46 from 1.7K ohm to 1.2K ohm.

Note :
1. Remove Jumper : JP5,JP16,JP6,JP14,JP3,JP13,JP11,JP2,JP8,JP9,JP10,JP15,JP17,JP12,JP1,JP7
2. Remove 0 ohm :
R355,R356,R370,183,R207,R73,R331,L61,R76,R65,R83,R42,R50,L9,R35,R24,R27,R448,R228,R204,R202,R199,
R197,R195,R223,R424,R414,R400,R442,R459,R458,R446,R62,R70,R351.
3. Change footprint :
C119,C139,C149,C153,C154,C181,C182,C185,C191,C192,C195,C198,C199,C201,C202,C204,C205,C209,
C217,C218,C222,C224,C225,C233,C234,C235,C236,C242,C248,C249,C252,C255,C260,C261,C262,C263,
C266,C268,C270,C273,C275,C277,C280,C285,C304,C307,C313,C314,C316,C318,C328,C329,C330,C332,
C335,C336,C337,C338,C340,C361,C362,C363,C364,L30,L39,R9,R84,R89,R95,R96,R98,R123,R126,R134,
R158,R363,C296,C308,C213

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48

KN1A M/B BOARD

From

To

1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A
1A

3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A
3A

PROJECT : ZQA

Quanta Computer Inc.

ZQA
5

PROJECT: ZQA

PCBA NO.

APPROVED BY : Johnny O
4

Document Number

Date:

Monday, June 21, 2010

CHECK BY : Darren Liao

Sheet

48

of

48

DOC. NO :

DRAWING BY : Bowen Chuang

3

Rev
3A

CHANGE LIST - 3A

REV: 3A
2

Quanta Computer Inc.

Size
Custom

DATE :06/11/2010

SHEET 1
1