01 - Networks All Chapters PDF

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1

Network Theory
04.
Sol: i) Given the mesh equations:
8 I1 5 I2 I3 = 110

1. Basic Concepts

5 I1 + 10 I2 + 0 = 0

01 . Refer IES 15 E & T Conventional Paper I


Q.15, page: 08

I1 + 0 + 7 I3 = 115
The NW must have 3 meshes with two
sources and all possible resistances in
general as shown in Fig.1

02. Refer IES 15 E & T Conventional Paper I


Q.12, page: 07
03.
Sol: Refer to Fig. 1, where I1 and I2 are mesh
currents.
5

R4

R2

2H

5H

. (I)

R5

I2

R1
+
V1

I1

3H
6H

I2

R6

115V
+

R3

8H
+

110V

I3

I1

9H
Fig.1

Fig. 1

Write the mesh equations


Mesh equations:

I1(R1+R2+R3)I2R2I3R3 = 110

+ j 11 I1 + ( j 6 j 2 j 3) I2 = V1
or + j 11 I1 j 11 I2 = V1 (1)
and ( j 6 j 2) I1 + j 3(I2 I1) + j 3
I2 + j 23 I2 = 0

I1R2+I2(R2+R4+R5)I3R5 = 0

--- (II)

I1R3I2R5+I3(R3+R5+R6) = 115
Comparing the above set of equations (I) and

or j 11 I1 + j 29 I2 = 0 . (2)

(II):

V1 j11
0
j 29
j 29 V1
I1

j11 j11
198 2
j11 j 29

R1+R2+R3 = 8

R2 = 5

R3 = 1

R2 = 5

R2+R4+R5 = 10

R5 = 0

R3 = 1

R5 = 0

V1 198

= j 6.83
I1
j 29
2

R3+R5+R6=7

Effective inductance = 6.83 H.


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:4:

R1+5+1=8

Postal Coaching Solutions

5+R4+0=10

1+0+R6 = 7

P 2

R 4

R1 = 2

R4 = 5

60V

25A

VAB

R6 = 6

Fig.1

R1 = 2 , R2 = 5 , R3 = 1 ,
Source transformation is used successively
as shown in Fig. (2) to (9)

R4 = 5 , R5 = 0 , R6 = 6

ii)

Current in the 110 V source = I1

D1
D

110 5 1
D1

10

115

P
+

+
2

60V

30V

= 110 (70) 1(1150) = 8850

B
Fig. 3

Fig. 2

5 1

D 5
1

10
0

1 P 2

= (8 70) + 5(35) 1(10) = 375


8850
118
I1

23.6 A
375
5

R
+

30V

25A

30V

25A

Fig. 4

Fig. 5

05. Refer IES 15 E & T Conventional Paper I


Q.06, page: 05
R

06. Refer IES 15 E & T Conventional Paper I


Q.10, page: 06
07.
Sol: The given circuit is shown in Fig 1 with
terminals marked.

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R
+

10A +
3

25A

35A

Fig. 7

Fig. 6

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:5:
3

Network Theory
Rth

R
+

RL

Vth

105V

Fig. 8
3

Fig. 2

From Fig. 2

A
+

VAB VL Vth

+
8

105V

RL
----------(2)
R th R L

VAB

A IL

+
B

IN

GN

Fig. 9

From Fig. (9),


105 8
VAB
56 V
15

GL
B

Fig. 3

From Fig. 3

2. Network Theorems

I AB I L I N

GL
---------- (3)
GN GL

1
1

R N R th
Equations (2) and (3) are dual equations
where the duality is indicated by the dual
quantities given below:

Where, G N
01.
Sol: Duality of Thevenins and Nortons
theorems:
The NW in Fig. 1 can be represented by the
equivalent circuit shown in Fig. 2 by
Thevenins theorem and in Fig. 3 by
Nortons theorem.
A IL
+

NW

VL

(or) G L

Short circuit current


from A to B = IN

Load
Resistance, RL

Load Conductance,
1
GL
RL

Thevenin
Resistance, Rth

Nortons Conductance,
1
1
GN

RN
R th

Fig. 1

1
------------1)
RL

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Current through load, IL

Open circuit voltage


across A, B = Vth
Load

Load : RL

Voltage across load, VL

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:6:

The given circuit is shown in Fig.4 with 3


across the terminals A, B.

Postal Coaching Solutions

Thevenin equivalent circuit across the


terminals A, B is shown in Fig. 6.
2

The current through each element is marked


by assuming I as the current through 1 .

+
3

30 V

V0

15 A

I1 15
1

Fig.6

V0

15 A

I1 30

I1

20 V +

15 A

+
Vth

Fig.4

Writing KVL equations:

30 3
18 V
5

02.
Sol: The given circuit is shown in Fig. 1.
Assuming that the switch is closed at t = 0,
the circuit for t > 0 in transform form is
shown in Fig. 2.
10

1I1 + 2(I1 30) + Vth = 20


(or)

3I1 + Vth =

1H

1H

10

100 V

10
i(t)

80..(1)
and

6(I1 15) + 1 I1 + 2(I1 30) = 0

(or)

9I1 90 60 = 0,

I1

Fig. 1
10

150
50

A ...... (2)
9
3

1s

100
s

A 1s

I(s)

From (1) and (2), Vth = 80 3 I1 = 30 V


Rth is obtained from the following circuit,
Fig. 5

6
1

10

10

B
Fig. 2

The simplified circuit is shown in Fig. 3 by


using Thevenins theorem across the
terminals A, B.
Zth(s)

A
+
Rth = 3 || 6 = 2

(s + 10)

Vth(s)

B
Fig.5
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I(s)

Fig. 3

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:7:

Vth (s)

100 10
10 3

s s 20
s (s 20)

Z th (s)

10 (s 10)
(s 20)

Vth (s)
Z th (s) s 10

I(s)

10 s 100
(s 10)
Z th (s) s 10
(s 20)

Network Theory

05. Refer IES 15 E & T Conventional


Paper I Q.20, page: 20
06.
Sol: Maximum power transfer theorem:
This is used to find the value of the load
impedance ZL (optimum) that absorbs
maximum power from a given network
shown in Fig. 1.

10 s 100 s 2 30 s 200
(s 20)

NW

ZL

Fig.1

s 40 s 300 (s 10) (s 30)

s 20
(s 20)
2

I(s)

10 3
(s 20)
s (s 20) (s 10) (s 30)

103

s (s 10) (s 30)

A
B
C
103

s 10 s 30
s
1
1
1
A
, B

,
300
10 20
200
C

1
1

30 20
600

I(s)

The Network is replaced by its Thevenin


equivalent circuit as shown in Fig. 2.

10 1
5
5 1

3 s s 10 3 s 30

5
10

i( t ) 5 e 10 t e 30 t u ( t )
3
3

03. Refer IES 15 E & T Conventional


Paper I Q.07, page: 14

ZS
+
VS

IS

ZL

Fig.2

ZL = RL + j XL is complex load
VS is Thevenin voltage phasor (RMS Value)
ZS is Thevenin equivalent impedance
= R S + j XS
Vs and Zs can be understood as the source
voltage and source impedance w.r.t the load
impedance, ZL.
VS
VS
IS

ZS Z L
(R S R L ) j(X L X S )
--------- (1)
P = Power delivered to ZL
2

04. Refer IES 15 E & T Conventional


Paper I Q.19, page: 20
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| I S |2 R L

VS R L
(R S R L ) 2 (X L X S ) 2

....(2)
For maximum power transfer to ZL:

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:8:

Case 1:
When only XL is variable in the load,
P
0, 2(X L X S ) 0 or XL = XS ---(3)
XL

Postal Coaching Solutions


(3 + j 4)

1030

Then maximum power transferred to

j5

ZL
B

VS R L
ZL =
------- (4)
(R S R L ) 2
Case 2:

When only RL is variable,

Fig. 1

P
0
RL

(3 + j 4)
A

(RS + RL)2 + (XL + XS)2 RL(RL + RS)2 = 0

j5

Zth

RS2+RL2+2RSRL+(XL+XS)22RLRS2RL2=0
RS2 RL2 + (XL + XL)2 = 0

B
Fig. 2

or R L R S (X L X S ) 2 ------------ (5)
2

Then maximum power delivered to

ZL

VS2 R L
VS2

(R S R L ) 2 R 2L R S2 2(R L R S )
--------- (6)

Case 3:
When XL as well as RL are variable, then
from (3) and (5) XL = XS , RL = RS
ZL (optimum) = RS j XS -------- (7)
= complex conjugate of ZS
Then maximum power transferred to

(3 j 4) ( j 5)
(3 j 4) j 5

Z th

20 j15
5 (4 j3) (3 j1)

3 j1
9 1

1
(12 3 j 9 j 4)
2
1
(15 j 5) 7.5 j 2.5
2

ZL = (7.5 + j 2.5)

( ZL= Zth*)

ZL =

VS
--------- (8)
4RL

Let ZL = Impedance of Loudspeaker across


the terminals A, B for maximum power
dissipation in it as shown in Fig. 1.
Then ZL = Thevenins loud speaker across
terminals A, B into the network = Zth
Zth is found from Fig. (2)
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07. Refer IES 15 E & T Conventional


Paper I Q.22, page: 21
08. Refer IES 15 E & T Conventional
Paper I Q.09, page: 15
09.
Sol: The given circuit is shown in Fig. 1, where
40 across 50 V can be deleted.

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B
50

400
7
400
10

V
7
170
17

20
10

40

10. Refer IES 15 E & T Conventional


Paper I Q.22, page: 21

100V

50 V

Fig. 1

10

Ve

3. Transient Circuit Analysis


01.
Sol: The RC circuit and its input are shown in
Fig. 1

Re

Network Theory

0.5

v(t)
10V

1 sec t

+
v(t)

Fig. 1

Fig. 2

VBA is found by reducing the given circuit to


the left of BA into a single voltage source,

v(t) = 10 [ u(t) u(t t0) ] , t0 = 1 sec


The transform equivalent circuit is shown in
Fig. 2.
0.5

Ve and a series resistance, Re by using

Millimans theorem.

1
1
100

1
1
G1 G 2
7

50 20
400
10

100
7
10
7

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I(s)
Fig. 2

1 e s t 0
V(s) 10

s
s
Z(s) 0.5
I (s)

Re

VBA

1
2s

V(s)

The equivalent circuit is shown in Fig. 2


50
100

V G V2 G 2
20
Ve 1 1
50
1
1
G1 G 2

50 20
4 100
400


V
7
7

2F
i(t)

1
s 1

2s
2s

10
2s
(1 e t0 s )
s
( s 1)
20
20 t0 s

e
s 1 s 1

i( t ) 20 e 1t u ( t ) 20 e ( t 10
t = 0,

u ( t 10 6 )

i(0+) = 20 A

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: 10 :

Postal Coaching Solutions

t = 1 s, i(1) = 20 exp(106)
and i(1+) = 20 exp(106) 20

When r(t) is magnitude scaled by 12 and


delayed by 2, i.e., v(t) = 12 r(t 2)

The variation of i(t) in shown in Fig. 3.

1
1

i( t ) 12 1 e 1( t 2 ) e 2 ( t 2 ) u ( t 2)
2
2

i(t)
20

(ii) For v(t) = 1 u(t)


1
1
1
I u (s)

(s 1) (s 2)
s 1 s 2

t( sec)

iu(t) = (1 e1 t 1 e2 t) u(t)
When v(t) = 2 u(t 3)
i(t) = 2 [ e(t 3) e2 (t 3) ] u(t 3)

Fig. 3

02.
Sol: The RLC series circuit is shown in Fig. 1.
R I(s) L
+
V(s)

Fig.1
R = 3 , L = 1 H, C = 0.5 F

03.
Sol: Given v(t) can be expressed as follows
V(t) = r(t) r(t t0)
= r(t) r(t2)
1
Vs 2 1 e 2s
s
Converting everything into laplace domain
1

V(s)
I(s)
Z(s)
Z(s) R L s

L C s R C s 1
1

Cs
Cs
2

R
1

L s 2 s
L
L C

s2 3s 2
(s 1) (s 2)

s
s

(i) For v(t) = r(t), V(s) = 1/s2


I r (s)

1
1 / 2 (1) 1 / 2

s (s 1) (s 2)
s
s 1 s 2

1
1

i r ( t ) 1 e 1 t e 2 t u ( t )
2
2

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V(t)

Is

+
i(t)

0.2F

V(s)

I(s)

5
s

Vs Vs .s

5 s5
1
s

1 e 2s
Is
ss 5
1 e 2s
1
e 2s

ss 5 ss 5 ss 5

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: 11 :

1 1
1 1 1
1 2s
Is

e

5 s s 5 5 5 s 5

10
4A
2 .5
i(0) = 2 A
For t > 0, the circuit is shown in Fig.2. Its
transform equivalent is shown in Fig. 3.
i 1 (0 )

Taking inverse laplace transform


i t

1
u t e 5 t u t
5

Network Theory

1
u t 2 e 5 t u t 2
5

1H

1H
i(t)

So,

10 V

1
it u t u t 2 e 5 t u t 2 u t
5

R4

Fig. 2

04.
Sol: v(t) = 1 u(t 2) + 1 u(t 4) + 1 u(t 6) + 1
u(t 8) + 1 u(t 10) 5 u(t 12)
If the response, iu(t) due to 1 u(t) is found,
then the response, i(t) due to v(t) can be
easily written.
I u (s)

1s

4V

(10/s)

05. Refer IES 15 E & T Conventional


Paper I Q.05, page: 26
06.
Sol: At t = 0 , the circuit is shown in Fig. 1

R4

4 s 10
2 (s 2 4 s 5)

s (s 2)
s (s 2)

R th s [ (s 1) || (1) ]
s 1
s2 3 s 1

s 2
s2
The Thevenin equivalent is shown in Fig. 4.
s

Rth
i(0)

i1(0 )

I(s)

+
R4 = 1

Vth

Fig. 1
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+A

10

4 1

2
(s 2)

1H

10 V

2V

Vth

i u ( t 10) 5 i u ( t 12)

Apply Thevenins theorem across A, B:

i( t ) i u ( t 2) i u ( t 4) i u ( t 6) i u ( t 8)

1H

1s

Fig. 3

A B
(1 / 2) (1 / 2)

s s2
s
s2

I(s)
+

V (s)
1

R Ls
s (s 2)

1
i u ( t ) (1 e 2 t ) u ( t )
2

Fig. 4

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: 12 :

I(s)

Vth
R th 1

R th 1
I(s)

Postal Coaching Solutions

The circuit is further simplified to Fig. 3.


16A 2.5 16A

s 3s 1 s 2
s 4s 3

s2
s2
2

+
60V

2 (s 2 4 s 5)
2 (s 2 4 s 5)

s (s 2 4 s 3)
s (s 1) (s 3)

08.
Sol: The given circuit is shown in Fig. 1
R

2
10

i( t )
2 e 1 t e 3 t u ( t )
3
3

07.
Sol: At t = 0, the circuit is shown
Fig. 1.

60V
L

ic(0+) = 4 Amp

5 / 3
1
1/ 3
2

s 1 s 3
s

in

is

+
vC

24V
iL

Fig.2

24
---------(1)
i L (0 )
R4

At t = 0+, the circuit is shown in Fig.2.

v C (0 )

24 4
96
------(2)

R4
R4

is(0) = 0
1

60V

S +
20 V

20A
Fig. 2
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The behaviour of the circuit at t = 0 is


shown in Fig. 2

vc(0) = 20 x 1 = 20 V

Fig.1

+
C Vc(0)

60
= 20 A
3

is

t=0

Fig. 1

iL(0) =

24V

1
S

+
20 V

20 A

Fig. 3

A
B
C
2

s 1 s 3
s

ic (0+) = 4 A

+
40V

ic(0+)

The behaviour of the circuit at t = 0+ is


shown in Fig. 3

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: 13 :

Network Theory

R=8
2i1

R
i1

i1
4

4 i1

is(0+)

B
+ vC(0+)

24V

+
4

iL(0+)

At t = , the behaviour of the circuit is


shown in Fig. 4.

R=8

is()

2is()
4

C
Fig. 3

is()

24V

4
is()
B
Cap.

Given is(0+) = 1.2 A


+

iL(0 ) = iL(0 ) , vC(0 ) = vC(0 )-------(3)

Fig. 4

Let the current through 4 be i1 .

Apply KVL around the mesh APCA:

Apply KCL at P.

24 = 16 is() + 4 is()

i1 = iL(0+) is(0+) --------(4)


Apply KVL around the mesh APBCA
24 2 i1 R 4 i1 = vC(0+)
24 i1(2R + 4) = vC(0 )
+

i s ( )

24
1 .2 A
20

09. Refer IES 15 E & T Conventional


Paper I Q.02, page: 24

Using equations (1), (2), (3) and (4)

24

96
24 (2 R 4)
1 .2
R4
R 4

24 1.2 R 4.8
96
24 (2 R 4)

R4
R4

4. AC Circuit Analysis

01.
Sol: Referring to Fig.1

24 (R + 4) (2 R + 4) (1.2 R + 19.2) = 96
24R (2.4 R2 + 38.4 R 4.8 R + 76.8) = 0

+
1000 V

R2 4 R 32 = 0
(R 8) (R + 4) = 0

j 8

V1

j8

V2

Ix

j4
+
j 6

10060 V

Fig.1

R = 8 , 4
The negative resistance is not valid.
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j4

V1 100
V
V V2
1 1
0
j4
j8
j8

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: 14 :

Postal Coaching Solutions

Multiply by j8 :
02 . Refer IES 15 E & T Conventional Paper I
Q.04, page: 46

2 V1 200 V1 + V1 V2 = 0
2 V1 V2 = 200

03. .
Sol: The given circuit is shown in Fig. 1

V2 = 2 V1 200 -------------(1)

V2 V1
V2
V2 100 60

0
j8
j6
j4

RC

RL
+

Multiply by j 24 :
V

3 V2 3 V1 4 V2 + 6 V2 60060 = 0

IC

IL

3 V1 + 5 V2 = 60060
3 V1 + 10 V1 1000 = 60060

Fig.1

600
600 3

7 V1 1000
j

2
2

IL

1300 j 300 3

V1

L I L tan 1
R
L

1300 j 300 3
-------- (2)
7

1
C I C tan 1
C R C

Substitute eqn (2) in eqn (1)


V2

IC

1200 j 600 3

7
7

I
C

V1 V2
j8

100
300 3 1


j
7 j 8
7
75 3
25

j
14
14
25

3 3 j
14
9.449 169.1

ACE Engineering Academy

1
tan 1

C R

The phasor diagram is shown in Fig. 2

2
(1300 j 300 3 ) 200
7

Current through j 8 = I x

V
V
, IC
j
R L j L
RC
C

IL
Fig. 2

For IC to lead IL by 90 or IL and IC to be in


quadrature

C L
2

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: 15 :

1
L
tan 1

tan 1
RL 2
C RC

1 2
2
tan 1 tan 2

1 tan 1 tan 2
L/ RL
1 L
1
1
C R C R L
CRC
L
Time constant of the inductive branch, L =
RL
Time constant of the capacitor branch, C = C RC

Network Theory

Power consumed = I2 R =

105
0.1 1000
| Z |2
| Z |2

tan 1 tan 2 1

L
1
C

10 6

100

105
103
100

10 3

10 6

900 30

04. Refer IES 15 E & T Conventional Paper I


Q.16, page: 19

2 30 10 6 0

05.
Sol: At resonance frequency, = 0
1
0 L
0 C
1
1
0

103 rad / sec


6
LC
110

Power consumed = I2 R = 100 10


= 1000 W

10 6

Z 10 j

10 6
,
100

V
100

|Z|
|Z|

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30

900 4 10 6
15 103
2

= 1000 + 15 and 1000 15


= 1015 rad/sec and 985 rad/sec

6. Two Port Networks

100
10 A
10

|Z|

100 2
R
| Z |2

01.
Sol: A two-port circuit can be declared as a
reciprocal circuit, if the 2-port parameters
satisfy the following relations:
(i) Z12 = Z21
(ii) Y12 = Y21
(iii) AD BC = 1
(iv) h12 = h21
The two-port circuit shown in Fig.1 is
reciprocal.
This is justified by taking 15V voltage
source and showing Y12 = Y21 as shown
below.

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: 16 :

Postal Coaching Solutions

First, convert the (30 , 20 and 60 ) T


network into a network and next get the
overall network (Fig. 3)

I1

P 30

Q 20 R

Fig. 5
2

2
10

7
15 1.75 A
60

Y12

60

60
V2 I1
7

60

Fig.1

2
180

120
2

Fig. 2
(60/7)
1

+
V2

120

180

10

(60/7)

I1
V2


V1 0

60

When the excitation and response are


interchanged, Short circuit current at port 1
with excitation, V2 = 15 V at port 2 =
7

15 1.75 A
60

2
180

120

Fig. 3
(60/7)

I2

The ratio of response to excitation remains


constant for reciprocal network when the
response and excitation are interchanged.
02.
Sol: The given circuit is shown in Fig. 1

+
180

V1

120

2
I1

V1
a

Y21

I
2
V1

V2 0


60

Short circuit current response at port 2


with excitation, V1 = 15 V at port 1

I2
10

Fig. 4

60
V1 I 2
7

Fig.1

V2

V1 = A V2 B I2
I1 = C V2 D I2
Keep I2 = 0
V
I
A 1 , C 1
V2
V2
From Fig. 2,

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: 17 :

03. Refer IES 15 E & T Conventional Paper I


Q.15, page: 65

I1 2
I1

10

V1

04. Refer IES 15 E & T Conventional Paper I


Q.18, page: 66

V2

05. Refer IES 15 E & T Conventional Paper I


Q.19, page: 68

Fig.2

V2

10 V1
5
6
V1 , A
12
6
5

06.
Sol: Z- parameters of network:

V2 = 10 I1 , C = 0.1
Keep V2 = 0
V
I
B 1 , D 1
I2
I2

V1= Z11I1 + Z12I2


V2 =Z21I1 + Z22I2
Z11

From Fig. 3,
I1

Network Theory

V1
I1

I 2 0

I2
I1

+
V1

10

V2=0

I1 + I2

10

10
2I1

5
V1

I1

Fig.3

V1 = 12 I1 + 10 I2
10 I1 + 10 I2 + 4 I2 = 0
10 I1 = 14 I2 , 5I1 = 7 I2
D

7
5

KVL
V1 = 10I1 + 10I1
V1 = 20I1 Z11 = 20
Z 21

V2
I1

I 2 0

KVL, in above circuit,

34
B

V2 = 20I1

6 .8
1.4

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V2

34
7
V1 12 I 2 10 I 2
I2
5
5

1.2
T
0 .1

I2=0
+

10I1 10I1 + V2 = 0

Z 21

V2
I1

= 20
I 2 0

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: 18 :
I1=0 10

10

I2

Postal Coaching Solutions

7. Graph Theory

I2
+

5
V1

V2

Z 22

V2
I2

02. Refer IES 15 E & T Conventional Paper I


Q.03, page: 72
I1 0

KVL, V2 = 15I2 Z22 = 15


Z12

V1
I2

01. Refer IES 15 E & T Conventional Paper I


Q.01, page: 69

V1 = 5 I2 Z12 = 5

03. Refer IES 15 E & T Conventional Paper I


Q.05, page: 72
04. Refer IES 15 E & T Conventional Paper I
Q.02, page: 69

I1 0

20 5
[Z] =

20 15

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05. Refer IES 15 E & T Conventional Paper I


Q.06, page: 73

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: 19 :

9. Synthesis of Passive Network


01.
(s 1) (s 3) (s 5)
Sol: Given Z(s)
s (s 2) (s 4) (s 6)

This impedance corresponds to RC NW


Foster - I form is realized by taking the
partial fractions of Z(s).
A
B
C
D
Z(s)

s
s2 s4 s6
15
5

48
16
(2 1) (2 3) (2 5)
3
B

( 2) (2 4) (2 6)
16
A

C
D

( 4 1) ( 4 3) ( 4 5)
3

( 4) ( 4 2) ( 4 6)
16
( 6 1) ( 6 3) ( 6 5)
5

( 6) ( 6 2) ( 6 4)
16

Network Theory

02. Refer IES 15 E & T Conventional Paper I


Q.19, page: 87
03. Refer IES 15 E & T Conventional Paper I
Q.20, page: 90

04. Refer IES 15 E & T Conventional Paper I


Q.21, page: 91
05.

s( s 2 10)
Sol: Z ( s ) 2
( s 4)( s 2 16)
This is clearly a L-C driving point
impedance function.
Fosters I : (i.e,) series impedance form
obtained by partial fraction expansion.

Z ( s)

s( s 2 10)
( s 2 4)( s 2 16)

The standard form of representing a L-C


driving point impedance in fosters-I form is,

5 1 3 1
3 1
5 1
Z(s)

16 s 16 (s 2) 16 (s 4) 16 (s 6)

1
1

(16 / 5) s (16 / 3) s (32 / 3)


1
1

(16 / 3) s (64 / 3) (16 / 5) s (96 / 5)

Z ( s)

n
k0
2k s
2 i 2 k s
s i 1 s i

But in the given function, There is no pole at


origin and there is no pole at infinity.
So, doing partial fraction expansion
Z ( s)

The realization is shown in Fig. 1


(16/5)F

(3/32)

(3/64)

As B Cs D

s 2 4 s 2 16

(5/96)

Comparing coefficients
Z(s)

4A + 4C = 4 .. (1)
(16/3)F

(16/3)F

(16/5)F

16A + 4C = 10 . .. (2)

Fig. 1
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: 20 :

Postal Coaching Solutions

1
1
,B=
2
2

By solving, A =

B+D = 0 . (3)
16B + 4D = 0 (4)
By solving, B = 0, D = 0

s
s
So, 2 2 2 2
s 4 s 16
Z(s)

Z(s)

1
2

s
4

s/2 s/2
1
8
2s
s

1
2

s
16

s/2 s/2

1
2s

32
s

1
1

Y1 (s) Y2 (s)

So, Fasters I form of realization is,

Z(s)

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2F

2F

1
H
8

1
H
32

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