Cac Lenh MIPS Co Ban - v1

Khoa K thut My tnh Trng i hc Cng Ngh Thng Tin HQG Tp.
HCM
Mt s lnh assembly MIPS c bn
GV Bin son: TTNNguyet-Khoa KTMT-UIT

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Khoa K thut My tnh Trng i hc Cng Ngh Thng Tin HQG Tp. HCM
Bng 1. Tm tt cc lnh MIPS c bn (tham kho [1])

Cc lnh assembly MIPS trong ti liu ny s c din t theo tng hng trong bng 1
Tn
lnh
(y
)
Tn
lnh
Lnh
thuc
nhm
g (R, I
hay J)
Lnh thc hin chc

nng g
Chc nng ca tng lnh
c din t theo kiu
vit ca Verilog. Verilog
l ngn ng lp trnh
dng m t thit k
phn cng (sinh vin
nm 1, 2, 3 cha hc).
Mt s ghi
ch cho lnh
tng ng,
c lm r
cui bng
(1) May cause overflow exception

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opcode v funct cho

tng lnh tng
ng.
V d: lnh add c
s ct ny l
0/20hex, tc opcode
ca add l 0; trng
funct trong R-format
ca add l 20hex
Nhng lnh c phn ghi ch (1) s mt thng bo li, hay cn gi l gy ra mt ngoi l (exception) khi
php ton b trn (overflow)
(2) SignExtImm = {16 {immediate[15]}, immediate}
Nhng lnh c phn ghi ch (2) lun cha mt s tc thi 16 bits (c du dng b 2), v s ny c m
rng thnh s 32 bits theo kiu m rng c du.
Vit theo cu trc ca Verilog
16{immediate[15]}: l mt chui 16 bits; 16 bit ny c tao ra ging y nh bit th 15 ca
immediate
{16{immediate[15]}, immediate}: l chui 32 bits, 16 bit thuc na cao c tao ra ging nh bit
th 15 ca immediate, v 16 bit thuc na thp chnh l s tc thi
V d:
SignExtImm ca 0011 1110 1101 1100 l 0000 0000 0000 0000 0011 1110 1101 1100
SignExtImm ca 1011 1110 1101 1100 l 1111 1111 1111 1111 1011 1110 1101 1100
C th hiu n gin, nu s tc thi l dng th 16 bits ca na cao thm vo s l 0, cn

nu s tc thi l m, th 16bits ca na cao thm vo s l 1
(3) ZeroExtImm = {16{1b0}, immediate}
Nhng lnh c phn ghi ch (3) lun cha mt s tc thi 16 bits (c du dng b 2), v s ny c m
rng thnh s 32 bits theo kiu m rng Zero, tc khng cn bit y l m hay dng, 16 bits ca na cao
thm vo u l 0.
Vit theo cu trc ca Verilog

16{1b0}: l mt chui 16 bits m tt c cc bit u l 0
{16{1b0}, immediate}: l chui 32 bits, 16 bit thuc na cao l 0 v 16 bit thuc na thp chnh
l s tc thi
V d:
SignExtImm ca 0011 1110 1101 1100 l 0000 0000 0000 0000 0011 1110 1101 1100
SignExtImm ca 1011 1110 1101 1100 l 0000 0000 0000 0000 1011 1110 1101 1100
(4) BranchAddr = {14{immediate[15]}, immediate, 2b0}

s c gii thch trong phn lnh beq v bne
(5) JumpAddr = { PC + 4[31:28], address, 2b0}
s c gii thch trong phn lnh j v jal
(6) Operations considered unsigned numbers (vs. 2comp.)
Nhng lnh c phn ghi ch (6) lun lm vic trn s khng du (unsigned)
(7) Atomic test&set pair; R[rt] = 1 if pair atomic, 0 if not atomic
Trong bng 1, ch c 2 lnh ll v sc l c ghi ch (7)
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2 lnh ny lin quan n mt s l thuyt khng nm trong phn ging dy l thuyt, v vy b qua 2 lnh
ny
Mt s ghi ch:
K hiu s:
K hiu 0x u c dng ch h 16
V d: 0xffff = ffffhex = ffff(16)
S ghi bnh thng s c hiu l ang trong h 10
Thanh ghi:
B x l cha 32 thanh ghi hot ng, mi thanh ghi 32 bits.

Mi thanh ghi s c tn gi nh v s th t tng ng ca n. Bng 2 m t s th t v tn gi nh
ca tng thanh ghi
Nh vy, khi lm vic vi thanh ghi c 2 vn cn quan tm: gi tr v a ch
Gi tr l gi tr ang c cha trong thanh ghi
a ch l ch s ca thanh ghi trong tp 32 thanh ghi.
V d: Nu ni thanh ghi $t3 c gi tr l 5, hoc thanh ghi $t3 bng 5, tc gi tr ang cha
trong $t3 l 5 v ch s/a ch ca $t3 l 11
Bng 2. M t cc thanh ghi (trch t bng 1)

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Tn gi nh
ca cc
thanh ghi
B nh:
Ch s tng
ng ca cc
thanh ghi
Mc ch s
dng ca tng
thanh ghi
Thanh ghi no Yes l nhng

thanh ghi cn c lu tr li
khi thc hin vic gi mt
hm con
Tng t nh thanh ghi, khi lm vic vi b nh c 2 vn cn quan tm: gi tr v a ch

Gi tr l gi tr ang c cha trong mt t nh (word), hoc trong byte
a ch a ch c gn cho word hoc byte .
V d:
Hnh 3. Mt v d v hnh nh b nh t phn mm m phng (simulator) MARS 4.4

y l word (4 bytes) ti a
ch 0x10010004, v c gi tr
l 0x12345678

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A. Xt cc lnh s hc

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Cc lnh s hc:
add, addi, addiu, addu
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sub, subu
R vit tt ca Register
V d: R[rs] hiu l gi tr ca thanh ghi rs
-------------------------------------------1. Lnh add
Lnh ny thuc dng R-format, c opcode l 0 v trng funct gi tr l 20 hex

Syntax (c php): (tham kho Appendix B ca sch tham kho [1])
ngha: R[rd] = R[rs] + R[rt]

Thc hin cng gi tr thanh ghi rs vi gi tr thanh ghi rt, tng a vo thanh ghi rd
V d:
add $t0, $t1, $t2
Gi s gi tr ang cha trong thanh ghi $t1 l 3, gi tr ang cha trong thanh ghi $t2 l 4
Kt qu: Sau khi lnh add trn thc hin, gi tr trong thanh ghi $t0 l 7 (4 + 3 = 7).
2. Lnh addi
Lnh ny thuc dng I-format, c opcode 8hex

Syntax (c php):
ngha: R[rt] = R[rs] + SignExtImm

Thc hin cng gi tr thanh ghi rs vi s tc thi, kt qu a vo thanh ghi rt.
Lu : Phm vi cho s tc thi trong lnh ny l 16 bits. S tc thi trc khi cng vi thanh ghi rs phi c
m rng c du thnh (SignExtImm) thnh s 32 bits.

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V d:
a) addi $t0, $t1, 3
b) addi $t0, $t1, -3
c) addi $t0, $t1, 32768
Gi s gi tr ang cha trong thanh ghi $t1 cho c 3 cu u l 4
Kt qu:
a) Sau khi addi thc hin xong, gi tr ca $t0 l 7
Quy trnh lnh thc hin:
s tc thi l 3(10) = 0000 0000 0000 0011(2) (s 16 bit c du)
SignExtImm ca 3(10) = 0000 0000 0000 0000 0000 0000 0000 0011(2)
Gi tr thanh ghi $t1 = 0000 0000 0000 0000 0000 0000 0000 0100(2)
Gi tr trong $t1 + SingExtImm ca 3(10) = 0000 0000 0000 0000 0000 0000 0000 0111(2)
b) Sau khi addi thc hin xong, gi tr ca $t0 l 1
s tc thi l -3(10) = 1111 1111 1111 1101(2) (s 16 bit c du, biu din theo b 2)
SignExtImm ca 3(10) = 1111 1111 1111 1111 1111 1111 1111 1101 (2)
Gi tr thanh ghi $t1 = 0000 0000 0000 0000 0000 0000 0000 0100(2)
Gi tr trong $t1 + SingExtImm ca 3(10) = 0000 0000 0000 0000 0000 0000 0000 0001(2)
c) Lnh b bo li, do 32768 ra khi gii hn ca s 16 bits c du
3. Lnh addiu v addu
Addiu c c php v thc hin chc nng ging addi
Addu c c php v thc hin chc nng ging add
Tuy nhin, addiu v addu khng xt kt qu c b overflow hay khng, trong khi addi v add s bo khi overflow
xut hin
Syntax (c php):
V d:
a) addi $t0, $t1, 0x1
Gi s thanh ghi $t1 = 0x7fffffff
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Kt qu:
0x1 + 0x7fffffff = 0x80000000
Cng mt s dng vi mt s dng, kt qu ra mt s m => overflow
Khi lnh addi trn thc hin, mt thng bo overflow s xut hin
b) addiu $t0, $t1, 1
Gi s thanh ghi $t1 = 0x7fffffff
Kt qu: $t0 = 0x80000000
Khi lnh addi trn thc hin, thanh ghi $t0 vn nhn gi tr 0x8000000 v khng c bt k thng bo
overflow no xut hin.
4. Lnh sub v subu
Lnh sub c c php tng t nh lnh add, nhng
add thc hin php ton cng 2 thanh ghi, kt qu lu vo thanh ghi th 3
trong khi , sub thc hin php ton tr 2 thanh ghi, kt qu lu vo thanh ghi th 3
Lnh subu c c php v chc nng ging nh sub, nhng
subu khng xt n kt qu c b overflow hay khng
sub c xt n kt qu c b overflow hay khng; nu b overflow, s c thng bo
Syntax (c php):
Lu : khng c lnh subi (tc tr mt thanh ghi vi mt s tc thi) v c lnh addi v s tc thi trong addi c
th m hoc dng, nn subi khng cn thit.
Tng kt:
add, addi, addiu, addu

sub, subu
Nhn li ct ghi ch ca 6 lnh trn trong bng 1:
Ch c lnh addi v addiu c ghi ch (2) tc 2 lnh ny lm vic vi s tc thi, v s tc thi 16 bits ny
c m rng c du thnh thnh s 32 bits
(c i lm vic vi s tc thi)

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Cc lnh khng c u theo sau: add, addi, sub c thm ghi ch (1); Cc lnh c u theo sau nh: addiu, addu v
subu khng c ghi ch (1) tc cc lnh khng c u s bo khi c overflow, cn cc lnh c u s khng bo
khi c overflow
Nhm lnh so snh

slt / sltu
slti / sltiu
----------------------------------------------------------
5. Lnh slt/sltu
Hai lnh ny thuc nhm lnh R-format, c opcode l 0 v funct trong slt l 2ahex, trong sltu l 2bhex
Syntax:
ngha:
slt:
R[rd] = (R[rs] < R[rt])? 1 : 0

Kim tra xem gi tr trong thanh ghi rs c nh hn thanh ghi rt hay khng, nu nh hn th thanh ghi rd
nhn gi tr l 1; ngc li thanh ghi rd s nhn gi tr 0
sltu: ngha thc hin ging nh slt. Nhng vic kim tra gi tr thanh ghi rs c nh hn thanh ghi rt hay khng
trong lnh slt thc hin trn s c du, cn trong sltu thc hin trn s khng du
V d:
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a. slt $t0, $t1, $t2

Gi s $t1 = 0xfffffff1, $t2 = 0x00000073
Kt qu: $t0 = 1
Lnh slt so snh theo kiu so snh 2 s c du dng b 2
$t1 = 0xfffffff1 = 1111 1111 1111 1111 1111 1111 1111 0001(2) = -15(10)
$t2 = 0x00000073 = 01110011(2) = 115(10)
Vy $t1 < $t2 gi tr trong thanh ghi $t0 = 1
b. sltu $t0, $t1, $t2
Gi s $t1 = 0xfffffff1, $t2 = 0x00000073
Kt qu: $t0 = 0
Lnh slt so snh theo kiu so snh 2 s khng du
$t1 = 0xfffffff1 = 1111 1111 1111 1111 1111 1111 1111 0001(2) = 4294967281(10)
$t2 = 0x00000073 = 01110011(2) = 115(10)
Vy $t1 > $t2 gi tr trong thanh ghi $t0 = 0
6. Lnh slti/sltiu
Hai lnh ny thuc nhm lnh I-format. Opcode ca slti l ahex, opcode ca sltiu l bhex
Syntax:
ngha:
slti/sltiu:
R[rd] = (R[rs] < SignExtImm)? 1 : 0

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ngha 2 lnh ny ging nhau l so snh gi tr mt thanh ghi vi mt s tc thi, nu gi tr trong thanh ghi rs
nh hn s tc thi th thanh ghi rd nhn gi tr l 1; ngc li thanh ghi rd s nhn gi tr 0
S tc thi cho php trong lnh ny l s 16 bits. Trc khi so snh vi thanh ghi rs, s tc thi c m rng c
du (SignExtImm) thnh s 32 bits
slti khc sltiu l slti so snh 2 gi tr theo kiu c du dng b 2, trong khi sltiu so snh theo kiu s khng du
V d:
c. slti $t0, $t1, 0x73
Gi s $t1 = 0xfffffff1
Kt qu: $t0 = 1
Lnh slt so snh theo kiu so snh 2 s c du dng b 2
$t1 = 0xfffffff1 = 1111 1111 1111 1111 1111 1111 1111 0001(2) = -15(10)
S tc thi = 0x73 = 01110011(2)
SignExtImm(0x73) = 0000 0000 0000 0000 0000 0000 0111 0011(2) = 115(10)
Vy $t1 < $t2 gi tr trong thanh ghi $t0 = 1
d. sltiu $t0, $t1, 0x83
Gi s $t1 = 0xfffffff1
Kt qu: $t0 = 0
Lnh slt so snh theo kiu so snh 2 s khng du
$t1 = 0xfffffff1 = 1111 1111 1111 1111 1111 1111 1111 0001(2) = 4294967281(10)
$t2 = 0x83 = 10000011(2)
SignExtImm(0x83) = 1111 1111 1111 1111 1111 1111 1000 0011(2) = 4294967171(10)
Vy $t1 > $t2 gi tr trong thanh ghi $t0 = 0

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B. Cc lnh logic

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Nhm lnh logic:

and, andi
nor
or, ori
sll, srl
---------------------------------------------------------7. Lnh and
Lnh ny thuc dng R-format, c opcode l 0 v trng funct l 24 hex

Syntax (c php):
ngha: R[rd] = R[rs] & R[rt]

Thc hin and tng bit gi tr ca thanh ghi rs v rt vi nhau, kt qu lu vo thanh ghi rd
V d:
and $t0, $t1, $t2
Gi s gi tr ang cha trong thanh ghi $t1 l 0x12345678, gi tr ang cha trong thanh ghi $t2 l 0x0000000f
th
Kt qu: sau lnh add trn, gi tr trong thanh ghi $t0 l 0x00000008.
8. Lnh andi
Lnh ny thuc dng I-format, c opcode l 0xc

Syntax (c php):
ngha: R[rt] = R[rs] & ZeroExtImm

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Lnh ny thc hin and tng bit gi tr thanh ghi rs v mt s tc thi. S tc thi ang l s 16 bits, m rng
thnh s 32 bits theo kiu ZeroExtImm, tc 16 bits na cao cn thiu s in 0 vo. Sau thc hin and tng bit gi tr
ca thanh ghi rs v s tc thi c m rng thnh 32 bits vi nhau, kt qu lu vo thanh ghi rd
V d:
a) andi $t0, $t1, 0xffff
Gi s gi tr ang cha trong thanh ghi $t1 l 0x12345678.
Kt qu: sau lnh trn, gi tr thanh ghi $t0 = 0x00005678
S tc thi: 0xffff = 1111 1111 1111 1111 (2)
ZeroExtImm(0xffff) = 0000 0000 0000 0000 1111 1111 1111 1111 (2)
$t0 = $t1 & ZeroExtImm(0xffff) = 0x00005678
b) andi $t0, $t1, -3

Vn t ra l imm y c th l s m khng?
Mt s simulator chp nhn imm c th l m, v d s -3 trn s chuyn sang thnh b 2 ca s 16 bits,

sau m rng theo kiu ZeroExtImm
Mt s simulator khng chp nhn imm c th l m, v d s -3 trn a vo s bo li
Trong phm vi mn hc, chn trng hp th 2, khng chp nhp imm l m
9. Cc lnh or, ori, nor
or v nor cch vit tng t nh and, nhng thay v thc hin php ton and, 2 lnh ny s thc hin php ton or
hoc nor cho tng bit trong 2 thanh ghi, kt qu lu vo thanh ghi th 3
ori tng t nh andi, thc hin or mt thanh ghi v mt s tc thi 16 bits c m rng ZeroExtImm thnh 32 bits
10. Lnh sll/srl

sll
lnh dch tri s hc, thuc nhm lnh R, c opcode l 0 v funct 00hex

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lnh dch phi s hc, thuc nhm lnh R, opcode l 0 v funct l 02hex
Syntax (c php):
ngha:
sll: R[rd] = R[rt] << shamt
Thanh ghi rt dch tri shamt bit v kt qu lu vo thanh ghi rd ( << l k hiu ca php ton dch tri)
srl: R[rd] = R[rt] >>> shamt
Thanh ghi rt dch phi shamt bit v kt qu lu vo thanh ghi rd ( >>> l k hiu ca php ton dch phi)
V d:
a. sll $t0, $t1, 5
Gi s thanh ghi $t1 ang cha gi tr 0x12345678
Kt qu: sau lnh trn, thanh ghi $t0 = 0x468ACF00
Quy trnh lnh thc hin: lnh trn dch tri 5 bit thanh ghi $t1
$t1 = 0x12345678 = 0001 0010 0011 0100 0101 0110 0111 1000(2)
Dch tri 5 bit $t1 = 0100 0110 1000 1010 1100 1111 0000 0000(2) = 0x468ACF00
Vy kt qu thanh ghi $t0 = 0x468ACF00
b.
srl $t0, $t1, 5

Gi s thanh ghi $t1 ang cha gi tr 0x12345678
Kt qu: sau lnh trn, thanh ghi $t0 = 0x91A2B3
Quy trnh lnh thc hin: lnh trn dch phi 5 bit thanh ghi $t1
$t1 = 0x12345678 = 0001 0010 0011 0100 0101 0110 0111 1000(2)
Dch phi 5 bit $t1 = 0000 0000 1001 0001 1010 0010 1011 0011(2) = 0x91A2B3
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Vy kt qu thanh ghi $t0 = 0x91A2B3

Tng kt:
Cc lnh trong nhm:
and, andi
nor
or, ori
sll, srl
Trong ct ghi ch bng 1, ch ch c 2 lnh andi v ori c ghi ch (3) ghi ch zeroExtImm, tc cc lnh lm vic
vi s tc thi trong nhm ny khi m rng t s tc thi 16 bits sang s 32 bits th dng zeroExtImm, khng phi
SignExtImm nh nhm lnh s hc.

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C. Nhm lnh Nhnh/Nhy (Branch/Jump)

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Cc lnh xem xt:

beq, bne
j, jal, jr
Ngoi ra cn cc lnh thuc bng PsedoInstruction Set
blt/blte
bgt/bgte
Ch :
Cc lnh assembly c th chia vo 2 nhm: nhm lnh tht v nhm lnh gi
Nhm lnh tht: l cc lnh m thc cht processor s chy ng lnh

Nhm lnh gi: l cc lnh m khi thc thi tht s th lnh ny c chuyn thnh mt hoc mt s lnh thuc
nhm lnh tht (nhm lnh ny c t ra thun tin cho ngi lp trnh)
Cc lnh thuc nhm lnh PsedoInstruction Set l nhng lnh gi.

-------------------------------------------11. Lnh beq
lnh ny thuc nhm lnh I-format, c opcode 4hex

Syntax (c php):
Lnh beq c 2 cch vit cho v tr label, label c th l mt nhn c vit bng ch, hoc c th l s
V d 1: label vit bng ch:
V d 2: label vit bng s:
Chy on chng trnh sau:

beq $t1, $t2, label_A
add $s0, $t3, $t4
addi $s1, $t5, 3
label_A: or $t1, $t2, $t3
sub $t3, $t4, $t5
Chy on chng trnh sau:

beq $t1, $t2, 2
add $s0, $t3, $t4
addi $s1, $t5, 3
or $t1, $t2, $t3
sub $t3, $t4, $t5

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lnh beq kim tra gi tr ca $t1 v $t2, nu:

2 thanh ghi ny bng nhau, th lnh tip theo
c thc hin l lnh or $t1, $t2, $t3. Sau
khi or thc hin xong th lung lnh theo
sau s c thc hin (v d lnh sub tip
theo sau s c thc hin)
2 thanh ghi ny khng bng nhau, th lnh tip
theo c thc hin l lnh add $s0, $t3,
$t4. Sau khi add thc hin xong th lung
lnh theo sau s c thc hin (v d
chui cc lnh addi, or, sub tip theo sau s
c thc hin)
Trong v d ny, s 2 thay cho label_A

Lnh beq kim tra gi tr ca $t1 v $t2, nu:
2 thanh ghi ny bng nhau, th lnh tip theo
c thc hin l lnh cch beq 2 lnh, tc l
lnhor $t1, $t2, $t3. Sau khi or thc hin
xong th lung lnh theo sau s c thc
hin (v d lnh sub tip theo sau s c thc
hin)
2 thanh ghi ny khng bng nhau, th lnh tip
theo c thc hin l lnh add $s0, $t3,
$t4. Sau khi add thc hin xong th lung
lnh theo sau s c thc hin (v d
chui cc lnh addi, or, sub tip theo sau s
c thc hin)
Khi lp trnh, ta c th s dng mt trong 2 cch nh 2 v d trn. Nhng thc t lnh m b x l hiu l lnh
nh v d 2. Khi ta lp trnh theo nh v d 1 th lnh cng s c chuyn v nh v d 2 gi cho b x l.
Nh vy beq chun theo dng:
beq rs, rt, label/imm
S tc thi label/imm ny chnh l s lnh m lnh beq hin ti cch lnh s nhy ti bao nhiu, c lu vo 16 bits
ca offset
ngha:
if(R[rs] = = R[rt]) PC = PC + 4 + BranchAddr
Nu gi tr thanh ghi rs bng rt th chng trnh nhy ti lnh m cch lnh beq ang xt l imm lnh, tc
a ch con tr/thanh ghi PC s chuyn thnh PC + 4 + imm*4 (i vi trng hp mi lnh lu trong mt word
4 bytes) = PC + 4 + BranchAddr
BranchAddr = imm * 4 (i vi trng hp mi lnh lu trong mt word 4 bytes)
12. Lnh bne:
Cch vit tng t nh beq, nhng ngha tri ngc:
beq: kim tra nu 2 thanh ghi bng nhau th nhy n lnh mong mun
bne: kim tra nu 2 thanh ghi khng bng nhau th nhy n lnh mong mun
13. Lnh bge/bgt/ble/blt

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Ngoi ra, cn mt s lnh so snh v nhy khc (trong bng psedoInstruction Set)
bge $t1, $t2, label Nhy ti label thc hin lnh nu thanh ghi $t1 >= $t2
bgt $t1, $t2, label Nhy ti label thc hin lnh nu thanh ghi $t1 > $t2
ble $t1, $t2, label Nhy ti label thc hin lnh nu thanh ghi $t1 <= $t2
blt $t1, $t2, label Nhy ti label thc hin lnh nu thanh ghi $t1 < $t2
14. Lnh j lnh nhy khng iu kin
Lnh thuc nhm lnh J-format, c opcode 2hex

Syntax (c php):
V d:
Chy on lnh sau trn MARS 4.4:
beq $t1, $t2, label
j label
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
label: add $t1, $t2, $t3
Kt qu: sau khi ti lnh j label, chng trnh s nhy n lnh add cui cng s thc tip
Qu trnh thc hin lnh:
Khi bin dch on lnh trn trong MARS 4.4, ta c hnh nh sau:

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Ct Source l ct cha cc lnh t chng trnh m ta vit, ct ny c th cha mt s lnh gi (pseudo-code); Ct basic
l ct cha cc lnh m thc s processor s chun b chy.
Lnh j label khi tht s chy s chuyn thnh j 0x0040001c
Ch : Lnh ny ch cho nhy trong phm vi 256 MB = 228 byte
15. Lnh jal
Lnh ny thuc nhm J-format, c opcode l 3hex

Sa li thnh:
Syntax (c php):
R[31] = PC + 4
ngha:
R[31] = PC + 4; PC = JumpAddr
Lnh ny thc hin vic nhy ging y nh lnh j; nhng a ch ca lnh ngay sau lnh jal c lu vo thanh ghi
31 (thanh ghi ra) trc khi nhy
Lnh ny nhm phc v cho vic gi mt hm con. Theo quy tc, sau khi hm con c gi v thc hin xong s
quay tr v chng trnh chnh. Do vic lu li a ch ca lnh ngay sau jal vo ra nhm lu li a ch quay v
ny

Lu hnh ni b
Page 24
V d:
Chy on lnh sau trn MARS 4.4:
jal label
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
add $t1, $t2, $t3
label: add $t1, $t2, $t3
Khi bin dch:
Ta thy:
jal label c chuyn thnh jal 0x0040018 (gi tr target trong format lnh lc ny s bng 0x0040018)
trc khi gi cho processor
a ch ca lnh ny hin ti l 0x00400000
Khi chng trnh chy:
-
PC = 0x00400000
u tin, lnh theo sau jal c lu li vo thanh ghi ra ra = PC + 4 = 0x00400004
Sau lnh s nhy n lnh th 7, tc PC ang bng = 0x00400000 s chuyn thnh PC= target/JumpAddr
= 0x0040018

Lu hnh ni b
Page 25
$ra = 0x00400004
16. Lnh jr
Lnh thuc nhm lnh R (nhng kh c bit - ch quan tm vng thanh ghi rs), c opcode 0 v funct 08 hex
Syntax (c php):
ngha: PC = R[rs]
Nhy ti lnh c a ch ang cha trong thanh ghi rs
V d:
Lu hnh ni b
Page 26
Chy on chng trnh sau trong MARS

jr $s1
add $t1, $t2, $t3
addi $t1, $t2, 3
or $t1, $t2, $t3
xor $t1, $t2, $t3
addi $t1, $t2, 1
sub $t1, $t2, $t3
Khi chng trnh c bin dch:
Gi s lc ny gi tr trong thanh ghi $s1 = 0x0040000c, lnh or s c thc hin ngay sau jr khi chng trnh chy.
Gi s lc ny gi tr trong thanh ghi $s1 = 0x00400018, lnh sub s c thc hin ngay sau jr khi chng trnh chy.
Tng kt
Nhm lnh:
beq, bne
j, jal, jr
Xt nhm 4 lnh: beq, bne, j, jal c cu trc nh v d sau:

beq/bne $t1, $t2, s_16_bits/label
j/jal label
ng trn phng din ngi lp trnh, ta ch cn quan tm:
Lnh m beq/bne nhy ti c th c a vo bng cch gn label hoc dng s_16_bits,
s_16_bits trong beq/bne l s lnh cch lnh s nhy ti bao nhiu.
Lnh m j/jal nhy ti ch c th c a vo bng cch gn label
Lu hnh ni b
Page 27
ng trn phng din thit k processor, nh th no processor tnh ton ra a ch ca lnh tip theo cn nhy ti
da vo cc label hoc cc s_16_bits ny?
Nhn li bng 1 ta thy beq/bne c ghi ch (4), cn nhm j/jal c ghi ch (5), trong khi jr khng c ghi ch g c:
Trong ct ngha ca lnh beq/bne ta thy: PC = PC + 4 + BranchAddr

Trong ct ngha ca lnh j/jal ta thy: PC = JumpAddr
Nh trnh by trong phn trc, lnh cn nhy ti trong beq/bne c th a vo l label hoc s tc
thi 16 bits - ch lnh s nhy n cch lnh hin ti bao nhiu lnh. Nu ngi lp trnh a vo bng label,
th compiler s t tnh ton ra s lnh s nhy ti cch lnh hin ti bao nhiu. Tm li:
s tc thi trong lnh beq/bne l s lnh cch lnh cn nhy ti bao nhiu, nn BranchAddr c tnh
bng cch ly s tc thi 16 bits ny nhn 4, tc dch tri 2 bits ri m rng theo kiu c du thnh s 32 bits, sau
c cng vi PC + 4. Cch vit trong ghi ch (4) tng t ngha ny
{14{immediate[15]}, immediate, 2b0}: l s 32 bits
14 bits cn li y nh
bit th 15 ca s tc
thi
16 bits tip theo, t bit th

2 t bit th 17) l s tc
thi
2 bits u tin (bit 0 v 1) l

00 (do s tc thi c dch
tri 2 bits)
Trong khi i vi lnh j/jal, ngi lp trnh a vo nhn ca a ch cn nhy ti, nhn ny chuyn thnh a
ch tng ng vi nhn (ch khng cch lnh nhy ti bao nhiu lnh nh beq). JumpAddr c tnh nh sau:
{PC + 4[31:28], address, 2b0}: l s 32 bits

Ly 4 bit cao
nht ca PC + 4
lm 4 bit cao
nht ca
JumpAddr
26 bits tip theo (t

bit th 2 t bit th
27) l vng address
trong m my ca
lnh
2 bits u tin (bit

0 v 1) l 00 (dch
tri address i 2
bit)
D. Nhm lnh memory-instruction

Lu hnh ni b
Page 28

Lu hnh ni b
Page 29
Cc lnh xt:
lbu, lhu, lui, lw
sb, sh, sw
Ch : lnh ll v sc b qua
-------------------------------------------17. Lnh lw
Lnh thuc dng I-format, c opcode = 23hex

Syntax (c php):
Address = Offset(rs)
ngha: R[rt] = M[R[rs] + SingExtImm]

Ly gi tr trong thanh ghi rs cng vi s tc thi ang lu trong offset (s tc thi ny ny c m rng c du
thanh 32 bits) ta c a ch ca t nh cn ly d liu. D liu ca t nh ny s c ly lu vo thanh ghi
rt
Lu :
M[X]: l ly gi tr ca t nh ti a ch X
V d:
lw $t1, 4($t0)
gi s $t0 = 0x10010000
v t nh ti a ch 0x10010004 c gi tr 0x12345678
Lnh lw thc hin vic load mt t nh (word) ti a ch $t0 + 4 = 0x10010004 vo thanh ghi $t1
Kt qu: $t1 = 0x12345678
18. Lnh lbu/lb
lbu
Lnh thuc nhm lnh I-format, c opcode = 24hex

Lu hnh ni b
Page 30
Syntax (c php):
ngha:
Address =
Offset(rs)
R[rt] = {24b0, M[R[rs] + SignExtImm](7:0)}
Khng ging lw l load ht ton b 1 t nh vo thanh ghi rt, lnh ny ch load v 1 byte u tin trong t nh
vo rt
V rt l thanh ghi 32 bits nn 24 bit cn li ca rt c 2 kiu m rng du:
lb: sign-ext
lbu: zero-ext
V d:
a. lbu $t1, 8($t0)
gi s $t0 = 0x10010000
T nh ny cha 4 bytes:
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
78
Lnh lbu thc hin vic load mt byte vo thanh ghi $t1, v byte c load l byte 0. Nhng do thanh ghi $t1 l
32 bits, nn 24 bits cn li l 0
Kt qu: $t1 = 0x00000078
b. lb $t1, 8($t0)
gi s $t0 = 0x10010000
v t nh ti a ch 0x10010008 c gi tr 0x123456f8
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
f8
Lnh lb thc hin vic load mt byte vo thanh ghi $t1, v byte c load l byte 0. Nhng do thanh ghi $t1 l 32
bits, nn 24 bits cn li trong lnh ny c m rng c du theo bit ln nht ca byte c load v
Kt qu: $t1 = 0xfffffff8
Lu hnh ni b
Page 31
19. Lnh lhu/lh
Lnh thuc nhm lnh I-format, c opcode 25hex

Syntax (c php):
ngha:
Address =
Offset(rs)
R[rt] = {16b0, M[R[rs] + SignExtImm](15:0)}
Lnh ny ch load v 2 byte u tin (na word thp) trong t nh vo rt

V rt l thanh ghi 32 bits nn 16 bit cn li ca rt c 2 kiu m rng du:
lh: sign-ext
lhu: zero-ext
V d:
a. lhu $t1, 8($t0)
gi s $t0 = 0x10010000
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
78
Lnh lhu thc hin vic load 2 byte vo thanh ghi $t1, v byte c load l byte 0 v byte 1. Nhng do thanh ghi
$t1 l 32 bits, nn 16 bits cn li l 0
Kt qu: $t1 = 0x00005678
b. lh $t1, 8($t0)
gi s $t0 = 0x10010000
v t nh ti a ch 0x10010008 c gi tr 0x123456f8
Lu hnh ni b
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Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
f8
Lnh lh thc hin vic load 2 byte vo thanh ghi $t1, v byte c load l byte 0 v byte 1. Nhng do thanh ghi
$t1 l 32 bits, nn 16 bits cn li trong lnh ny c m rng c du theo bit ln nht ca byte c load v
Kt qu: $t1 = 0x000056f8
c. lh $t1, 8($t0)
gi s $t0 = 0x10010000
v t nh ti a ch 0x10010008 c gi tr 0x12348cde
Byte 4
12
Byte 2
34
Byte 1
8c
Byte 0
de
Lnh lh thc hin vic load 2 byte vo thanh ghi $t1, v byte c load l byte 0 v byte 1. Nhng do thanh ghi
$t1 l 32 bits, nn 16 bits cn li trong lnh ny c m rng c du theo bit ln nht ca byte c load v
Kt qu: $t1 = 0xffff8cde
20. Lnh sw
Lnh thuc nhm lnh I-format, c opcode = 2bhex

Syntax (c php):
ngha: M[R[rs] + SignExtImm] = R[rt]

Lu gi tr thanh ghi rt vo t nh c a ch c tnh bng gi tr thanh ghi rs cng vi offset (offset c m
rng c du thnh s 32 bits trc khi cng)
V d:
sw $t1, 8($t0)
gi s $t0 = 0x10010000
$t1 = 0x87654321
Lu hnh ni b
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Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
78
Lnh sw thc hin vic lu gi tr ca thanh ghi $t1 vo t nh c a ch = $t0 + 8 = 0x10010008

Gi tr ca t nh ti a ch 0x10010008 sau khi lnh trn thc hin l:
Byte 4
87
Byte 2
65
Byte 1
43
Byte 0
21
21. Lnh sb
lnh thuc nhm I-format, c opcode = 28hex

Syntax (c php):
ngha: M[R[rs] + SignExtImm](7:0) = R[rt](7:0)

Ly byte thp nht ca trong thanh ghi rt lu vo byte thp nht ca t nh c a ch c tnh bng gi tr thanh
ghi rs cng vi offset (offset c m rng c du thnh s 32 bits trc khi cng)
V d:
sb $t1, 8($t0)
gi s $t0 = 0x10010000
$t1 = 0x87654321
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
78
Lnh sb thc hin vic lu byte 0 ca thanh ghi t1 (0x21) vo byte 0 ca t nh ti a ch 0x10010008. Nn sau
lnh trn, hnh nh t nh:
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
21

Lu hnh ni b
Page 34
22. Lnh sh
lnh thuc nhm I-format, c opcode = 29hex

Syntax (c php):
ngha: M[R[rs] + SignExtImm](15:0) = R[rt](15:0)

Ly 2 byte thp nht trong thanh ghi rt (na thp) lu vo 2 byte thp nht ca t nh c a ch c tnh bng
gi tr thanh ghi rs cng vi offset (offset c m rng c du thnh s 32 bits trc khi cng)
V d:
sh $t1, 8($t0)
gi s $t0 = 0x10010000
$t1 = 0x87654321
Byte 4
12
Byte 2
34
Byte 1
56
Byte 0
78
Lnh sh thc hin vic lu byte 0 v byte 1 ca thanh ghi t1 (0x4321) vo byte 0 v byte 1 ca t nh ti a ch
0x10010008. Nn sau lnh trn, hnh nh t nh:
Byte 4
12
Byte 2
34
Byte 1
43
Byte 0
21
23. Lnh lui
Lnh thuc I-format, c opcode l fhex

Syntax (c php):

Lu hnh ni b
Page 35
ngha: R[rt] = {imm, 16b0}

Gn s tc thi 16 bits vo na cao ca thanh ghi rt, na thp a 0 vo
V d:
a. lui $t1, 0x1234
Kt qu: $t1 = 0x12340000
b. lui $t1, 0x12345
bo li do s tc thi trn qu s 16 bits
Ngoi ra cn 2 lnh thuc nhm PseudoInstruction set: li v move
24. Lnh li
ngha: a mt s tc thi (32 bits) vo mt thanh ghi
V d:
li $t0, 0x12345
Kt qu: $t0 = 0x00012345
Lu :
S a vo lui ch c php l s 16 bits, cn s a v li c th ln n 32 bits
Lnh li ny thc cht l lnh gi, lnh ny c chuyn thnh 2 lnh (lui v or) khi processor chy tht s:

Lu hnh ni b
Page 36
25. Lnh move

ngha: sao chp/di chuyn gi tr t thanh ghi ny sang thanh ghi kia
V d:
move $t1, $t2
Gi s $t1 = 0x12345678
$t2 = 0x87654321
Khi lnh trn thc thi, gi tr thanh ghi $t2 c a vo thanh ghi $t1
Kt qu sau khi chay:
$t1 = 0x87654321
$t2 = 0x87654321
Ch :
Lnh li ny thc cht l lnh gi, lnh ny c chuyn thnh lnh addu khi processor chy tht s (thc hin
vic cng thanh ghi $t2 vi thanh ghi zero, kt qu np vo thanh ghi $t1:

Lu hnh ni b
Page 37

Lu hnh ni b
Page 38
CC LNH ASSEMBLY TRONG KHI ARITHMETIC CORE INSTRUCTION SET

Cc lnh assembly nm bng con bn phi ca bng s 1 cha cc lnh s hc phc tp hn so vi cc lnh bn bng
con tri.
Do trong bng ny cha mt s lnh lm

vic vi s du chm ng (floating-point),
nn lnh no c format c F pha trc
tc l lnh lm vic vi s du chm ng
Do cc lnh lm vic vi s floating-point c format

lnh hi khc so vi R-format hoc I-format chun
(C thm trng fmt: phn bit lm vic vi s
floating-point chnh xc n hay chnh kp)
V d: lnh bclt c gi tr ct ny l 11/8/1/ tc
opcode ca lnh = 11hex, fmt = 8 hex, ft = 1 hex v funct
khng quan tm

Lu hnh ni b
Page 39
A. Cc lnh nhn v chia

Lu hnh ni b
Page 40
Cc lnh assembly cn khi thc hin php nhn v chia:
Nhn: mult/multu
Chia: div/divu
Hai lnh h tr: mfhi/mflo
Lnh mult/multu
Hai lnh ny thuc nhm lnh R-format, c opcode l 0. Lnh mult c funct l 18, lnh multu c funct l 19
Syntax:
ngha:
{Hi, Lo} = R[rs] * R[rt]
Gi tr trong thanh ghi rs (s 32 bits) nhn vi gi tr trong thanh ghi rt (s 32 bits), kt qu l s 64 bits. 32 bits
thuc na thp ca kt qu c lu trong thanh ghi Lo, v 32 bits thuc na cao ca kt qu c lu trong
thanh ghi Hi
Ch : Hi v Lo l 2 thanh ghi ph thm cho processor khi thc hin php ton nhn chia. V cc thanh ghi u l 32 bits,
m kt qu php ton nhn l 64 bits, nn phi dng 2 thanh ghi tm ny ghp li
mult: nhn 2 s c du
multu: nhn 2 s khng du
V d:
a. mult $t1, $t2
Gi s $t1 = 0x00008765
$t2 = 0x12345678
Kt qu:
$hi = 0x000009a0
$lo = 0xc83f6558

Lu hnh ni b
Page 41
b. mult $t1, $t2

Gi s $t1 = 0x80008765
$t2 = 0x12345678
Kt qu:
$hi = 0xf6e5de64
$lo = 0xc83f6558
Tc $t1*$t2 = -0x91A219B37C09AA8 (xt trn s c du dng b 2)
Kim tra li:
$t1 = 0x80008765 = 1000 0000 0000 0000 1000 0111 0110 0101(2)
= -0x7FFF789B
$t2 = 0x12345678
$t1 * $t2 = -(0x7FFF789B x 0x12345678) = -0x91A219B37C09AA8
= 0xF6E5DE64C83F6558 (b 2)

Lu hnh ni b
Page 42
c. multu $t1, $t2

Gi s $t1 = 0x80008765
$t2 = 0x12345678
Kt qu:
$hi = 0x091a34dc
$lo = 0xc83f6558
Kim chng kt qu:
multu thc hin php nhn 2 s dng khng du
$t1 = 0x80008765 = 20000103545(10)
$t2 = 0x12345678 = 2215053170(10)
$t1 x $t2 = 20000103545(10) x 2215053170(10) = 44321515631017662530(10) = 0x91A34DCC83F6558

Lu hnh ni b
Page 43
Chia: div/divu
Hai lnh ny thuc nhm lnh R-format, c opcode l 0. Lnh div c funct l 1ahex, lnh divu c funct l 1bhex
Syntax:

Lu hnh ni b
Page 44
ngha:
rdest, rsrcl v src2 l 3 thanh ghi.
Hai lnh trn ly gi tr trong thanh ghi rsrcl chia cho src2, thng s t vo thanh ghi rdest. ng thi thanh ghi
Lo cng cha thng s ging than ghi rdest v thanh ghi Hi cha phn d.
div: chia 2 s c xt trn

divu: chia 2 s khng xt trn
V d:
a.
div $t1, $t2, $t3

gi s $t2 = 0x6, $t3 = 0x5
Kt qu: $t1 = 0x1
$Lo= 0x1
$Hi = 0x1
a thm v d kim chng trng hp trn v khng trn (div/divu)

Lu hnh ni b
Page 45
CC LNH ASSEMBLY CHO S DU CHM NG (floating-point number)

Lu hnh ni b
Page 46
Nhm lnh s hc:

Cng
add.s
add.d
Tr
sub.s
sub.d
Nhn
mul.s
mul.d
Chia
div.s
div.d
Ch : Cc lnh lm vic vi s floating-point lm vic trn 32 thanh ghi f
----------------------------------------
Cc lnh ny thuc nhm lnh FR, c opcode u bng 11hex

Lnh add c funct bng 0, lnh sub c funct bng 1 hex, lnh mul c funct bng 2 hex, lnh div c funct bng 3 hex
Lu hnh ni b
Page 47
Ch : cc lnh .s l lm vic vi chnh xc n, c trng fmt lun bng 10 hex; cc lnh .d l lm vic vi
chnh xc kep, c trng fmt lun bng 11hex
add.s
Syntax
ngha:
F[fd] = F[fs] + F[ft]
Gi tr trong thanh ghi fs cng vi gi tr trong thanh ghi ft, tng lu vo thanh ghi fd
add.d
Syntax
ngha:
{F[fd], F[fd+1]} = {F[fs], F[fs+1]} + {F[ft], F[ft+1]}
S tc thi lc ny do biu din trong chnh xc kp nn cn 64 bits, tc phi cn 2 thanh ghi f lin tc nhau.
Lnh add.d s thc hin vic cng gi tr ca s floating point chnh xc kp ang lu trong
Gi tr trong thanh ghi fs cng vi gi tr trong thanh ghi ft, tng lu vo thanh ghi fd

Lu hnh ni b
Page 48

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Khoa K thut My tnh Trng i hc Cng Ngh Thng Tin HQG Tp.

Mt s lnh assembly MIPS c bn

GV Bin son: TTNNguyet-Khoa KTMT-UIT

Bng 1. Tm tt cc lnh MIPS c bn (tham kho [1])

Lnh thc hin chc

(1) May cause overflow exception

GV Bin son: TTNNguyet-Khoa KTMT-UIT

opcode v funct cho

C th hiu n gin, nu s tc thi l dng th 16 bits ca na cao thm vo s l 0, cn

Vit theo cu trc ca Verilog

(4) BranchAddr = {14{immediate[15]}, immediate, 2b0}

S ghi bnh thng s c hiu l ang trong h 10

B x l cha 32 thanh ghi hot ng, mi thanh ghi 32 bits.

Bng 2. M t cc thanh ghi (trch t bng 1)

GV Bin son: TTNNguyet-Khoa KTMT-UIT

Thanh ghi no Yes l nhng

Tng t nh thanh ghi, khi lm vic vi b nh c 2 vn cn quan tm: gi tr v a ch

Hnh 3. Mt v d v hnh nh b nh t phn mm m phng (simulator) MARS 4.4

GV Bin son: TTNNguyet-Khoa KTMT-UIT

GV Bin son: TTNNguyet-Khoa KTMT-UIT

-------------------------------------------1. Lnh add

Lnh ny thuc dng R-format, c opcode l 0 v trng funct gi tr l 20 hex

ngha: R[rd] = R[rs] + R[rt]

Lnh ny thuc dng I-format, c opcode 8hex

ngha: R[rt] = R[rs] + SignExtImm

GV Bin son: TTNNguyet-Khoa KTMT-UIT

3. Lnh addiu v addu

Addiu c c php v thc hin chc nng ging addi

Addu c c php v thc hin chc nng ging add

add, addi, addiu, addu

GV Bin son: TTNNguyet-Khoa KTMT-UIT

Nhm lnh so snh

R[rd] = (R[rs] < R[rt])? 1 : 0

a. slt $t0, $t1, $t2

R[rd] = (R[rs] < SignExtImm)? 1 : 0

GV Bin son: TTNNguyet-Khoa KTMT-UIT

GV Bin son: TTNNguyet-Khoa KTMT-UIT

Nhm lnh logic:

Lnh ny thuc dng R-format, c opcode l 0 v trng funct l 24 hex

ngha: R[rd] = R[rs] & R[rt]

Lnh ny thuc dng I-format, c opcode l 0xc

ngha: R[rt] = R[rs] & ZeroExtImm

b) andi $t0, $t1, -3

Mt s simulator chp nhn imm c th l m, v d s -3 trn s chuyn sang thnh b 2 ca s 16 bits,

10. Lnh sll/srl

GV Bin son: TTNNguyet-Khoa KTMT-UIT

srl $t0, $t1, 5

Vy kt qu thanh ghi $t0 = 0x91A2B3

GV Bin son: TTNNguyet-Khoa KTMT-UIT

C. Nhm lnh Nhnh/Nhy (Branch/Jump)

GV Bin son: TTNNguyet-Khoa KTMT-UIT

GV Bin son: TTNNguyet-Khoa KTMT-UIT

Cc lnh xem xt:

Nhm lnh tht: l cc lnh m thc cht processor s chy ng lnh

Cc lnh thuc nhm lnh PsedoInstruction Set l nhng lnh gi.

lnh ny thuc nhm lnh I-format, c opcode 4hex

V d 2: label vit bng s:

Chy on chng trnh sau: