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Chapter 6-Shift Register
Chapter 6-Shift Register
Chapter 6-Shift Register
LEARNING OUTCOME
Understand the concepts and
applications of registers and
shift registers.
SHIFT REGISTER
Introduction
Shift register consists of an arrangement of
flip-flops and are important in applications
involving the storage and transfer data in a
digital system, it is a type of sequential logic
circuit, mainly for storage of digital data
.
Most of the registers possess no
characteristic internal sequence of
states. All the flip-flops are driven by a
common clock, and all are set or reset
simultaneously.
LOGIC CIRCUIT
Input data
clk
Q1
Q0
SISO
The serial in/serial out
shift register data
serially, that is one bit at
a time on a single bit. It
produces the stored
information on its
output also in serial
form.
SIPO
o
PISO
A four-bit parallel in - serial out shift register is
shown below
the mode control line is taken to LOW and the
data is clocked in. The data can be shifted when
the mode control line is HIGH as SHIFT is active
high.
The register performs right shift operation on the
application of a clock pulse,
PIPO
TEST
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RING COUNTERS
A ring counter is basically a circulating shift
register in which the output of the most
significant stage is fed back to the input of the
least significant stage.
. The output of each stage is shifted into the next
stage on the positive edge of a clock pulse.
JOHNSON COUNTERS
counter the complement of the output of the last
flip-flop is connected back to the D input of the
first flip-flop (it can be implemented with other
types of flip-flop as well).
The 4 bit sequence has a total of eight states or
patterns and that the 5 bit sequence has a total
of ten states. In general, a Johnson counter will
produce a modulus of 2n, where n is the number
of stages in the counter.
4 stage and 5 stage Johnson counter are shown in
figure below.
AN ARITHMETIC OPERATION
Qa
Serial in
Qb
clk
Qc
Qd
AN ARITHMETIC OPERATION
original number
shift #1
shift #2
Binary
decimal
00010110
22
00101100
44
01011000
88
Serial in
Serial out
D
Qa
Qb
clk
Qc
Qd
binary
decimal
01011000
88
00101100
44
00010110 22
TEST
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