EEL 4768 Computer Architecture

ECE Department, UCF

Homework 3

Due: October 6, 2016 (before the class)

Please write legibly or type. Show your work to the extent possible.
1. (20 points) A given processor has 64 registers, uses 16-bit immediate, and has 112 instructions in its ISA. In a given
program, 25% of the instructions take one source register and have one destination register; 30% of the instructions
have two source register and have one destination register; 20% of the instructions have one source register and have
one destination register, and take an immediate source operand as well, and the remaining 25% have one immediat e
source operand and one destination register.
i) For each of the four types of instructions, how many bits and bytes are required if a variable -length
instruction set encoding is used? Explain your answer. Assume that ISA requires that all instructions be a
multiple of 8 bits in length.
ii) For each of the four types of instructions, how many bits and bytes are required if a fixed -length instruction
set encoding is used? Explain your answer. Assume that ISA requires that all instructions be a multiple of 8
bits in length.
iii) How much less memory does the program take up if a variable-length instruction set encoding is used as
opposed to a fixed-length encoding? The instruction length is still a multiple of 8 bits in the fixed-lengt h
encoding.
iv) Discuss about the advantages and disadvantages of these two different encoding schemes.
For the MIPS64 questions below, please use EduMIPS64 simulator. Please download the simulato r from
http://www.edumips.org and use it for developing and testing your code for the questions below. Please note that this
simulator does not support all the instructions in the MIPS64 instruction set. The detailed list of the supported
instructions is available through: https://github.com/lupino3/edumips64/releases/download/v1.2.2/edumips64 -1.2.2manual-en.pdf Please check the EduMIPS64 website for further details and examples.
2. (20 points) Translate the following code into MIPS64 assembly language:
Addresses: a@800, b@808, c@816
double a, b, c
a = (c + b) * 7.14;
3. (20 points) Translate the following code into MIPS64 assembly language:
Addresses: a@800, b@808, c@816
long int a, b,
double c
c = (double) (b - a) * 6.63;
4. (20 points) Translate the following code into MIPS64 assembly language:
Addresses: i@800, a@808
int i, a
for (i=20; i>0; i--)
a = a * 2;
5. (20 points) Translate the following code into MIPS64 assembly language:
Addresses: a@800, b@808, c@816
long int a, b, c;

if( a!=b && a>24 )

c = 1;
else
c = 0;

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