http://www.paper.edu.

cn

DSP

100876
E-mailxiongpengpeng@tom.com

DSP FPGA
DSP
, WiMAX802.16e

,, DSP picoArrayAE

1.

multirate

[1]
[2]

2.

FIR

[3]
M M

h( n) M hk ( n)

h( n + k )
hk (n) =
0

n = M

h( n)
M 1

h(n) = hk (n k )
k =0

1 2

-1-

http://www.paper.edu.cn

1
y (n) D 1 D

2
y (n) I
2 I

3.
3.1 DSP

IntelAMDIBM

PicoChip picoArray
Connex Technology CA1024 Rapport 1025 CPU
PicoChip picoArray

-2-

http://www.paper.edu.cn

3.2 picoArray
picoArray (MIMD)
picoBus picoArray
16 TI Freescale
DSP 1GHz picoArray 300
16 picoArray
160MHz 100GIPS1GIPS= 10

3 picoArray [4] P
Array ElementAEAE
STANCTRLMEM
AE

3 picoArray

3.3

802.16e 2 4 5

15 4 4
yn

yn +1 , yn + 2 , yn +3
yn + 4 , yn +5 , yn + 6 , yn + 7 x
c y

4 4
-3-

http://www.paper.edu.cn

4 4
3.3.1 2
FIR
2 2

AE
acc STAN AE 40 acc0 acc1
acc0 acc1 5 2

DEMUX
Quadrature

Inphase

I0
FIR

I1
FIR

Q0
FIR

Q1
FIR

MUX

52
5 InphaseQuadrature
5 DEMUX

PC102 160MHz WiMAX802.16e

22.4Msample/s sample cycle 160 = 7.143

22.4

48 2 sample 25 1
picoArray 26 cycles

26
= 4
7.143

5 I0 FIR
5 I1 FIR

6 x c y

-4-

http://www.paper.edu.cn

62
4 I0I1Q0Q1 AE
5 MUX AE 2

3.3.2 4
4 4

2
AE acc0 acc1
AE

2
3.3.2 5
5 AE
AE
AE 3
AE 3 AE AE
AE
40 acc 32

104
21

7
7 7
7
AE IQ
5

-5-

http://www.paper.edu.cn

4 acc0 acc1
acc0 7 x c
y

75

3.4

DEMUX
Quadrature

Inphase

I0
FIR

I1
FIR

Q1
FIR

Q1
FIR

MUX

2
2
2
9 x c
y

-6-

http://www.paper.edu.cn

92

4.
DSP

1 1

2
AE 5

10

Y
2

DSP

10
-7-

http://www.paper.edu.cn

5.
DSP
WiMAX802.16e 2 4 5

WiMAX802.16e

DSP

[1] M2001
[2] M2003
[3] Alan. V. Oppenheim, Ronald W. Schafer, John R. Buck M]
2001
[4] picoChip Designs LtdpicoTools Documentation2005

Design of Interpolation and Decimation Filters on

Multi-core DSP Processor
Xiong Pengpeng
School of Telecommunication Engineering, BUPT, Beijing, PRC (100876)
Abstract
Interpolation and decimation filters are widely used in modern communication system. But the filters
based on traditional DSP and FPGA have the disadvantages of low data rate and consuming more
resources. In order to get over these disadvantages, this paper proposes a new implementation method
for rate variable filter. Then it takes the filters in WiMAX802.16e system as an example, give the
flowchart of the implantation in detail. Finally it turns out that the new method makes a good tradeoff
between processing rate and resource consumption.
Keywords: interpolation, decimation, polyphase filter, multi-core DSP processor, picoArray, AE

1983
WiMAX

-8-