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Fault Tolerance & Reliability

CDA 5140
Chapter 2 Cyclic Polynomial Codes

cylic code: special type of parity check code such that every cyclic shift
of codeword is a codeword

for example, if (cn-1, cn-2, . . . c0) is a codeword so is (cn-2, cn-3, . . . c0, cn-1)

cyclic property best captured using polynomial algebra over a finite field, in
particular binary finite field

for code word c(X) = (cn-1, cn-2, . . . c0) represent it as polynomial


cn-1Xn-1 + cn-2Xn-2 + . . . + c1X1 + c0

two most important concepts are use of polynomial division and the
operation of modulo a polynomial

for f(X) and g(X) two polynomials with the latter of at least degree 1, then
the Euclid division algorithm states that there are two polynomials q(x), the
quotient, and r(x), the remainder such that
f(X) = q(X)g(X) + r(X)
and degree of r(x) is less than degree of g(X)
and further state that r(x) is congruent to f(X) modulo g(x), i.e.
r(X) = f(X) [mod g(X)]

for cyclic codes most important modulus is Xn 1 which implies that


1 = Xn [mod Xn 1]

thus Xc(x) [mod Xn 1] is a code word since


Xc(X) = cn-1Xn + cn-2Xn-1 + . . . + c1X2 + c0X
and reducing mod Xn 1, then Xn = 1
giving Xc(X) = cn-2Xn-1 + cn-3Xn-2 + . . . + c1X2 + c0X + cn-1

consequently for c(X) a codeword, so is Xi c(X)

- thus

i Xi c(X) = f(X) c(X)

where f(X) has binary coefficients

- just as can generate any (n,m) parity-check code using the generator matrix G,
can also generate the code words for (n,m) cyclic code by the generator
polynomial g(X) with the following properties:
- g(X) is unique lowest-degree nonzero code polynomial with coefficient 1
in highest-degree term
- degree of g(X) is n m
- each of the 2m code words of binary cyclic code is multiple of g(X) of
form
i Xi g(X), 0 < i < m-1
- set of code polynomials g(X), Xg(X), . . . Xm-1g(X) is a linearly
independent set and all 2m code words can be generated from these m
code words
- g(X) must be a factor of Xn 1
Example:
-

consider the (7,4) cyclic code with generating polynomial


g(X) = X3 + X + 1
has 3 check digits and the four linearly independent code words are:
polynomials

7-tuples

X3 + X + 1
X4 + X2 + X
X5 + X3 + X2
X6 + X4 + X3

0001011
0010110
0101100
1011000

and all 16 codewords are linear combinations of these

for a data polynomial, of degree m-1,


d(X) = dm-1Xm-1 + dm-2Xm-2 + . . . + d1X1 + d0
the data digits are dm-1, dm-2, . . . d0

the code words can be generated by


c(X) = d(X) g(X)
which can be done by means of the following shift register circuit where
the register cells are initialized to all zeroes:

d(X)

g2

gn-m

g1

g0

c(X)

Nonsystematic Encoding using Shift Register

digit dm-1 is fed in first, then dm-2 and so on until d0 followed by (n-m)
zeroes

the circled gi represent multiplication by gi (either 0 or 1) and the + is


modulo 2 addition (XOR), and the gi are coefficients of g(X)

code digits come out in the order of cn-1 until finally c0

as an example, consider for n = 7, m = 4


g(X) = X3 + X + 1

and

d(X) = X2 + 1

use the above circuit to generate c(X) and verify using polynomial
multiplication that the resulting c(X) is g(X) times d(X)

note that above circuit generates a non-systematic code word

can generate a systematic code by applying the following and creating the
corresponding circuit

multiplying d(X) by Xn-m we have


Xn-m d(X) = dm-1Xn-1 + dm-2Xn-2 + . . . + d0Xn-m
= q(X)g(X) + r(X)
for g(X) the degree n-m generator polynomial, and r(X) the unique
remainder polynomial of degree less than n-m
then, adding r(X) to each side gives
dm-1Xn-1 + dm-2Xn-2 + . . . + d0Xn-m + r(X) = q(X)g(x)
thus the LHS must be a multiple of g(X) and hence a code polynomial
and if we write r(X) as
r(X) = pn-m-1Xn-m-1 + pn-m-2Xn-m-2 + . . . + p1X + p0
the coefficients of the code polynomial are:
dm-1, dm-2, . . . d0, pn-m-1, pn-m--2, . . . p0
which is systematic

then need to design a feedback shift register to divide Xn-m d(X) by g(X) to
determine r(X)

the following circuit does so, where the register is initialized to all zeroes,
and with dm-1 fed in first, and then dm-2, . . . d0 sequentially in that order
until dm-1 reaches the furthest right position

then perform m right shifts which then leaves the digits of r(X) in the
register with pn-m-1 in the furthest right position

note in the following figure, since the coefficient of Xn-m must be 1 there is
no corresponding multiplication needed as for the other positions; and,
the first cell simply holds the bit before the clock pulse, while the
remaining cells hold the results

d(X)

g0

g1

+
+
+
+

g2

g n-m-2

gn-m-1

Feedback Shift Register for Systematic Encoding

for the original d(X) = X2 + 1 and g(X) = X3 + X + 1, draw the FSR and
perform the division, give the resulting r(X) and c(X), and show, using
polynomial division that c(X) is a multiple of g(X)
-

of interest is that this same feedback shift register can be used for
encoding and error detection

if the received polynomial is y(X) and the error polynomial is e(X), then

y(X) = c(X) + e(X)


-

if y(X) is a code word and it is divided by g(X), the remainder is 0

if y(X) is not a code word, then dividing by g(X) will give a remainder
which is referred to as a syndrome (polynomial) s(X) and indicates an
error

is y(X) = X5 + X2 + X + 1 a codeword for the above circuit?

is y(X) = X6 + X4 + X2 a codeword for the above circuit?

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