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SN 75174
SN 75174
D
D
D
D
D
D
D
D
D
D
N PACKAGE
(TOP VIEW)
1A
1Y
1Z
1, 2EN
2Z
2Y
2A
GND
16
15
14
13
12
11
10
VCC
4A
4Y
4Z
3, 4EN
3Z
3Y
3A
DW PACKAGE
(TOP VIEW)
1A
1Y
NC
1Z
1, 2EN
2Z
NC
2Y
2A
GND
description
The SN75174 is a monolithic quadruple
differential line driver with 3-state outputs. It is
designed to meet the requirements of ANSI
Standards EIA/TIA-422-B and RS-485 and ITU
Recommendation V.11. The device is optimized
for balanced multipoint bus transmission at rates
up to 4 megabaud. Each driver features wide
positive and negative common-mode output
voltage ranges making it suitable for party-line
applications in noisy environments.
20
19
18
17
16
15
14
13
12
10
11
VCC
4A
4Y
NC
4Z
3, 4EN
3Z
NC
3Y
3A
NC No internal connection
The SN75174 provides positive- and negative-current limiting and thermal shutdown for protection from line
fault conditions on the transmission bus line. Shutdown occurs at a junction temperature of approximately
150C. This device offers optimum performance when used with the SN75173 or SN75175 quadruple
differential line receivers.
The SN75174 is characterized for operation from 0C to 70C.
FUNCTION TABLE
(each driver)
INPUT
ENABLE
L
X
OUTPUTS
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
logic symbol
1, 2EN
Y
A
1A
2A
3
6
Z
1Y
1Z
EN
2Y
2Z
3, 4EN
3A
4A
12
EN
10
11
14
15
13
3Y
3Z
4Y
4Z
VCC
VCC
R(eq)
Input
Output
GND
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Output voltage range,VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V to 15 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0C to 70C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65C to 150C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to the network ground terminal.
DISSIPATION RATING TABLE
PACKAGE
TA 25C
POWER RATING
DERATING FACTOR
ABOVE TA = 25C
TA = 70C
POWER RATING
DW
1125 mW
9.0 mW/C
720 mW
1150 mW
9.2 mW/C
736 mW
MIN
NOM
MAX
UNIT
4.75
5.25
V
0.8
7 to 12
60
mA
60
mA
70
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.5
VIK
II = 18 mA
VOH
VIH = 2 V,,
IOH = 33 mA
37
3.7
VOL
VIH = 2 V,,
IOL = 33 mA
11
1.1
VO
|VOD1|
Output voltage
|VOD2|
VOD3
|VOD|
VOC
|VOC|
IO
IOZ
IIH
IIL
IOS
IO = 0
IO = 0
0
1.5
RL = 100 ,
See Figure 1
1/2 VOD1
or 2
RL = 54 ,
See Figure 1
1.5
See Note 2
2.5
See Figure 1
VCC = 0,
VO = 7 V to 12 V
VO = 7 V to 12 V
VI = 2.7 V
VI = 0.5 V
VO = 7 V
VO = VCC
V
V
0.2
+3
1
0.2
02
100
100
20
360
180
180
VO = 12 V
ICC
6
6
1.5
RL = 54 or 100
,
mA
500
No load
Outputs enabled
38
60
Outputs disabled
18
40
mA
tPZH
tPZL
tPHZ
tPLZ
TEST CONDITIONS
MIN
TYP
MAX
45
65
UNIT
ns
RL = 54
,
See Figure 2
80
120
ns
RL = 110 ,
See Figure 3
80
120
ns
RL = 110 ,
See Figure 4
55
80
ns
RL = 110 ,
See Figure 3
75
115
ns
RL = 110 ,
See Figure 3
18
30
ns
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
SYMBOL EQUIVALENTS
DATA SHEET PARAMETER
EIA/TIA-422-B
RS-485
VO
|VOD1|
Voa, Vob
Vo
Voa, Vob
Vo
|VOD2|
Vt (RL = 100 )
Vt (RL = 54 )
Vt (Test Termination)
Measurement 2)
|VOD|
| |Vt| |Vt| |
| |Vt| |Vt| |
VOC
|VOC|
IOS
|Vos|
|Vos Vos|
|Isa|,|Isb|
|Vos|
|Vos Vos|
IO
|Ixa|,|Ixb|
Iia,Iib
|VOD3|
RL
2
VOC
Input
Generator
(see Note A)
RL =
54
50
CL = 50 pF Output
(see Note B)
0V
td(OD)
td(OD)
Output
3V
1.5 V
90%
50%
10%
90%
50%
10%
tt(OD)
TEST CIRCUIT
~ 2.5 V
~ 2.5 V
tt(OD)
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr 5 ns, tf 5 ns, PRR 1 MHz, duty cycle = 50%,
ZO = 50 .
B. CL includes probe and stray capacitance.
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
S1
3 V to 0 V
Generator
(see Note A)
50
1.5 V
1.5 V
Output
0V
tPZH
RL = 110
CL = 50 pF
(see Note B)
0.5 V
VOH
Output
2.3 V
Voff 0 V
tPHZ
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, duty cycle = 50%, tr 5 ns,
tf 5 ns, ZO = 50 .
B. CL includes probe and stray capacitance.
S1
0 V to 3 V
Generator
(see Note A)
50
3V
RL = 110
Output
CL = 50 pF
(see Note B)
Input
1.5 V
1.5 V
0V
tPLZ
tPZL
5V
2.3 V
Output
0.5 V
VOL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, duty cycle = 50%, tr 5 ns,
tf 5 ns, ZO = 50 .
B. CL includes probe and stray capacitance.
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
5
VCC = 5 V
TA = 25C
4
3.5
3
2.5
2
4
3.5
3
2.5
2
1.5
1
0.5
0
0
20
40
60
80
100
VCC = 5 V
TA = 25C
4.5
VOL Low-Level Output Voltage V
4.5
1.5
1
0.5
0
0
120
20
40
Figure 5
80
100
120
Figure 6
OUTPUT CURRENT
vs
OUTPUT VOLTAGE
50
VCC = 5 V
TA = 25C
3.5
40
Output Disabled
TA = 25C
30
A
IIO
O Output Current A
60
3
2.5
2
10
VCC = 0 V
0
1.5
20
10
VCC = 5 V
20
30
0.5
40
0
0
10
20
30
40
50
60
70
80
90
50
25 20 15 10 5
IO Output Current mA
10
15
20
25
VO Output Voltage V
Figure 7
Figure 8
SN75174
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS039B OCTOBER 1980 REVISED MAY 1995
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
100
80
No Load
Input Open
Outputs Disabled
TA = 25C
25
IICC
CC Supply Current mA
IICC
CC Supply Current mA
90
30
No Load
Outputs Enabled
TA = 25C
70
60
Inputs Open
50
15
40
Inputs
Grounded
30
20
20
10
10
0
0
2
3
4
5
6
VCC Supply Voltage V
Figure 9
Figure 10
APPLICATION INFORMATION
1/4 SN75172
1/4 SN75174
RT
RT
1/4 SN75173
Up to 32
RS-485 Unit Loads
1/4 SN75172
1/4 SN75173
1/4 SN75173
1/4 SN75175
1/4 SN75174
NOTE: The line length should be terminated at both ends in its characteristic impedance (RT = ZO). Stub lengths off the main line should be
kept as short as possible.
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Eco Plan
Lead/Ball Finish
(2)
(6)
(3)
Op Temp (C)
Device Marking
(4/5)
SN75174DW
ACTIVE
SOIC
DW
20
25
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
SN75174
SN75174DWR
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
SN75174
SN75174DWRE4
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
SN75174
SN75174DWRG4
ACTIVE
SOIC
DW
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
0 to 70
SN75174
SN75174J
OBSOLETE
CDIP
16
TBD
Call TI
Call TI
SN75174N
ACTIVE
PDIP
16
25
Pb-Free
(RoHS)
CU NIPDAU
0 to 70
SN75174N
SN75174NE4
ACTIVE
PDIP
16
25
Pb-Free
(RoHS)
CU NIPDAU
0 to 70
SN75174N
(1)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
Samples
www.ti.com
10-Jun-2014
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
3-Jan-2013
Device
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN75174DWR
SOIC
DW
20
2000
330.0
24.4
10.8
13.3
2.7
12.0
24.0
Q1
SN75174DWR
SOIC
DW
20
2000
330.0
24.4
10.8
13.0
2.7
12.0
24.0
Q1
Pack Materials-Page 1
3-Jan-2013
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
SN75174DWR
SOIC
DW
20
2000
367.0
367.0
45.0
SN75174DWR
SOIC
DW
20
2000
367.0
367.0
45.0
Pack Materials-Page 2
PACKAGE OUTLINE
DW0020A
SOIC
C
10.63
TYP
9.97
SEATING PLANE
PIN 1 ID
AREA
0.1 C
20
13.0
12.6
NOTE 3
18X 1.27
2X
11.43
10
11
B
7.6
7.4
NOTE 4
20X
0.51
0.31
0.25
C A B
2.65 MAX
0.33
TYP
0.10
SEE DETAIL A
0.25
GAGE PLANE
0 -8
0.3
0.1
1.27
0.40
DETAIL A
TYPICAL
4220724/A 05/2016
NOTES:
1. All linear dimensions are in millimeters. Dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.43 mm per side.
5. Reference JEDEC registration MS-013.
www.ti.com
DW0020A
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
(R0.05)
TYP
10
11
(9.3)
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
0.07 MAX
ALL AROUND
0.07 MIN
ALL AROUND
SOLDER MASK
DEFINED
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
DW0020A
20X (2)
SYMM
1
20
20X (0.6)
18X (1.27)
SYMM
11
10
(9.3)
4220724/A 05/2016
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
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