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Reducing Simultaneous Switching Noise and EMI On Ground Power Planes by Dissipative Edge Termination
Reducing Simultaneous Switching Noise and EMI On Ground Power Planes by Dissipative Edge Termination
Reducing Simultaneous Switching Noise and EMI On Ground Power Planes by Dissipative Edge Termination
I. INTRODUCTION
Manuscript received January 28, 1999; revised April 29, 1999. This paper
was presented at the Seventh Topical Meeting on Electrical Performance
of Electronic Packaging, United States Military Academy, West Point, NY,
October 2628, 1998.
The author is with Sun Microsystems, Inc., Burlington, MA 01803 USA
(e-mail: istvan.novak@sun.com).
Publisher Item Identifier S 1521-3323(99)06581-8.
275
Fig. 3. Top view of a pair of rectangular planes with the overlaid grid that
defines the transmission lines of the equivalent circuit.
Where
of dielectric (
is the permeability
1 for
0 and
0;
for
0 or
0; 2 for
is the speed of light, and for
.
lossless structure
lends itself well to numerical
The above expression of
calculations, but it is not well suited for circuit simulations,
where the power-ground planes have to be simulated together
with the connected electronics. For circuit simulations, either
a macromodel can be generated [6], or an electrical equivalent
circuit of the pair of planes is formed.
276
(a)
(b)
Fig. 5. Top view of a pair of parallel conducting planes with plane separation
of h = 2 mil.
(c)
are
(a)
The
correction factor is used to match the equivalent
circuits delay and impedance along the and axes (see,
(b)
277
(a)
(b)
(c)
(d)
Fig. 8. Impedances of a pair of 9 in 4 in planes separated by 2 mil FR4 dielectric with 1.39 in resistive termination at every half inches along the edges.
Fig. 8(a)(d) shows the self impedance at the center, self impedance at the corner, transfer impedance from center to mid x, and transfer impedance from
center to mid y , respectively. On all graphs the left axis is for magnitude in
, right axis is for phase in degrees.
278
(a)
(b)
Fig. 11. (a) Simulated real part of self impedance and (b) equivalent inductance of a pair of 9 in
separation, and DET at every half inches along the periphery.
(a)
(b)
(c)
(d)
279
(a)
(b)
(c)
(d)
8 in square planes with 2 mil plane separation, with different values of DET. The termination
Fig. 13. Variation of self-impedances of a pair of 8 in
resistance in cases (a), (b), (c), and (d) is infinite, twice the nominal value, nominal value, half the nominal value, respectively.
Fig. 14. Side view of the connection of the DET components to the 10 in
10 in 31 mil FR4 device under test (DUT).
280
(a)
(b)
materials are used [18], [19]. The standing waves can also
be reduced by selecting a proper reactive (capacitive) [20],
or dissipative (resistive) termination scheme along the PCB
edges [21][23].
281
(a)
(b)
Fig. 16. (a) Correlation of measured and simulated transfer impedances from the corner to the center of a pair of 10 in
dielectric, with bare boards and (b) DET at every inch along the periphery. Solid line: measured, crosses: simulated.
282
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
[12]
[13]
[14]
[15]
[16]
[17]
[18]
[19]
[20]
[21]
[22]
[23]
[24]
[25]
283