PART-B

UNIT-I VLSI DESIGN METHODOLOGIES

1. Explain prims algorithm with an example
2. Explain Dijikstras shortest path algorithm.
3. Discuss on the VLSI design methodologies used for IC layout design
4. Define dynamic programming and explain in detail?
5. Explain in detail about simulated annealing.
6. Explain in detail about back tracking & branch & bound technique?
7. Discuss the various design domains in VLSI design process and various design actions?
8. Discuss BFS and DFS.
9. What are the ways of checking the correctness of an IC without actually fabricating it?
10. Explain a suitable data structure to represent a graph
UNIT-II DESIGN RULES
1. Explain detail about the data structure for the circuit representation?
2. What are the objectives of placement? Discuss any two algorithm used for placement of cells
in IC layout.
3. Explain in detail about KL-algorithm.
4. With diagram explain the minimum distance design rule.
5. List the types of placement problem and explain.
6. Write the algorithm for constraint- graph compaction.
7. Compare bellman-ford and Liao-wong algorithm.
8. What are the critical and non critical issues in compaction algorithm? Explain.
9. What is the justification for longest path algorithm for DAGs? Explain
10. Show with illustrative example, how a layout with redundant space could be compacted.
UNIT-III FLOOR PLANNING
1. Explain global routing.
2. Explain Maze routing algorithm.
3. Explain Area routing.
4. What is meant by channel routing and explain channel routing model with an example?
5. Explain about building block layout in global routing with example?
6. Explain the different types of local routing problem?
7. Discuss the optimization issues related to floor planning.
8. What are shape functions? How it helps in floor plan sizing?
9. Explain left edge algorithm with example.
10. What are the important parameters in routing? Explain.

UNIT-IV SIMULATION

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Explain how ROBDD is used in logic synthesis.

Explain the principle, construction and manipulation of ROBDD
Discuss the various steps involved in two level logic synthesis?
Explain event driven simulation with example and give correct algorithm?
Explain the different level of gate level modelling?
Explain the various issues related to gate level simulation.
Explain switch-level modeling?
Describe switch level simulation with an example.
How transistor is modeled by Bryant and the simulation is performed at switch level?

UNIT-V MODELLING AND SYNTHESIS

1. Explain Hardware model and high level transformation in high-level synthesis.

2. Explain with example of force directed scheduling algorithm and explain the role of it in high
level synthesis?
3. Explain the optimization issues and formulation of assignment problem.
4. With suitable diagram explain the types of data flow.
5. Describe the allocation and assignment in high level synthesis.
6. Discuss the concept of floor planning
7. Compare mobility driven and force driven scheduling algorithm.
8. Describe high level synthesis with an example.
9. Illustrate simple data flow for a short program segment.