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Differential Amplifier
Differential Amplifier
Experiment #1
Objectives:
Theory:
Differential Amplifier
The amplifier that amplify the difference of the supplied two input signals is known as differential
amplifier.
It is two CE stages in parallel with a common emitter resistor.
Due to low common mode gain and high differential gain it can reject the noise which is common
to both the input sensors.
The differential amplifier can be considered as an analog circuit which consists of two inputs and
one output.
Ideally, the circuit has identical transistors and equal collector resistors. With perfect symmetry, Vo
is zero when the two input voltages are equal. But, when Vi1 is greater than Vi2, the output voltage
has one polarity and when Vi2 is greater than Vi1, the output voltage is inverted and has the opposite
polarity.
The differential amplifier circuit can be represented as shown in the figure below. Also, the output voltage
of a differential amplifier is proportional to the difference between the two input voltages. This can be
represented in equation form as follows:
V0 = V01 - V02
Vi1
V01
V0 Vi1- Vi2
V0
Vi2
V02
Vi1
V01
V0
(Ad)D=
Vi2
V02
Vi1
V01
V0
(Ad)S=
V02
Vi2
(Ac)S=
(Ac)D=
Equipment Required:
1) Dual Power Supply
2) Signal Generator
3) Dual Trace Oscilloscope
4) Digital Multimeter
5) Resistor (100 k )
6) Resistor (15 k )
7) Resistor (10 k )
8) Resistor (1 k )
9) Potentiometer (200 )
10) Silicon Transistor (2N2222)
Calculations:
1. DC voltage across the collector resistor of
transistor Q1,Q2 & Q3 is calculated as:
VRC1 = 6.10 V, IC1 =
1
1
= 0.61 mA
2
2
= 0.61 mA
3
3
= 1.23 Ma
1 piece
1 piece
1 piece
1 piece
1 piece
1 piece
2 pieces
1 piece
1 piece
3 pieces
2. Calculation of differential mode gain of single ended and double ended output operation:
a) Vi1 = 50 mV peak to peak at 1 kHz
Vi2 = Ground (0 Volts)
(Ad)S=
(Ad)S=
= 34
= 34
(Ad)S=
(Ad)S=
= 34
= 34
(Ad)D=
(Ad)D=
= 68.44
= 68.44
d) Calculation for Common Mode Gain and Common Mode Rejection Ratio (CMRR)
Vi1 = 1V peak at 1 KHz
Vi2 = 1V peak at 1 KHz with same phase as Vi1
V01-V02 = 0V
Common Mode Gain for Single Ended Output operation:
(Ac)S =
= 5.4 x 10-3
(Ac)S =
= 5.4 x 10-3
= 0
Common Mode Rejection Ratio (CMRR) for Double Ended Output operation:
()
Common Mode Rejection Ratio (CMRR) for Double Ended Output operation:
()
For DC biasing of the differential amplifier shown in figure above, the following equations can be used:
Vcc = Ic1.Rc1 + VCE1 + VCE3 + Iee.Re + Vee
Vb3 = VBE3 + Iee.Re + Vee
The DC power supply voltage is set at +- 10 Volts. A base resistance Rb1 = Rb2 = 10kohm in each input.
The circuit is designed such that VCE = 4.5 V for the two transistors in the differential pair. Similarly, the
VCE = 4.5 V is set for the current source (transistor Q3). Then Ic1 = Ic2 = 2mA is selected through each
transistor in the differential pair, so the constant current source is provided with Icc = IEE = 4mA. It is
assumed VBE = 0.7V. The voltage Vb3 = -5V is set using the resistors R1 = R2 = 10kohm.
Calculation
Simulation
VCE (V)
4.260
4.170
Q1
VBE (V)
0.700
0.690
Ic (mA)
2.050
1.940
VCE (V)
4.260
4.170
Q2
VBE (V)
0.700
0.690
Q3
VBE (V)
0.700
0.680
Ic(mA)
4.10
3.900