COMPUTERARCHITECTURE IT0205

M.Thenmozhi/Kayalvizhi Jayavel/M.B.Panbu
Asst.Prof.(Sr.G)/Asst.Prof.(Sr.G)/Asst.Prof.(O.G)
DepartmentofIT
SRMUniversity,Kattankulathur

Disclaimer
Thecontentsoftheslidesaresolelyforthepurposeofteachingstudents
atSRMUniversity.AllcopyrightsandTrademarksof
organizations/personsapplyevenifnotspecifiedexplicitly.

UNITV:input/output
organization

PeripheralDevices
I/OInterface
Modesoftransfer
PriorityInterrupt
DirectMemoryAccess
I/OProcessor
SerialCommunication

Peripheraldevices

Peripherals Inputoroutputdevicesattachedtothecomputer
Keyboardasinputdevice,displayunitascommonoutputdevice
Magnetictapesareusedmostlyforstoringfilesofdata
Threebasictypesofcharacterprintersaredaisywheel,dotmatrixandlaser
printers
StandardbinarycodeforthealphanumericcharactersisASCII(American
StandardCodeforInformationInterchange)
ASCIIuses7bitstocode128characters(94printablecharactersand34
nonprintablecharacters)
AtoZ 26uppercaseletters,atoz 26lowercaseletters,0through9 10
numerals,32printablecharacterssuchas%,*,and$

Inputoutputinterface

I/Ointerface providesamethodfortransferringinformationbetween
internalstorageandexternali/odevices
Purposeofi/ointerface toresolvedifferencesbetweenCPUandthe
peripherals
I/Obusandinterfacemodules
ControlCommand activatestheperipheralandinformsitwhatto
do
Statuscommand testsvariousstatusconditionsintheinterface
andtheperipherals
Datainputcommand receivesadataitemfromtheperipheraland
placesitinitsbufferregister
Dataoutputcommand causestheinterfacetorespondby
transferringdatafromthebusintooneofitsregisters

I/Ointerface

3waysofcommunicationbetweenProcessorwithmemoryandI/O
usingbuses

2separatebuses 1eachformemoryandI/O
1commonbusandseparatecontrollines
1commonbuswithcommoncontrollines
IsolatedI/O CPUhasdistinctI/Oinstructions;eachinstructionis
associatedwiththeaddressofinterfaceregister
MemoryMappedI/O SameaddressspaceformemoryandI/O;
computertreatsaninterfaceregisterasbeingpartofthememory
system.

i/ointerfaceunit

Modesoftransfer

ProgrammedI/O

I/Odevicedoesnothavedirectaccessto
memory
Requiresexecutionofseveralinstructions
bytheCPU

Interruptinitiatedi/o
Interrupt referstothetransferofcontrolfromacurrently
runningprogramtoanotherserviceprogramasaresultofan
external/internalgeneratedrequest
CPUdetectsinterruptfromasetflag(whenainterfaceisready
totransferdata)
UpondetectionCPUdeviatesitsattentiontoanotherprogram
Twotypesnamelyvectoredinterruptandnonvectoredinterrupt
areavailable

Priorityinterrupt
Systemthatestablishesapriorityoverthevarioussourcesto
determinewhichconditionistobeservicedfirstwhentwoor
morerequestsarrivesimultaneously
Polling usedtoidentifythehighestprioritysourcebysoftware
means
Daisychainingpriority establishingpriorityconsistsofserial
connectionofalldevicesthatrequestaninterrupt
Devicesareplacedintheorderofhighestpriorityfirst
VAD VectoraddressinthedatabususedbytheCPUduringthe
deviceinterruptcycle.

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Daisychainpriorityinterrupt

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Directmemoryaccess(DMA)

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Transferofdatabetweenafaststoragedeviceandmemoryislimitedbythespeed
ofCPU
RemoveCPUfromthepathofcommunicationandthetechniqueisDMA
DMAcontrollertakesoverthebusestomanagethetransferdirectlybetweenthe
I/Odeviceandmemory
BusRequest(BR) usedbytheDMAcontrollertorequesttheCPUtorelinquish
controlofthebuses
CPUactivatesbusgranttoinformtheexternalDMAthatthebusesareinhigh
impedancestate
Bursttransfer blocksequenceconsistingofmemorywordsistransferredina
continuousbuswhenDMAcontrolleristhemaster
CycleStealing allowsDMAcontrollertotransferonedatawordatatimeafter
whichitmustreturncontrolofthebusestotheCPU

Inputoutputprocessor(iop)

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ProcessorwithDMAcapabilitythatcommunicateswithI/Odevices
IOPtakescareofinputandoutputtasksrelievingtheCPUfromthe
housekeepingchoresinvolvedinI/Otransfers
IOPcanfetchandexecuteitsowninstructions
IOPinstructionsarespecificallydesignedtofacilitateI/Otransfers

Cpuiopcommunication

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Serialcommunication
Datacommunicationprocessor communicateswith
eachterminalthroughasinglepairofwires
Dataandcontrolinformationaretransferredina
serialfashion
Modems convertsdigitalsignalsintoaudiotonesto
betransmittedovertelephonelinesandalsoconverts
audiotonesfromthelinetodigitalsignalsfor
machineuse
Transmissionmodes Simplex,Halfduplex,Full
duplex
Datalinkcontrolprotocol setofrulesthatare
followedbyinterconnectingcomputersandterminals
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DifferencesbetweenarchitectureofCPUandperipheral
DifferenttypesofcommandsthatI/Ointerfacereceives
I/OversusMemorybus
IsolatedversusMemoryMappedI/O
Differentmodesofinformationtransfer
DirectMemoryAccess
DMAcontrolleranditsfunctions
IOPandSerialCommunication