Sinusoidal Response of Parallel Circuits GATE Study Material in PDF

So in the previous article we have seen the behaviour of series RL, series RC and series
RLC circuits at steady state. In these free GATE Notes mainly we will discuss about the
behaviour of parallel RL, RC and RLC circuits in steady state. That is, we will see the
Sinusoidal Response of Parallel Circuits.
This GATE material can be used for GATE EE, GATE EC, BSNL, BARC, IES, DRDO and other
exams. You should have these GATE notes downloaded as PDF to have your preparation
made easy, so you can ace your exam.
Before you get to this topic though, do read up on the basics, the important concepts
that are used here. Dont forget to read up on the important concepts you will need to
build the basics of this topic.

Recommended Reading
Basic Network Theory Concepts
Source Transformation & Reciprocity Theorem
Kirchhoffs Laws, Node and Mesh Analysis (EE)
KCL, KVL in Electrical Networks (EC)
Nodal & Mesh Analysis (EC)
Voltage Division in Series Circuit (EE)
Voltage and Current Division, Star to Delta Conversion (EC)
Thevenin Norton Equivalencies (EE)
Thevenin, Norton & Tellegen Theorems
Superposition Theorem

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Maximum Power Transfer Theorem

Network Transients 1
Network Transients 2
Network Transients 3
AC Transients
Magnetically Coupled Circuits
Duality of Networks
Network Theory Revision Test 1
Parameters of Periodic Wave Forms
Sinusoidal Response of Series Circuits

i. Parallel RL Circuits

IR = R
V

IL = jL = X 90
L

Phasor Diagram:

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 I = IR2 + IL2
I

= tan1 (I L ) = Impedance angle = Admittance angle

R

Power Factor, PF = cos =

IR
I

(lagging)

Lagging means current I lags the voltage V

ii. Parallel RC Circuits

IR = R
V

IC = V(jC) = X 90
C

Phasor Diagram:

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I = IR2 + IC2
I

= tan1 (IC ) = Impedance angle = Admittance angle

R

Power Factor, PF = cos =

IR
I

(leading)

Leading means current I leads the voltage V.

iii. Parallel RLC Circuits

The analysis of parallel RLC circuit also analysed in three cases like series RLC circuit
Case 1: If IC > IL then

I = IR2 + (IC IL )2
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I IL

= tan1 ( CI
cos = PF =

IR
I

) = Impedance (or) Admitance angle

(leading)

Leading means current I leads the voltage V

Case 2: If IL > IC then

I = IR2 + (I IC )2
I IC

= tan1 ( LI
cos = PF =

IR
I

) = Impedance (or) Admitance angle

(lagging)

Lagging means current I lags the voltage V

Case 3: If IL = IC then

= 0 power factor = cos = cos 0 = 1 (unity)

i.e. same as in dc case
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Note:
In all the above phasor circuits always the angle between Voltage, V and Current, I is .

Example:
Find the value of I in the given circuit.

Solution:
Here IC > IL then I = IR2 + (IC IL )2
= 82 + (18 12)2 = 64 + 36 = 10A
Power factor = cos =

IR
I

= 10 = 0.8

Here IC > IL hence circuit has leading power factor.

Example:
In the given circuit the phasor I1 leads I2 by _______ degrees

Solution:
From the given figure V = 10 cos2t

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I1 = V. jC = X 90
c

I2 = R+jL = 4+j.2.2 = 4.245 = 42 45

So the phasor diagram for the given network is,

I1 leads I2 by 900 + 450 = 1350

With this we have successfully completed the sinusoidal steady state analysis of various
circuits. In the next articles we will see the Power Relations in A.C. Circuits and the
behaviour of these circuits at resonance.

Power Relations in AC Circuits

Series Resonance
Parallel Resonance
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