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5695 - 45 - 142 - Operation Multilevel Inverters Im PDF
5695 - 45 - 142 - Operation Multilevel Inverters Im PDF
VD
m 1 k
Vdc
m 1
(1)
Where m is the number of phase-leg voltage levels; k goes from 1 to (m-2) and Vdc is the total DC link voltage. When
(m) is sufficiently high, the number of diodes makes the system impractical to implement, which in fact limits the
possible number of levels with such configuration.
B. Flying-capacitors multilevel inverter
Figure 1c shows one leg of multi-level inverter based on a flying-capacitors multilevel inverter (FCMLI). Assuming that
each capacitor has the same voltage rating, series connection of the capacitors indicates the voltage level between the
clamping points. The inner-loop balancing capacitors for phase- leg a are independent from those for phase-leg b. The
voltage level for the flying-capacitors inverter is similar to that of the diode-clamped type of inverter. That is, the phase
voltage Va0 of a multi-level inverter has m levels, and the line voltage Vab has (2m-1) levels. Assuming that each
capacitor has the same voltage rating as the switching device, the DC bus needs (m-1) capacitors for a multi-level
inverter. The number of capacitors required for each phase is:
m
N C (m j )
(2)
j 1
The switching devices have unequal turn-on time. Like the diode-clamped inverter, the line voltage consists of the
positive phase-leg voltage of terminal a and the negative phase-leg voltage of terminal b. The inverter requires a large
number of storage capacitors. A multilevel inverter requires a total of (m-1)(m-2)/2 auxiliary capacitors per phase leg in
addition to (m-1) main DC bus capacitors in case of individual DC batteries are not available. On the contrary, a
multilevel diode-clamp inverter may require only (m-1) DC bus capacitors of the same voltage rating. It should be noted
that the issue of maintaining the charging balance of the capacitor adds complexity to the system requirements.
C. Cascaded multilevel inverter
A cascaded multilevel inverter as shown in figure 2d consists of a series of H-bridge (single-phase, full-bridge) inverter
units. The general function of this multilevel inverter is to synthesize a desired voltage from several separate DC sources
(SDCSs), which may be obtained from batteries, fuel cells, or solar cells. Each SDCS is connected to an H-bridge
inverter. The AC terminal voltages of different level inverters are connected in series. Unlike the diode-clamp or flyingcapacitors inverter, the cascaded inverter does not require any voltage-clamping diodes or voltage-balancing capacitors.
The phase output voltage is synthesized by the sum of inverter outputs, Van = Va1 + V a2 + --- + V aNS. The required
number NS of isolated dc sources, hence number of H-bridges, to get the m output phase voltage levels is:
(3)
N S (m 1) / 2
It should be noted that each switching device always conducts for 1805 (or half-cycle), regardless of the pulse width of
the quasi-square wave of each bridge, making the switching device current stresses equal while identical repeated design
of such H-bridges optimizes the layout and packaging of such inverter configuration.
A comparison of components requirements per leg for each configuration can be summarized as in table 1.
levels ( Vdc, 0, - Vdc) and the voltage between the terminal a and center point o Vao has two levels ( 1 Vdc , - 1 Vdc ).
2
It should be bearing in mined that the firing pattern of the inverter can be controlled to operate this inverter in higher level
mode as follows: If the control signal of switch S1a is delayed by an angle and consequently other control signals will
be modified as shown in right columns of figure 5. The voltage between terminal a and center point of DC supply (Vao)
will have three level (Vdc, 0, - Vdc ) , while the line to line voltage will have five voltage levels ( Vdc , 1 Vdc , 0, - 1 Vdc ,
2
2
1
2
1
1
- Vdc ) and the phase voltage across the load (VaN) will have seven voltage levels (
Vdc , Vdc ,
Vdc, ,0 , - Vdc ,
3
3
2
3
1
- Vdc, - 2 Vdc ) as shown in figure 5. It can be seen that number of levels in the generated output waveform can be
2
3
increased by controlling the delay angle. Increasing number of switches introduce more degrees of freedom since it
increasing the number of available delay angles. Through the analysis in this work, the values of such angles (1 .. i)
are set by try and error to set maximum level from each configuration. Technique for calculation of optimal delays angle
may be suggested as a future work.
D) Operation of 3- phase induction motor through 3-ph (NPC) multi-level inverters
The 3-ph multilevel inverters can be evolved into the standard low and medium voltage motor drive system. Each inverter
has 3 legs, and the number of voltage levels depends on the number of switches in each le and the firing pattern (as
described in section C). MATLAB simulation results have been obtained for the 3-ph induction motor of 300W 220V
start-connected 1490rpm fed through different NPC inverter configurations using 12, 24 and 36 switches. Figure 6
illustrates different simulation results obtained for different inverter configurations. As could be seen from figure 6,
increasing number of switches increases the level of the voltage and current waveforms and the currents became nearly
sinusoidal hence the speed response is faster and better moor response can be achieved. Since the analysis has been
carried out for direct motor starting, increasing in the starting current and torque is also increased by increasing the
number of switch. This problem can be eliminated by introduced a control method such as (v/f) constant ratio control
technique or soft starting technique.
E) Selective harmonic elimination
When the current flows through three phase induction motor, it produces sinusoidally distributed magneto-motive-force (M.M.F) in the
air gap. The fundamental M.M.F is a rotating M.M.F in the forward direction. The third harmonic M.M.F in the three-phase, three-wire
system is pulsating because third harmonic currents are in phase. The fifth harmonic M.M.F wave is also a rotating wave in the
opposite direction to the fundamental. The seventh harmonic M.M.F wave rotates in the same direction as the fundamental wave. In
general, All odd harmonic M.M.F waves of order h = 6n + 1, where n is harmonic order and is an integer number, rotate in the same
direction as the fundamental wave while those whose order is h = 6n - 1 rotate in the opposite direction. When the current fed through
the NPC inverter through motor windings, the M.M.F distribution in space has a staircase wave form. The space harmonic wave rotate
at 1/n times the speed of the fundamental wave. The effects of space harmonic are significant. If the effect of seventh harmonic torque
is appreciable, the motor may settle to a lower speed, the motor crawls. To reduce the crawling effect the seventh harmonics should be
reduced. Also the fifth harmonics produce a negative torque. Therefore, eliminating this fifth harmonics reduces this negative torque.
From a typical quarter-wave symmetric stepped voltage wave form, shown in figure 1a, synthesized by a (2i+1) level,
where i is the number of switching angles, and by applying Fourier series analysis, the amplitudes of the dc offset and
all even harmonics are zero, while the amplitude of any odd nth harmonic of the stepped waveform can be written as[3]:
k m 1
Vn = (4/n)
[ Vk cos (nk) ]
(5)
k 1
Where k integer from 1 to m-1 , Vk is the Kth level of DC voltage, n is an odd harmonic order, m is the number of
level and k is the Kth switching angle.
To minimize harmonic distortion and to achieve amplitude of the fundamental component, up to (m-1) harmonic contents
can be removed from the voltage wave form. In general, the most significant low-frequency harmonics are chosen to be
eliminated by properly selecting angles among different level inverters, and high-frequency harmonic components can be
removed by using additional filter circuit if required. The effect of high-frequency components on the torque is not
significant as the amplitude of the harmonic current components is inversely proportional to the index of the harmonic
components. From the MATLAB harmonic analysis and measurement blocks, results for three-phase 12-switch inverter,
and for the switching angle 1 = 20o , can be plotted as shown in figure 7. The firing angle can be adjusted to eliminate
a certain harmonic. For instance, from equation (5), to eliminate the fifth harmonic, the angle is adjusted as follow:
V5 = (4/5) [ V1 cos (51) ] = 0
hence 1 = 0.2 cos-1 0 = 90/5 = 18 o (6)
These results can be plotted as shown in figure7b.
Also the firing angle can be adjusted to eliminate the seventh harmonic where the switching angle
V7 = (4/5) [ V1 cos (71) ] = 0
hence 1 = 0.2 cos-1 0 = 90/7 = 12.857 c
These results can be plotted as shown in figure 7c.
From equation (5), to eliminate the fifth and seventh harmonic using the 3ph NPC 24-switch inverter, the angles are
adjusted as fallow:
V5 = (4/5) [ V1 cos (51) + V2 cos (52)]
= 0
(8)
= 0
(9)
These equations can be solved iteratively by iteration (MATLAB program) for calculations the 1 and 2 , giving :1 = 30.8571 o
and
2 = 5.1429 o
(10)
Harmonic spectrums of the 12-swutch and 24-switche inverters for different firing patters are illustrated in figures 7 and
8 respectively, showing the effect of selection the right angles (1 and 2) for certain harmonic cancellation. It can be
concluded that increasing number of switches introducing more angles hence more harmonic orders can be eliminated for
better motor performance.
------
Q 6 ) and ( Q 1 ----
Q 6) generated by the PIC and inversion modules then provides corresponding 12 double-ended isolated-
ground gate signals for the neutral-point-clamped (NPC) power transistor devices with 12v DC supply level
suitable for the MOSFET switching transistors. Each circuit of the 12 gate drive circuits consists of isolated
power supply, opto-isolating and amplification stages.
4- The 3-ph NPC inverter: It consists of 12 MOSFET IRF740 power transistors with their own built in
freewheeling diodes and also additional 6 power clamped diodes are utilized with two series dc supplies to
implement the circuit shown in figure 2a.
5- Three-phase induction motor : The experimental setup has been tested on a squirrel cage induction motor1
of 0.3 kW, / Y, 220 / 380 V, 1.25 / 0.75 A, 50 Hz, 1410 rpm as a load.
B) Experimental Results
The experimental setup described in section (A) has been implemented and each circuit has been gathered and tested for
different gating pattern by controlling the shift angle for practical validation of the simulation analysis described in
section (III). Different experimental waveforms are obtained using digital scope then compared with the corresponding
simulated results obtained by the simulink model introduced in section (III). The left column of figure 10 depicts the
experimental waveforms of transistor signals, phase voltages, line voltages and motor phase voltage and current, while
the right column depicts the corresponding simulated waveforms. It can be seen that experimental and simulated results
are quit similar. The 3-ph voltages are balanced and phase shifted by 120 c. Phase voltages have 7 levels while line
voltages have 5 levels since the motor is star connected. Although the motor voltages are staircase stepped waves, motor
phase currents are approximately sinusoidal due to the motor inductance equivalent circuit.
V. Conclusions
A brief comparison of the multilevel configurations has been introduced and models of the 3-ph NPC inverter with
different number of switches have been simulated and tested. The multilevel inverter features can be summarized as: the
output voltage and power increase with number of levels without the requirement of increase in rating of individual
device, the harmonic content decreases as the number of levels increases and filtering requirements are reduced, with
additional voltage levels, the voltage waveform has more free-switching angles, which can be reselected for harmonic
elimination without having to restore PWM technique, the switching devices do not encounter any voltage-sharing
problems, and multilevel inverters can easily be applied for high-power applications such as large motor drives and
utility supplies. However, more number of devices, gate drive circuits and isolating power supplies are required, hence
increasing the complexity of the system. Such problem can be overcome by the new technologies of power electronics
devices, power and intelligent modules. The analysis carried out through this paper has shown that:- increasing number of
switches per inverter leads to more staircase in the output voltage and motor currents, motor current becomes nearly
sinusoidal using more switches hence fundamental output voltage is increased while the harmonic component decreases
hence improving the speed response and torque pulsation of the induction motor, controlling the firing angle can be
directly chosen to cancel certain harmonic order such as 5 th and 7th which have a major drawbacks effects on the motor of
they are found with non-negligible magnitudes in the harmonic spectrum. Simulation and experimental results are well
matched showing the effectives of the proposed setup and validating such multi-level inverter configuration for driving
the 3-ph induction motor particularly for higher voltage ratting applications.
References
[1] Paresh C. Sen, Electric Motor Drives and Control-past, present, and future, IEEE Trans. Electron., Dec. 1990
[2] B. K. Bose, Power electronics and AC Drives prentice-hall, Upper Saddle River, NJ, 1986
[3] Muhammad H. Rashid Power Electronics Circuits, devices and Applications
[4]
[5] A.M.Massoud, S.J.Finney and B.W.Williams , High-power, high voltage IGBT applications series connection of
IGBTS or multilevel converters, INT.J. Electronics, vol. 90, NOS. 11-12, 779-794, 2003.
[6] Jose Rodrignez, Jih-sheng Lai,senior Multilevel inverters:A survey of topologies. Controls, and application,
IEEE Transactions on Industrial Electronics. vol.49.NO.4, August 2004
[7]
[8] Sherif M.W.Ahmed, G.M.A.Sowelam and M.F.Abd El-Kader Comparison Study between three-phase three-level
inverter techniques The Tenth Middle East Power Systems Conference, dec. 13-15, Port Said, Egypt. November 2005
[9] Keith A. Corzine, Mike W. Wielebski, and Jin wang. Control of cascaded multilevel inverters, IEEE Transactions
on Power Electronics. vol.19.NO.3, May 2004.
[10] Brendan Peter Megrath, Donald Grahame Holmes, and Thomas Lipo, Optimized space vector switching sequences
for multilevel inverters, IEEE, Transactions on Power Electronics. vol.1.NO.3 , November 2003.
[11] Jose Rodriguez, Luis Moron, Jorge Pontt, A High-performance vector control of an 11-level inverter, IEEE
Transactions on Industrial Electronics. vol.50.NO.1,February 2003.
[12] Jose Rodriguez, Jorge Pontt, Pablo Carrea, Patricio Cartes and Cesar Silva, A New Modulation Method to reduce
common mode voltages in multilevl inverters, IEEE, Transactions on Industrial Electronics. vol.51.NO.4, August 2004
transmission systems, IEEE, Industrial Electronics, vol. 2, pp. 488-494 , 2000
[13] Brian A.Welchko, Mauricio Beltraode and Thomas A.Lipolife A three-level MOSFET inverter for low-power
drives, IEEE Transactions on Industrial Electronics. vol.51.NO.3, June 2004
[14]
[15] Dudi A. Rendusara, Victor R.Stefanovie, and James W. Analysis of Common Mode Voltage-Neutral Shift in
Medium Voltage PWM Adjustable Speed Drive (MV-ASD) Systems, IEEE, Transactions on Power Electronics.
vol.15.NO.6, November 2000
[16] Sherif M.W.Ahmed, G.M.A.Sowelam M.F.Abd El-Kader Microcontroller Based Control Unit of Space Vector
PWM for a Three Level Inverter Fed Induction Motor Drive The tenth Middle East Power Systems Conference, Dec. 1315, Port Said, Egypt. November 2005
[17] Keiju Matsui, Yasutaka Kausata, and Fukashi veda, Applicati of parallel connected NPC-PWM inverters with on
Multilevel Modulation for AC Motor drive, IEEE Transactions on Power Electronics. vol.49.NO.3, september 2000.
[18] Forati Kashani, and DE Doncker Optimization of multilevel voltage source converters for medium-voltage DC
[19] H.A.Ashour, A.El-Shazely Low Cost Three-Phase Emergency Power Supply CIRED International conference,
Turin, Greece, 2005.
[20] H.A.Ashour, A.El-Shazely Steped Sine Wave Supply For Power Applications ICCAT International conference,
Alexandria, Egypt, 2004
Inverter configuration
Switching devices
Freewheeling diodes
Clamping diodes
Flying capacitors
DC sources
Diode-Clamped
2(m-1)
2(m-1)
(m-1)(m-2)
0
(m-1)
(series dc supplies or
capacitors)
Flying-Capacitor
2(m-1)
2(m-1)
0
(m-1)(m-2)
(m-1)
(series dc supplies or
capacitors)
Cascaded
2(m-1)
2(m-1)
0
0
(m-1)/2
(isolated dc supplies)
Table 1: Comparison of components requirements per phase for different multilevel inverter configurations
(c)
0V ( level-2 )
(d)
-Vdc /2 V
( level-3 )
+v e
V DC/2
ga1
sa1
ga2
sa2
ga3
sa3
ga4
sa4
gb1
sb1
gb2
sb2
gb3
sb3
gb4
sb4
gc1
sc1
gc2
sc2
gc3
sc3
gc4
sc4
pulses
N1
PH1
ph1
R2
PH2
N3
R1.
mesurements2
sco
N2
sig
sig
mesurements1
PH3
s+
si-s
R1
Switches.
R2
R3
V .DC/2
99
ph3
R3
s+
ssco
i-s
(b) Vao
mesurements3
= 00
(c)
Vab
(d)
VaN
= 200
line current
15
armature current, Amp.
10
5
0
-5
-10
-15
-20
-25
0.5
1.5
time -sec.
2.5
10
6
armature current, Amp.
1
0
-1
-2
4
2
0
-2
-4
-6
-3
-8
-4
-10
-5
1.61 1.615 1.62 1.625 1.63 1.635 1.64 1.645 1.65 1.655 1.66
time -sec.
0.015
0.02
0.025
0.03
time -sec.
0.035
0.04
volt
50
0
-50
-100
-150
-200
0.82
Gate signals
0.83
0.84
0.85
0.86
0.87
0.88
12-switch
Fig 5: Increasing number of levels by
increasing number of inverter switches
24-switch
36-switch
5th
7th
5th
(b)
5th
(c)
7th
7th
Ch1
5th
7th
Ch2
Ch3
(a) 1= 40 & 2= 20
(no harmonics elimination)
o
Ch4
(Ch1, Ch2, Ch3, Ch4 are 12V/div)
5th
Ch1
7th
Ch2
Ch3
(Ch1, Ch2, Ch3 are 50V/div)
Ch1
Inverse
signals
generator
(Q1----Q6)
12-switch
Multilevel
inverter
PIC
module
(Q1----Q6)
12 gate
drive
circuits
(b) Photograph
Fig 9: Experimental setup
Ch2
Experimental
Simulated