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Sample and Hold Circuit Based On 741 Opamp
Sample and Hold Circuit Based On 741 Opamp
Sample and Hold Circuit Based On 741 Opamp
As the name indicates , a sample and hold circuit is a circuit which samples an input signal and
holds onto its last sampled value until the input is sampled again. Sample and hold circuits are
commonly used in analogue to digital converts, communication circuits, PWM circuits etc. The
circuit shown below is of a sample and hold circuit based on uA 741 opamp , n-channel E
MOSFET BS170 and few passive components.
Description
As the name indicates , a sample and hold circuit is a circuit which samples an input signal and
holds onto its last sampled value until the input is sampled again. Sample and hold circuits are
commonly used in analogue to digital converts, communication circuits, PWM circuits etc. The
circuit shown below is of a sample and hold circuit based on uA 741 opamp , n-channel E
MOSFET BS170 and few passive components.
In the circuit MOSFET BS170 (Q1) works as a switch while opamp uA741 is wired as a voltage
follower. The signal to be sampled (Vin) is applied to the drain of MOSFET while the sample and
hold control voltage (Vs) is applied to the source of the MOSFET. The source pin of the MOSFET
is connected to the non inverting input of the opamp through the resistor R3. C1 which is a
polyester capacitor serves as the charge storing device. Resistor R2 serves as the load resistor
while preset R1 is used for adjusting the offset voltage.
During the positive half cycle of the Vs, the MOSFET is ON which acts like a closed switch and
the capacitor C1 is charged by the Vin and the same voltage (Vin) appears at the output of the
opamp. When Vs is zero MOSFET is switched off and the only discharge path for C1 is through
the inverting input of the opamp. Since the input impedance of the opamp is too high the voltage
Vin is retained and it appears at the output of the opamp.
The time periods of the Vs during which the voltage across the capacitor (Vc) is equal to Vin are
called sample periods (Ts) and the time periods of Vs during which the voltage across the
capacitor C1 (Vc) is held constant are called hold periods (Th). Taking a close look at the input
and output wave forms of the circuit will make it easier to understand the working of the circuit.
Circuit diagram
Sample and Hold circuit using uA741 opamp
Capacitor C1 must have minimum leakage current possible and thats why a polyester
capacitor is used here.
The type number of the MOSFET Q1 is not very significant here and so substitution is
possible if BS170 is not available.
This circuit will not work because source is connect to body in the mosfet.
The device is not symmetric. Please carefully check the conduction behavior before you do circuit design!!
If you have question, you can contact me: cpyimail@gmail.com
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admin sir ; I am not getting correct result. so will u please show me the proteus simulation
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This circuit will not work due to the internal body diode of the BS170!
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Hi ! am fairly new to electronics @ a late age of 55, so pls forgive lack of knowledge.
In a closed loop O2 automotive sensor for elect fuel injection, thee sensor, taking informative signals of the
Various engine sensors is feeding this back and fourth to the computor to make adjustments to the duration of the
pulse of thee injectors fuel, works fairly well except sometimes there is more fuel then needed to supply the engine
and is wasted out the pipe. Like when you use other forms of fuel to enhance the burn for instance. LP gas, Ho
gas ect. WOULD this circuit have some benefit, in the ability to take, say a .06 v sent from the sensor, intercept it
on its way to the computor and send a .04.5 v signal that the computor could read as acceptable fuel/air mixture
and not ajust pulse length to fuel injectors?
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Is the designator for the polyester capacitor mistakenly typed? I afraid it may be C1 instead of C3. Thanks for the
circuit.
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