ABOUT THE COURSE
Advances in VLSI Technology and its trend
AICTE Sponsored one week
Short Term Course under QIP
on
RECENT TRENDS IN CMOS VLSI
DESIGN AND ITS DEVICE
MODELING
February 20-26, 2017
Organized by
Department of Electronics and
Communication Engineering
Coimbatore Institute of Technology
Coimbatore 14.
(Government Aided Autonomous Institution)
VLSI for wireless communication
Analog VLSI circuit design
towards the high performance applications such
as image processing, cryptography, network
security etc. makes the academicians and
industrialists to work in the field of VLSI design.
Most of the applications need analog VLSI
Circuits of which the in-depth knowledge in
design aspects is required. The objective of this
short term course is to bring academic
researchers and industrialists from various
regions to discuss latest advancements in VLSI
Design for various applications. The content of
this course includes basic concepts of VLSI
design, Device modeling, Low power design and
System on Chip with theoretical and practical
aspects.
RESOURCE PERSONS
Eminent Researchers from reputed Academic
and Research Institutions, Practicing Engineers
from leading industries and other reputed
Institutions / Organizations.
COURSE OBJECTIVE
The objective of this short term course is to
bring academic researchers and practicing
engineers from different parts of our country for
discussing latest advancements in VLSI design
for various applications. This course is planned
to focus on basic concepts of VLSI design, Device
modeling, Low power design and System on
Chip related theoretical and practical aspects.
COURSE CONTENT
CMOS VLSI design
Concepts of Low power VLSI Design
Reconfigurable VLSI architecture for various
applications
VLSI interconnects
Semiconductor Physics
Semiconductor device modeling
System-on-Chip
Multi-Core Reconfigurable VLSI
Architectures
VLSI Testing
REGISTRATION GUIDELINES
Those willing to participate must send the filled
in registration, declaration and sponsorship
documents by e-mail to the organizers before
10.02.2017. There is no registration fee.
Refreshments and meals will be provided.
Lodging will be provided in campus for
outstation participants. All communications will
be via e-mail.
ELIGIBILITY
The faculty members from the streams of ECE,
EEE, CSE and IT of AICTE approved Engineering
Colleges are eligible to participate in this
program. The seats are limited, which would be
filled on first come first served basis. Selected
candidates will be intimated through e-mail. The
outstation participants are eligible for 3-Tier AC
train fare by the shortest route. TA/DA for
outstation participants will be provided as per
AICTE norms.
IMPORTANT DATES
Last Date for receiving applications: 10.02.2017
Intimation of selection: 13.02.2017
 REGISTRATION FORM SPONSORSHIP CERTIFICATE ABOUT THE INSTITUTE
The V. Rangasamy Naidu Educational Trust
AICTE Sponsored One week Dr./Mr./Ms.____________________________ an devoted to the cause of promoting Technical
Short Term Course under QIP and Scientific Literacy, established
employee of our institution is hereby permitted to
on Coimbatore Institute of Technology (CIT) in
RECENT TRENDS IN CMOS VLSI DESIGN AND attend the course on Recent Trends in CMOS 1956. CIT is one of the most reputed and
ITS DEVICE MODELING prestigious educational institutions in South
VLSI Design and its Device Modeling to be held
India. The Institute endorsed by world class
th th
February 20-26, 2017 in CIT, Coimbatore during 20 Feb 26 Feb research and development attained
2017. autonomous status in 1987 and is affiliated to
NAME : Anna University, Chennai. The Institute
Place: features strong Academic-Industrial
QUALIFICATION :
Date: Interaction and a high quality of research and
DESIGNATION : consultancy. CIT, managed by a pedigreed
Signature and Seal of lineage for the past 60 years, enjoys
ORGANISATION : Sponsoring authority international repute. The Institute has the
Co-ordinators : Dr. S. Uma Maheswari, services of competent and qualified faculty,
SEX: MALE: FEMALE: Professor and the guidance of a visionary management
MAILING ADDRESS: ECE Department, CIT to enhance the quality of education at all
_______________________________________ Dr. B. Premalatha, levels and maintains its pre-eminent position
Assistant Professor in emerging globalization.
_______________________________________ ECE Department, CIT ABOUT THE DEPARTMENT
Ms. T. Shunbaga Pradeepa, The department of Electronics &
Assistant Professor Communication Engineering was established
ECE Department, CIT in the year 1968. It has been very well
EMAIL: _________________________________ equipped with highly commendable facilities
For Registration and details please contact: and is effectively guided by a set of devoted
PHONE(S): _____________________________ Dr. B. Premalatha / and diligent staff members. The department
Ms. T. Shunbaga Pradeepa offers UG programme in ECE and PG
ACCOMMODATION REQUIRED: Y / N Assistant Professor Programmes in Communication Engineering
ECE Department, CIT and VLSI Design. The Department has also
DECLARATION BY THE APPLICANT successfully completed many projects with
E-mail : qipvlsi@gmail.com
The above-mentioned information is true to the grants received from various funding
Mobile: 9994714595 / 9677712333
best of my knowledge and belief. I agree to agencies.
abide by the rules and regulations governing the Mailing Address:
REACHING CIT
QIP course. I shall attend all the sessions of the The Coordinator,
CIT is located about 8 km from Coimbatore
course for the entire duration. QIP- AICTE- STC on RTCMOSVLSI,
Railway Junction / Gandhipuram Central Bus
Department of Electronics & Communication Engg., Stand on National Highway, NH47 popularly
Place: Coimbatore Institute of Technology, known as Avinashi Road. The journey time is
Date:
Coimbatore 641014. around 20 minutes from both the stations.
Signature of Applicant