Coverage SC

Cooperative
Cooperative Computing
Computing && Communication
Communication Laboratory
Laboratory
Christoph Kuznik Wolfgang Mller

University of Paderborn / C-Lab University of Paderborn / C-Lab
16th NASCUG, San Diego

6 June, 2011
2011 Siemens AG and University of Paderborn
Cooperative
Laboratory
Motivation Part A
Verification Gap
Various verification techniques to cope with growing
complexity
In dynamic verification
Coverage driven verification (CDV) with constraint
random stimuli generation, assertions,
Verification Techniques
ABV Assertion-based Verification
TBV Transaction-based Verification [1]
CDV Coverage-Driven Verification

Metrics for verification closure

Verification Methodologies
OVM Open
p Verification Methodology
gy
UVM Universal Verification
Methodology
2011 Siemens AG and University of Paderborn 2
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Motivation Part B
Verification Plan Questions [2]
Does it work?
Monitoring
Assertions
Scoreboarding

Are we done?
Functional Coverage
Identify what actually happened!
Functional Coverage
- Investigate how much of the design specification has been exercised by simulation
runs
- User defined metric
Area of application
- C
Control
t l path
th coverage
- Quality of test pattern generation (identify coverage holes)
- Verification closure (Are we Done?)
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Agenda
SystemC Functional Coverage Library

User requirements
Implementation approach
Feature Overview
Usage in a Testbench & Example Code
Sampling
Simulation Performance
Wrap-up and Outlook

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User requirements
Functional Coverage in SystemC

May run on standard OSCI SystemC kernel
No kernel modifications allowed
Header-only
y dependencies
Do not rely on the SCV library
Metric according the IEEE-1800

IEEE 1800 SystemVerilog standard
covergroups, coverpoints, bins
Coverage collection independent from the model abstraction level and

coding styles
Implicit/explicit
I li it/ li it sampling
li tree
t

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Implementation Approach
Implementation of parts of the IEEE-1800 We assume the

SystemVerilog coverage metric SystemC testbench
provides these
Focus
F on explicit
li it with
ith argumentt for
f TLM use model
d l
features to allow
Not considered for implementation true CDV
An assertion functionality (SVA)
Randomization facility (SV rand) Implement functional
Constraint solving coverage as add-on library
[1]

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SystemC Functional Coverage Library
Foundation
Standard C++
Boost Libraries
(for Boost.Function)
OSCI SystemC
Library
Singleton Factory
Co s sts o
Consists of
API
Implementation of IEEE-1800 coverage metric
Implicit / explicit sampling tree
Connecting layer
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Coverage Metric Features
Bin Types
(normal) bin
ignore bin
illegal bin
default bin
cross bin
binsof, intersect
transition bin
vector matching
Hierarchy
covergroups
coverpoints
bins
bi
intervals
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Usage in Testbench, Instantiation
Define coverpoints, bins,

associated intervals as
well as options
(weights, )

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Covergroups & Coverpoints

Instantiation
Optional: Connecting Coverpoints to value source

For implicit value retrieval during sample()
Overloaded methods to connect standard datatypes
integers (by reference)
sc_signals
function with return int
Methods retrieve/cast value to int

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Coverpoint type_options
Render coverage
metric
more precisely !
[5]
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Coverage Bins
Creation by various factory methods for each bin type

va_arg
va arg to specify amounts of intervals per bin
AUTOBINS implements SV bins[]syntax
Various types
yp according
g to IEEE-1800

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Cross Bins
Select Expression limits the cross product

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Transition Bins
Multiple transitions per transition bin possible

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Transition Bins
Prototype Implementation Status:

Simple successional coverage
Templated, not restricted to bins, could check other data-types for in-
order (only evaluation of the hits of the metric is bound to integer)
Tradeoff
Templated vs. Boost.Any
Extend transition bins to a regular-expression like functionality?
Use an assertion language to trigger coverage counters?

Ongoing Development!
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Sample Tree
Sampling may be implicit (RTL-fashion)

Value is retrieved from assigned value
Sampling may be explicit (TLM-fashion)
(User-defined sample @ some POI in time)
Method
sample() sample(arg)
Hierarchy
Value
V l retrieval
ti l from
f registered
i t d C ll off sample(arg)
Call l ( ) on allll bins
bi
source
Coverpoint
Call of sample(value)
Value retrieval from registered
source Depending on the intervals the bin
Bin hits or not
Call of sample(value)
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Sampling w.r.t. clock

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Usage in OMV/UVM Testbench
There is a multi-language release of

OVM-ML
OVM ML
UVM-ML
So far no option to employ CDV

together with SystemC without
Proprietary SystemC simulator
Proprietary Tools
Perform coverage collection on TLM

Decode transactions and
cover items of interest [7]

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Explicit Sampling

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Explicit Sampling

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Simulation Performance
Performance
Sampling data is passed via pointers or references FAST
toverhead = f (#intervals,
(#i t l sampling_granularity)
sampling granularity)
Appropriate sampling granularity

What to cover?
Interesting scenarios only
When
Wh tot cover?
?
Sample on state changes rather than every clock edge
TLM analysis ports may already include the appropriate events for
sampling
How much to sample?
Minimize data collected; maximize its information content! [4]

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Database
Simple file format: metric structure with hits
Allows temporal merging of coverage results from independent

simulation runs (same metric)
Outlook
Unified Coverage Interoperability Standard (UCIS)
Developed by Accellera since 2006
2006, expected 2011

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Prototype Implementation Status
Non-implemented Features
open value ranges
clocking block signals
conditional guards to avoid sampling
Concerning Transitions
wildcards
dca ds spec
specification
cat o
repeat ranges in transitions
Coverage Type options

detect_overlap
cross_num_print_missing
strobe option

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Answering Are-we-done in SC with FC?
Build a metric!
Coverage type_options
t ti
Define min_hits, Goals, weights,
Sample with appropriate stimuli!

Identify coverage holes alter stimuli
generation, direct tests
Temporal merging of coverage results
aGoals
uate met?
Evaluate Illegal
g bins hit?
Min hits met? Sufficient coverage?
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Evaluation - Hits

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Evaluation - Hits

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Summary
Prototype version of a Functional Coverage Library for

SystemC
Implementation of parts of the IEEE 1800 SV metric

Bins, cross bins, transition bins
Coverage
C collection
ll ti on RTL/TLM
Explicit/implicit sampling tree
Simple database format
Convenient API

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Outlook
Library
Implementation of missing features compared to SV
API improvements
Methodology
Enhancement of the multilange releases of OVM/UVM
Usage of the library with a OVM/UVM for SystemC with the OSCI
simulator
Database
Evaluate support for the upcoming Accellera UCIS Standard
(Unified Coverage Interoperability Standard)
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Acknowledgement
This work was partly funded by the DFG

Collaborative Research Centre 614 and
by the German Ministry of Education
and Research (BMBF) through the
BMBF project SANITAS (01M3088).

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References
[1] OVM/UVM Update, DAC 2010
[2] SystemVerilog
S t V il for f Verification
V ifi ti - A Guide
G id tot Learning
L i the
th Testbench
T tb h
Language Features, Second Edition, 2008
[3] SystemC: From the Ground Up

Up, Second Edition
Edition, 2010
[4] P. Marriott. The What, When, and How Much of functional coverage.
EDA Tech Forum Journal. (2006, September)
[5] IEEE 1800-2005 SystemVerilog Std.
[6] UVM-ML v1.0, December 2010

http://www.uvmworld.org/contributions-details.php?id=98&keywords=UVM_ML
[7] OVM UserU G

Guide,
id V Version
i 2 2.1,
1 DDecember
b 2009
..http://www.ovmworld.org/file_download.php?id=38

Coverage SC

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Cooperative

Christoph Kuznik Wolfgang Mller

16th NASCUG, San Diego

CDV Coverage-Driven Verification

SystemC Functional Coverage Library

Wrap-up and Outlook

2011 Siemens AG and University of Paderborn 4

Functional Coverage in SystemC

Metric according the IEEE-1800

Coverage collection independent from the model abstraction level and

2011 Siemens AG and University of Paderborn 5

Implementation of parts of the IEEE-1800 We assume the

2011 Siemens AG and University of Paderborn 6

SystemC Functional Coverage Library

Coverage Metric Features

Usage in Testbench, Instantiation

Define coverpoints, bins,

2011 Siemens AG and University of Paderborn 9

Covergroups & Coverpoints

Optional: Connecting Coverpoints to value source

2011 Siemens AG and University of Paderborn 10

Creation by various factory methods for each bin type

2011 Siemens AG and University of Paderborn 12

Select Expression limits the cross product

2011 Siemens AG and University of Paderborn 13

Multiple transitions per transition bin possible

2011 Siemens AG and University of Paderborn 14

Prototype Implementation Status:

Sampling may be implicit (RTL-fashion)

Sampling w.r.t. clock

2011 Siemens AG and University of Paderborn 17

Usage in OMV/UVM Testbench

There is a multi-language release of

So far no option to employ CDV

Perform coverage collection on TLM

2011 Siemens AG and University of Paderborn 18

2011 Siemens AG and University of Paderborn 19

2011 Siemens AG and University of Paderborn 20

Appropriate sampling granularity

2011 Siemens AG and University of Paderborn 21

Simple file format: metric structure with hits

Allows temporal merging of coverage results from independent

2011 Siemens AG and University of Paderborn 22

Prototype Implementation Status

Coverage Type options

2011 Siemens AG and University of Paderborn 23

Answering Are-we-done in SC with FC?

Sample with appropriate stimuli!

2011 Siemens AG and University of Paderborn 25

2011 Siemens AG and University of Paderborn 26

Prototype version of a Functional Coverage Library for

Implementation of parts of the IEEE 1800 SV metric

2011 Siemens AG and University of Paderborn 27

This work was partly funded by the DFG

2011 Siemens AG and University of Paderborn 29

[1] OVM/UVM Update, DAC 2010

[3] SystemC: From the Ground Up

[5] IEEE 1800-2005 SystemVerilog Std.

[6] UVM-ML v1.0, December 2010

[7] OVM UserU G

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