Ot1 Block Diagram: Intel ULV Peutium-M / ULV Celeron-M

5 4 3 2 1
OT1 BLOCK DIAGRAM 14.318MHz
CPU CORE CPU Thermal

P37 Clock Generator
D Intel ULV Peutium-M / ULV Celeron-M Sensor
MAX6657 P5 ICS CK410-M
D
+1.05V/+1.5V_A
ULV Yonah / ULV Celeron P4
P36
479 Pins XDP
(Micro-FCBGA) P5,6 CONN60_ITP-XDPP5
DC/DC 3V & 5V P34
HyperThansport I/O BUS

1.8V/SMDDR_VTERM/SMDR_VREF
P35 400MHZ Cable Docking
BATT CHARGER LVDS
LCD Panel 1 TO 4 USB HUB
MAX8724/1908 P33 P18 Singal Channel DDR2
Calistoga-GM DDR2-SODIMM1 P13
LINE IN
DISCHARGE/+2.5V R.G,B LINE OUT
P32
CRT port P26
1466 uFCBGA
RJ45
CRT PORT
P7,8,9,10,11,12 SVIDEO OUT
C
POWER JACK C
P31
32.768KHz
DMIx2
PATA PCI BUS

HDD (1.8 inch)P27 24.576MHz 48MHz 25MHz
ICH7-M
DVD-ROM P27
652 BGA
PCI-E LAN
MINI CARD PCMCIA Controller
USB 2.0 SOCKET P19 Broadcom
USB PORT 0 P28
TI 7612 P20,21 BCM5788 P22
P14,15,16,17
USB PORT 1(POWER SPI SYSTEM

USB) P28 BIOS SPI PCMCIA Slot RJ45
P31
B / Smart Card P21 P22 B
Bluetooth Module P28

Azalia
Audio AMP
AUDIO
FingerPrint CODEC TPA6211A JACK
P28 AD1981HD P23,24 P24 P24
3.3V LPC, 33MHz
32.768KHz 32.768KHz
RJ11
MODEM
JACK
MDC 1.5 P29 P29
SYSTEM
TPM (1.2) BIOS
SMSC1021
P28 FWH P30
100 Pins TQFP
A A
P25
PROJECT : OT1
FAN Track Keyboard Quanta Computer Inc.
Size Document Number Rev
P29 PointP29 P29 Custom System Block Diagram 1A
Date: Friday, July 29, 2005 Sheet 1 of 38

5 4 3 2 1
5 4 3 2 1
INDEX Power & Ground

Control
Pg# Description NOTE Label ACTIVE Description
Signal
VIN S0, S3, S4, S5 AC ADAPTER (19V)
1 Schematic Block Diagram
MBAT S0, S3, S4, S5 MAIN BATTERY + (10~17V)
2 System Information
D D
VCCRTC S0, S3, S4, S5 RTC & KBC POWER (3_3V)
3 System Power Block Diagram
+15V S0, S3, S4, S5 +15V
4 CLOCL GENERATOR
CPU_CORE S0 CPU CORE POWER (1.25/1.15V) VRON
5-6 Intel ULV Peutium-M / ULV Celeron-M
+1.05V S0 FSB POWER (1.05V) VRON
7-12 Calistoga-GM
13 DDR II SO-DIMM
+3V S0 MAIND
14-17 ICH7-M
3VSUS S0, S3 SUSON
18 LCD CONNECTOR / LCD PWR
3V_S5 S0, S3, S4, S5 S5_ON
19 MINI CARD
3VPCU S0, S3, S4, S5 ALWAYS POWER (3V)
20-21 CARDBUS CONTROLLER
+5V S0 MAIND
22 GIGA-LAN
C C
5VSUS S0, S3 SUSON
23-24 AUDIO CODEC / AUDIO JACK
5V_S5 S0, S3, S4, S5 S5_ON
25 KBC
5VPCU S0, S3, S4, S5 ALWAYS POWER (5V)
26 CRT PORT
+1.5V S0 MAIND
27 HDD / CD-ROM
1.5V_S5 S0, S3, S4, S5 S5_ON
28 USB,BLUE TOOTH,FINGER PRINT, MDC,TPM
1.8VSUS S0, S3 DDR CORE POWER SUSON
29 FAN,KB,LEDs,TRACK POINT
+2.5V S0 MAINON
30 POWER SEQUENCE,BIOS
SMDDR_VTERM S0 DDR COMMAND & CONTROL PULL UP POWER MAINON
31 CABLE DOCKING
SMDDR_VREF S0, S3 DDR REF POWER SUSON
32 DISCHARGE,+2.5V
VDDA S0 AUDIO ANALOG POWER (5V) MAINON
B 33 CHARGE(MAX8724/1908) B
34 SYSTEM POWER(3V/5V)
GND ALL PAGES DIGITAL GROUND
35 SYSTEM POWER(1.8V/0.9V)
36 SYSTEM POWER(1.05V/1.5V) AGND AUDIO GND
37 CPU POWER T-GND AUDIO JACK GND

38 CHANGE HISTORY
6260AGND CPU ANALOG GROUND
PCI DEVICES IRQ ROUTING PCB STACK UP SM BUS

DEVICE IDSEL # REQ/GNT # PCI_INT LAYER 1 : TOP DEVICE ADDRESS BUS
GBIT ETHERNET AD16 0 B LAYER 2 : GND
CLOCK GENERATOR D2H (ICH6) PCLK_SMB, PCLK_SMB
A
LAYER 3 : IN1 A
CardBus AD25 1 C,D,E
LAYER 4 : IN2 DDR II A0H (ICH6)PCLK_SMB, PCLK_SMB
LAYER 5 : VCC
LCD EDID TBD GMCH
LAYER 6 : IN3 PROJECT : OT1
LAYER 7 : GND CHARGER 16H (KBC) MBDATA,MBCLK Quanta Computer Inc.
LAYER 8 : BOT Size Document Number Rev
CPU THERMAL SENSOR 98H (KBC) MBDATA,MBCLK Custom System Information 1A

5 4 3 2 1
5 4 3 2 1
S5_ON
S.W
SYSTEM POWER BLOCK DIAGRAM MOS-FET 3V_S5
MAINON
D D
S.W SC4215 +2.5V

Adaptor MOS-FET MAIND
S.W +3V
3VPCU
ALWAYS MOS-FET
VIN
3VSUS
MAX1999 SUSD
MAIND
5VPCU S.W +5V

ALWAYS
C
VIN MOS-FET C
5VSUS
SUSD
+15V S5_ON
S.W
MOS-FET 3V_S5
CHARGER
SUSON
MAX8724/1908 MAINON
MAX1992 SMDDR_VTERM
1.8VSUS TPS51100
SMDDR_VREF
MAINON
B B
1.05V
MAX1540 MAIND
VIN
S.W 1.5V_A S.W

BATTERY MOS-FET +1.5V
MOS-FET
S5_ON
VRON
KBC_PW_ON S5_ON S5_OND

VIN TC7SH08FU DISCHARGE
SLP_S5# SUSON SUSD
CPU_VID[0..5] TC7SH08FU DISCHARGE
A A
HWPG MAX1907 CPU_CORE SLP_S3# MAINON MAIND

TC7SH08FU DISCHARGE
DPRSLPVR
STP_CPU#
PROJECT : OT1
Quanta Computer Inc.
C System Power block diagram 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
(5,9,10,11,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37)
(5,6,7,9,10,11,14,17,31,36)
+3V
+1.05V
Place these termination to close CK410M.
L11
+3V CLKVDD C105 CLK_VDDA
ACB2012L-120 XIN DB2 stage:change RP7,RP11,RP22,RP14,RP12 to 22 ohm
120 ohms@100Mhz
C135 C148 C150 C157 C138 15P 7/15/2005
2
10U 0.1U 0.1U 0.1U 0.1U CL=20pF
37
38
Y6 U21
14.318MHZ 50 52 14M_REF R126 33R
VDDA
VSSA
XTAL_IN REF 14M_ICH (16)
C106 RP7 22X2
1
R139 2.2R XOUT 49 44 RHCLK_CPU 1 2 CLK_CPU_BCLK (5)
CLK_VDDA XTAL_OUT CPU0 RHCLK_CPU#
CPU0# 43 3 4 CLK_CPU_BCLK# (5)
A DB2 stage:change C105,C106 to 15P 15P RP11 22X2 A
(37) VR_PWRGD_CK410# 10 41 RHCLK_MCH 1 2 CLK_MCH_BCLK (7)
C149 C446 C144
7/12/2005 VTT_PWRGD#/PD CPU1 RHCLK_MCH#
(16) PM_STPPCI# 55 PCI_STOP# CPU1# 40 3 4 CLK_MCH_BCLK# (7)
10U 0.1U .01U (16) PM_STPCPU# 54 RP17 *33X2
CPU_STOP# RHCLK_XDP
CPU2_ITP/SRC7 36 1 2 CLK_XDP (5)
reserve for LP218 35 RHCLK_XDP# 3 4
CPU2#_ITP/SRC7# CLK_XDP# (5)
R131 *10K
+3V
L7 SMBCK 46 33 218REQA# R361 0
CLKVDD1 CLK48M SMBDT SCLK SRC6/CLKREQA#
+3V LP218 NC
(21) CLK48M R132 12.1/F 47 32 R365 10K
+3V SDATA SRC6#/CLKREQB#
ACB2012L-120 RP21 *33X2 CLKREQB# (19)
120 ohms@100Mhz (16) CLKUSB_48 CLKUSB_48 R129 12.1/F CG_BSEL0 12 CK-410M 31 RSRC5 1 2 CLK_PCIE_XDP (5)
C119 C108 C104 R135 0 CG_BSEL1 FSA/USB_48 SRC5 RSRC5#
16 FSB/TEST_MODE/GND SRC5# 30 3 4 CLK_PCIE_XDP# (5)
0.1U 0.1U 10U CG_BSEL2 R345 4.7K R_CG_BSEL2 53 RP22 22X2
R119 33R FSC/TEST_SEL RSRC4
(25) 14M_KBC SRC4/SATA 26 3 4 CLK_PCIE_MINI (19)
CLK_VDDREF 48 27 RSRC4# 1 2 CLK_PCIE_MINI# (19)
CLKVDD VDD_REF SRC4#/SATA#
42 VDD_CPU
24 RSRC3 R141 0
CLKVDD1 SRC3/GND RSRC3#
R130 2.2R 1 VDD_PCI_1 SRC3#/GND 25 R142 0 LP218 NC
CLK_VDD48 7 RP18 33X2
VDD_PCI_2 RSRC_ICH
SRC2 22 3 4 CLK_PCIE_ICH (15)
CLKVDD 21 23 RSRC_ICH# 1 2
VDD_SRC0 SRC2# CLK_PCIE_ICH# (15)
C131 C139 28 RP14 22X2
0.1U 4.7U/10V VDD_SRC1 RSRC_MCH
DB 2 stage:mount R357 34 VDD_SRC2 SRC1 19 3 4 CLK_PCIE_3GPLL (9)
7/15/2005 20 RSRC_MCH# 1 2
SRC1# CLK_PCIE_3GPLL# (9)
CLK_VDD48 11 RP12 22X2
VDD_48 RDREFSSCLK
SRC0 17 3 4 DREFSSCLK (9)
Iref=2.32mA, R357 4.75K/F IREF 39 18 RDREFSSCLK# 1 2
IREF SRC0# DREFSSCLK# (9)
R127 1R
CLK_VDDREF Ioh=4*Iref 9 208REQA# R128 10K
B PCIF1/CLKREQA# R_PCLK_PCI R120 12.1/F
B
PCI5 5 PCLK_FWH (30)
RP8 4 R_PCLK_KBC R115 12.1/F
GND_PCI_1
GND_PCI_2
PCI4 PCLK_KBC (25)
GND_SRC
GND_CPU
C133 DREFCLK R_DOT96 R_PCLK_6611 R112 33R
GND_REF
(9) DREFCLK 1 2 14 DOT96 PCI3 3 PCLK_6611 (20)
GND_48
0.1U DREFCLK# 3 4 R_DOT96# 15 56 R_PCLK_LAN R116 33R
(9) DREFCLK# DOT96# PCI2 PCLK_LAN (22)
8 R_PCLK_ICH R125 33R
PCIF0/ITP_EN PCLK_ICH (15)
DB2 stage:change RP8 to 22 ohm 22X2
R117 12.1/F PCLK_DBP (19)
7/12/2005 ICS9LP208AGLFT R118 12.1/F
ICS9LP208/ICS954218 PCLK_TPM (28)
13
51
2
6
29
45
+3V
U20 250mA ( MAX. ) +3V
FSC FSB FSA CPU SRC PCI
1
VR_PWRGD_CK410# 2
5 SMbus address D4
1 0 1 100 100 33 DOTHAN FSB 400 (37) VR_PWRGD_CK410# +3V
3 4 VR_PWRGD_CK410 VR_PWRGD_CK410 (16) SRC0 TO 100M
0 0 1 133 100 33 DOTHAN FSB 533 R122
SN74LVC1G04DCKR R_PCLK_ICH R124 10K *10K
0 1 1 166 100 33 14M_REF
+3V
0 1 0 200 100 33
0 0 0 266 100 33
R123 SRC0 TO 96M
1 0 0 333 100 33 10K
Q13 R114 R113
2
1 1 0 400 100 33 2N7002E 10K 10K
EMI
1 1 1 RESERVED SMBDT
(16) PDAT_SMB 3 1 SMBDT (13,19,26) 48MHZ
C
ICS9LP208 should be removed C
* Frequence select by CPU auto sense. +3V
To ICH6-M To DDR-SODIMM CLKUSB_48 C128 *10P RP6 *49.9/FX2
Q12 CLK_CPU_BCLK 1 2
2
2N7002E CLK_CPU_BCLK# 3 4
CLK48M C137 *10P RP10 *49.9/FX2
ICS9LP208 ICS954218 3 1 SMBCK CLK_MCH_BCLK 1 2
(16) PCLK_SMB SMBCK (13,19,26)
DEFOULT SETTING CLK_MCH_BCLK# 3 4
pin pin 33MHZ RP16 *49.9/FX2
CLK_XDP 1 2
NO. NO. CLK_XDP# 3 4
PCLK_KBC C112 *10P RP15 *49.9/FX2
12 CPU Freq. 12 CPU Freq. CLK_PCIE_3GPLL 3 4
CLK_PCIE_3GPLL# 1 2
FIXED SELECT PCLK_6611 C109 *10P RP19 *49.9/FX2
16 16 R344 1K CLK_PCIE_ICH 3 4
+1.05V
CLK_PCIE_ICH# 1 2
R349 0 CG_BSEL2 R347 1K PCLK_ICH C129 *10P RP13 *49.9/FX2
(5) CPU_BSEL2 MCH_BSEL2 (9)
53 SELECT 53 SELECT DREFSSCLK 3 4
R346 *0 DREFSSCLK# 1 2
VREF IREF RP23 *49.9/FX2
39 NC. 39 PULL LO XDP_OBS0 R348 0 XDP_BPM#3 (5) PCLK_LAN C114 *10P CLK_PCIE_MINI 3 4
(5) XDP_OBS0 CLK_PCIE_MINI# 1 2
RP20 *49.9/FX2
9 CLKREQA#* 9 *SELSRC_LCDCLK#/PCICLK_F1 PCLK_TPM C120 *10P CLK_PCIE_XDP 1 2
CLK_PCIE_XDP# 3 4
RP9 *49.9/FX2
33 GND 33 CLKREQA#* PCLK_FWH C123 *10P DREFCLK 3 4
DREFCLK# 1 2
D D
24 24 SRCCLKT3 14.318MHZ
GND
25 25 SRCCLKC3 14M_ICH C127 *10P
PROJECT : OT1
52
REF0/*SELSRC_LCDCLK#
52 14M_KBC C118 *10P Quanta Computer Inc.
REF0 Size Document Number Rev
Custom CLOCK GENERATOR 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
(7) H_D#[63:0] H_D#[63:0] (7)

T104
U36A U36B
(7) H_A#[31:3] H_A#3 H_ADS# +1.05V H_D#0 H_D#32
J4 A[3]# ADS# H1 H_ADS# (7) E22 D[0]# D[32]# AA23
H_A#4 L4 E2 H_BNR# H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# (7) D[1]# D[33]#
H_A#5 M3 G5 H_BPRI# +1.05V +1.05V (4,6,7,9,10,11,14,17,31,36) H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# (7) D[2]# D[34]#
H_A#6 K5 H_D#3 H22 V26 H_D#35
A[6]# D[3]# D[35]#
DATA GRP 0
H_A#7 M1 H5 H_DEFER# H_D#4 F23 W25 H_D#36
DATA GRP 2
A[7]# DEFER# H_DEFER# (7) D[4]# D[36]#
ADDR GROUP 0
H_A#8 N2 F21 H_DRDY# H_D#5 G25 U23 H_D#37
A[8]# DRDY# H_DRDY# (7) D[5]# D[37]#
H_A#9 J1 E1 H_DBSY# R414 Near to MCH <500mils H_D#6 E25 U25 H_D#38
H_A#10 A[9]# DBSY# H_DBSY# (7) H_D#7 D[6]# D[38]# H_D#39
56/F
CONTROL
N3 A[10]# E23 D[7]# D[39]# U22
H_A#11 P5 F1 H_BREQ#0 H_D#8 K24 AB25 H_D#40
A[11]# BR0# H_BREQ#0 (7) D[8]# D[40]#
D H_A#12 P2 H_D#9 G24 W22 H_D#41 D
H_A#13 A[12]# H_IERR# H_D#10 D[9]# D[41]# H_D#42
L1 A[13]# IERR# D20 J24 D[10 D[42]# Y23
H_A#14 P4 B3 H_INIT# H_D#11 J23 AA26 H_D#43
A[14]# INIT# H_INIT# (14) D[11]# D[43]#
H_A#15 P1 H_D#12 H26 Y26 H_D#44
H_A#16 A[15]# H_LOCK# H_D#13 D[12]# D[44]# H_D#45
R1 A[16]# LOCK# H4 H_LOCK# (7) F26 D[13]# D[45]# Y22
H_ADSTB#0 L2 H_D#14 K22 AC26 H_D#46
(7) H_ADSTB#0 ADSTB[0]# H_CPURST# (7) H_D#15 D[14]# D[46]# H_D#47
(7) H_REQ#[4:0] RESET# B1 H25 D[15]# D[47]# AA24
H_REQ#0 K3 F3 H_RS#0 H_DSTBN#0 H23 W24 H_DSTBN#2
H_REQ#1 REQ[0]# RS[0]# H_RS#1 (7) H_DSTBN#0 H_DSTBP#0 DSTBN[0]# DSTBN[2]# H_DSTBP#2 H_DSTBN#2 (7)
H2 REQ[1]# RS[1]# F4 (7) H_DSTBP#0 G22 DSTBP[0]# DSTBP[2]# Y25 H_DSTBP#2 (7)
H_REQ#2 K2 G3 H_RS#2 H_DINV#0 J26 V23 H_DINV#2
REQ[2]# RS[2]# H_RS#[2:0] (7) (7) H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 (7)
H_REQ#3 J3 G2 H_TRDY#
H_REQ#4 REQ[3]# TRDY# H_TRDY# (7) (7) H_D#[63:0] H_D#[63:0] (7)
L5 REQ[4]#
G6 H_HIT# H_D#16 N22 AC22 H_D#48
(7) H_A#[31:3] HIT# H_HIT# (7) D[16]# D[48]#
H_A#17 Y2 E4 H_HITM# H_D#17 K25 AC23 H_D#49
A[17]# HITM# H_HITM# (7) D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AB22 H_D#50
H_A#19 A[18]# XDP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AA21
DATA GRP 1
H_A#20 W6 AD3 XDP_BPM#1 H_D#20 L25 AB21 H_D#52
DATA GRP 3
H_A#21 A[20]# BPM[1]# XDP_BPM#2 +1.05V H_D#21 D[20]# D[52]# H_D#53
U4 AD1 L22 AC25
XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# XDP_BPM#3 H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 XDP_BPM#3 (4) L23 D[22]# D[54]# AD20
H_A#23 U2 AC2 XDP_BPM#4 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# XDP_BPM#5 R154 54.9/F H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23 Trcae width : ?
H_A#25 T5 AC5 XDP_TCK H_D#25 P22 AD24 H_D#57
H_A#26 A[25]# TCK XDP_TDI +1.05V H_D#26 D[25]# D[57]# H_D#58 placement <0.5"
T3 A[26]# TDI AA6 P23 D[26]# D[58]# AE21
H_A#27 W3 AB3 XDP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO XDP_TMS +1.05V H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AE25
H_A#29 Y4 AB6 XDP_TRST# H_D#29 L26 AF25 H_D#61
H_A#30 A[29]# TRST# XDP_DBRESET# R412 H_D#30 D[29]# D[61]# H_D#62 25/25mils
W2 A[30]# DBR# C20 T25 D[30]# D[62]# AF22
H_A#31 Y1 68 H_D#31 N24 AF26 H_D#63
H_ADSTB#1 A[31]# H_PROCHOT# H_DSTBN#1 D[31]# D[63]# H_DSTBN#3
C (7) H_ADSTB#1 V4 ADSTB[1]# PROCHOT D21 H_PROCHOT# (37) (7) H_DSTBN#1 M24 DSTBN[1]# DSTBN[3]# AD23 H_DSTBN#3 (7) C
A24 H_THERMDA R199 H_DSTBP#1 N25 AE24 H_DSTBP#3
THERMDA (7) H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 (7)
THERM
H_A20M# A6 A25 H_THERMDC 1K/F H_DINV#1 M26 AC20 H_DINV#3

(14) H_A20M# A20M# THERMDC (7) H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 (7) +1.05V
H_FERR# A5
(14) H_FERR# FERR#
H_IGNNE# C4 C7 PM_THRMTRIP# H_GTLREF AD26 R26 COMP0 R198 27.4/F
(14) H_IGNNE# IGNNE# THERMTRIP# PM_THRMTRIP# (9,14) GTLREF COMP[0] COMP1
MISC U26 R197 54.9/F
R149 0/F H_STPCLK_R# DB2 change:R196 install to 51 ohm COMP[1] COMP2 R152 27.4/F
(14) H_STPCLK# D5 STPCLK# COMP[2] U1
H_INTR C6 R193 *1K/F C26 V1 COMP3 R151 54.9/F
H CLK
(14) H_INTR LINT0 TEST1 COMP[3]

H_NMI B4 A22 CLK_CPU_BCLK R194 20/15mils PAD R150
(14) H_NMI LINT1 BCLK[0] CLK_CPU_BCLK (4) T101
H_SMI# A3 A21 CLK_CPU_BCLK# 2K/F R196 51/F D25 E5 *200/F
(14) H_SMI# SMI# BCLK[1] CLK_CPU_BCLK# (4) TEST2 DPRSTP# ICH_DPRSTP# (14)
B5 H_DPSLP#
DPSLP# H_DPSLP# (14)
TP_A32# AA1 D24 H_DPWR#
T105 RSVD[01]# DPWR# H_DPWR# (7)
TP_A33# AA4 T22 TP_EXTBREF R416 56/F CPU_BSEL0 B22 D6 H_PWRGD
T39 RSVD[02]# RSVD[12]# T57 +1.05V BSEL[0] PWRGOOD H_PWRGD (14)
T32 TP_A34# AB2 CPU_BSEL1 B23 D7 H_CPUSLP#
RSVD[03]# BSEL[1] SLP# H_CPUSLP# (7,14)
TP_A35# AA3 CPU_BSEL2 C21 AE6 PSI# H_PWRGD is CMOS driving by ICH
RESERVED
T33 RSVD[04]# (4) CPU_BSEL2 BSEL[2] PSI# PSI# (37)

TP_A36# M4 D2 TP_SPARE0
T34 RSVD[05]# RSVD[13]# T31
TP_A37# TP_SPARE1 PZ47903-2741-01
T44
TP_A38#
N5
T2
RSVD[06]# RSVD[14]# F6
D3 TP_SPARE2
T42 Layout note: 0.5" max for GTLREF TO VRD
T100 RSVD[07]# RSVD[15]# T35
TP_A39# V3 C1 TP_SPARE3 R415
T106 RSVD[08]# RSVD[16]# T103
T38 TP_APM0# B2 AF1 TP_SPARE4 1K/F
RSVD[09]# RSVD[17]# T102
TP_APM1# C3 D22 TP_SPARE5
T40 RSVD[10]# RSVD[18]# T54 +3V +3V
C23 TP_SPARE6
RSVD[19]# T53
T56 TP_HFPLL B25 C24 TP_SPARE7
RSVD[11]# RSVD[20]# T55 +3V
PZ47903-2741-01
+1.05V R420 R429
2
10K 10K
B 3 1 THDAT_SMB B
(25,33) MBDATA
R403 Q32
*330 +3V 2N7002E
CN27
XDP
2
1 GND0 GND1 2
XDP_BPM#5 3 4
XDP_BPM#4 OBSFN_A0 OBSFN_C0 XDP_DBRESET# THCLK_SMB
5 OBSFN_A1 OBSFN_C1 6 1 3 SYS_RST# (16) (25,33) MBCLK 3 1
7 GND2 GND3 8
(4) XDP_OBS0 R227 *0 XDP_OBS0 Q28 Q33
9 OBSDATA_A0 OBSDATA_C0 10
XDP_BPM#2 R217 0 XDP_OBS1 11 12 *MMBT3904 +3V 2N7002E
R219 *56/F OBSDATA_A1 OBSDATA_C1 R404 0
+1.05V 13 GND4 GND5 14
XDP_BPM#1 R223 0 XDP_OBS2 15 16
XDP_BPM#0 R222 0 XDP_OBS3 OBSDATA_A2 OBSDATA_C2
17 OBSDATA_A3 OBSDATA_C3 18
19 20 R418
GND6 GND7 100R
21 OBSFN_B0 OBSFN_D0 22
23 24
25
27
OBSFN_B1
GND8
OBSFN_D1
GND9 26
28
H/W MONITOR
OBSDATA_B0 OBSDATA_D0 XDP_DBRESET# (16)
29 30 C536 U42
OBSDATA_B1 OBSDATA_D1 0.1U
31 GND10 GND11 32
33 34 6657VCC 1 8 THCLK_SMB
OBSDATA_B2 OBSDATA_D2 VCC SMCLK
35 OBSDATA_B3 OBSDATA_D3 36
37 38 +1.05V H_THERMDA 2 7 THDAT_SMB
H_PWRGD R220 1K/F H_PWRGD_XDP GND12 GND13 DXP SMDATA
39 PWRGD/HOOK0 ITPCLK/HOOK4 40 CLK_XDP (4)
R209 54.9/F 41 42 C534 3 6 THERM_ALERT#
+1.05V HOOK1 ITPCLK#/HOOK5 CLK_XDP# (4) DXN -ALT THERM_ALERT# (16)
43 44 2200P H_THERMDC
CLK_PCIE_XDP VCC_OBS_AB VCC_OBS_CD R205 1K/F H_CPURST#
A (4) CLK_PCIE_XDP 45 HOOK2 RESET#/HOOK6 46 4 -OVT GND 5 ICH_THRM# A
CLK_PCIE_XDP# 47 48 XDP_DBRESET# R203 1K/F
(4) CLK_PCIE_XDP# HOOK3 DBR#/HOOK7 +3V (34) 1999_SHDN# To SB --> System
49 GND14 GND15 50 *MAX6657/GMT-781
(9) L_CLKCTLB
L_CLKCTLB 51 SDA TDO 52 XDP_TDO R216 54.9/F
+1.05V H/W Shutdown throttling
L_CLKCTLA 53 54 XDP_TRST# R218 54.9/F
(9) L_CLKCTLA SCL TRSTn
55 56 XDP_TDI R208 54.9/F
R202 54.9/F XDP_TCK TCK1 TDI XDP_TMS R210 54.9/F C273 C275
57 58 DB2 stage:Delete U42 temporary
59
TCK0
GND16
TMS
GND17 60 0.1U 0.1U PROJECT : OT1
*CONN60_ITP-XDP Quanta Computer Inc.
Custom CPU(1 OF 2 ) 1A

5 4 3 2 1
5 4 3 2 1
U36D
VCC_CORE VCC_CORE A4 P6
+1.05V VSS[001] VSS[082]
+1.05V (4,5,7,9,10,11,14,17,31,36) A8 VSS[002] VSS[083] P21
U36C VCC_CORE VCC_CORE (32,37) A11 P24
+1.5V VSS[003] VSS[084]
A7 VCC[001] VCC[68] AB20 +1.5V (11,15,17,19,31,36) A14 VSS[004] VSS[085] R2
A9 VCC[002] VCC[69] AB7 A16 VSS[005] VSS[086] R5
A10 VCC[003] VCC[70] AC7 A19 VSS[006] VSS[087] R22
A12 VCC[004] VCC[71] AC9 A23 VSS[007] VSS[088] R25
A13 VCC[005] VCC[72] AC12 A26 VSS[008] VSS[089] T1
A15 VCC[006] VCC[73] AC13 B6 VSS[009] VSS[090] T4
D D
A20 VCC[009] VCC[76] AC18 B13 VSS[012] VSS[093] U3
B7 VCC[010] VCC[77] AD7 B16 VSS[013] VSS[094] U6
VCC_CORE B12 AD12 B24 V2
VCC[013] VCC[80] VSS[016] VSS[097]
B14 VCC[014] VCC[81] AD14 C5 VSS[017] VSS[098] V5
B18 VCC[017] VCC[84] AD18 C14 VSS[020] VSS[101] W1
C236 C237 C238 C239 B20 AE9 C16 W4
22U 22U 22U 22U VCC[018] VCC[85] VSS[021] VSS[102]
C9 VCC[019] VCC[86] AE10 C19 VSS[022] VSS[103] W23
C10 VCC[020] VCC[87] AE12 C2 VSS[023] VSS[104] W26
C12 VCC[021] VCC[88] AE13 C22 VSS[024] VSS[105] Y3
C13 VCC[022] VCC[89] AE15 C25 VSS[025] VSS[106] Y6
C15 VCC[023] VCC[90] AE17 D1 VSS[026] VSS[107] Y21
C240 C241 C219 C220 C17 AE18 D4 Y24
C18 VCC[025] VCC[92] AE20 D8 VSS[028] VSS[109] AA2
D9 VCC[026] VCC[93] AF9 D11 VSS[029] VSS[110] AA5
C
C221 C222 C223 C224 D15 AF15 D23 AA16 C
D18 AF18 +1.05V E3 AA22
VCC[032] VCC[99] VSS[035] VSS[116]
E7 VCC[033] VCC[100] AF20 E6 VSS[036] VSS[117] AA25
E9 VCC[034] E8 VSS[037] VSS[118] AB1
E10 VCC[035] VCCP[01] V6 change footprint 7/27/2005 E11 VSS[038] VSS[119] AB4
C199 C225 C203 C204 E12 G21 E14 AB8
22U 22U 22U 22U VCC[036] VCCP[02] VSS[039] VSS[120]
E13 VCC[037] VCCP[03] J6 E16 VSS[040] VSS[121] AB11
E15 K6 + E19 AB13
VCC[038] VCCP[04] C255 VSS[041] VSS[122]
E17 VCC[039] VCCP[05] M6 E21 VSS[042] VSS[123] AB16
E18 J21 220U E24 AB19
VCC[040] VCCP[06] +1.5V VSS[043] VSS[124]
E20 VCC[041] VCCP[07] K21 F5 VSS[044] VSS[125] AB23
C205 C206 C192 C252 F7 M21 F8 AB26
F9 VCC[043] VCCP[09] N21 F11 VSS[046] VSS[127] AC3
F10 VCC[044] VCCP[10] N6 F13 VSS[047] VSS[128] AC6
F12 VCC[045] VCCP[11] R21 F16 VSS[048] VSS[129] AC8
F14 R6 C269 C270 F19 AC11
VCC[046] VCCP[12] 0.01U 10U/X6S VSS[049] VSS[130]
F15 VCC[047] VCCP[13] T21 F2 VSS[050] VSS[131] AC14
C230 C212 C211 C250 F17 T6 F22 AC16
F18 VCC[049] VCCP[15] V21 F25 VSS[052] VSS[133] AC19
F20 W21 +1.5V G4 AC21
VCC[050] VCCP[16] VSS[053] VSS[134]
AA7 VCC[051] G1 VSS[054] VSS[135] AC24
AA9 VCC[052] VCCA B26 G23 VSS[055] VSS[136] AD2
AA10 VCC[053] G26 VSS[056] VSS[137] AD5
B C251 C254 C229 C233 AA12 H3 AD8 B
22U 22U 22U 22U VCC[054] H_VID0 VSS[057] VSS[138]
AA13 VCC[055] VID[0] AD6 H_VID0 (37) H6 VSS[058] VSS[139] AD11
AA15 AF5 H_VID1 H21 AD13
VCC[056] VID[1] H_VID1 (37) VCC_CORE VSS[059] VSS[140]
AA17 AE5 H_VID2 H24 AD16
VCC[057] VID[2] H_VID2 (37) VSS[060] VSS[141]
AA18 AF4 H_VID3 J2 AD19
AA20 AE3 H_VID4 J5 AD22
C234 C235 C217 C218 AB9 AF2 H_VID5 J22 AD25
22U 22U 22U 22U AC10 AE2 H_VID6 J25 AE1
AB10 R170 K1 AE4
VCC[062] 100/F VSS[065] VSS[146]
AB12 VCC[063] K4 VSS[066] VSS[147] AE8
AB14 VCC[064] K23 VSS[067] VSS[148] AE11
AB15 AF7 VCCSENSE K26 AE14
VCC[065]VCCSENSE VCCSENSE (37) VSS[068] VSS[149]
AB17 VCC[066] L3 VSS[069] VSS[150] AE16
AB18 AE7 VSSSENSE L6 AE19
VCC[067]VSSSENSE VSSSENSE (37) VSS[070] VSS[151]
L21 VSS[071] VSS[152] AE23
PZ47903-2741-01 L24 AE26
Connect to PWM , special layout VSS[072] VSS[153]
M2 VSS[073] VSS[154] AF3
R171 M5 AF6
100/F VSS[074] VSS[155]
M22 VSS[075] VSS[156] AF8
M25 VSS[076] VSS[157] AF11
VCC_CORE +1.05V N1 AF13
VSS[077] VSS[158]
N4 VSS[078] VSS[159] AF16
N23 VSS[079] VSS[160] AF19
N26 VSS[080] VSS[161] AF21
A P3 AF24 A
C198 C200 C201 C202 C185 C186 C194 C193 C260 C257 VSS[081] VSS[162]
22U 22U 22U 22U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U PZ47903-2741-01
PROJECT : OT1
B CPU(2 OF 2 ) 1A

5 4 3 2 1
5 4 3 2 1
H_XRCOMP
(5) H_D#[63:0] H_A#[31:3] (5)
U35A
H_D#0 F1 H9 H_A#3
R411 H_D#1 H_D#_0 H_A#_3 H_A#4 +1.05V
15 mils/10mils J1 H_D#_1 H_A#_4 C9 +1.05V (4,5,6,9,10,11,14,17,31,36)
24.9/F H_D#2 H1 E11 H_A#5
H_D#3 H_D#_2 H_A#_5 H_A#6
J6 H_D#_3 H_A#_6 G11
H_D#4 H3 F11 H_A#7
H_D#5 H_D#_4 H_A#_7 H_A#8
K2 H_D#_5 H_A#_8 G12
H_D#6 G1 F9 H_A#9
H_D#7 H_D#_6 H_A#_9 H_A#10
G2 H_D#_7 H_A#_10 H11
D H_D#8 H_A#11 D
K9 H_D#_8 H_A#_11 J12
+1.05V H_D#9 K1 G14 H_A#12
H_D#10 H_D#_9 H_A#_12 H_A#13
K7 H_D#_10 H_A#_13 D9
H_D#11 J8 J14 H_A#14
H_D#12 H_D#_11 H_A#_14 H_A#15
H4 H_D#_12 H_A#_15 H13
R188 H_D#13 J3 J15 H_A#16
54.9/F H_D#14 H_D#_13 H_A#_16 H_A#17
K11 H_D#_14 H_A#_17 F14
H_D#15 G4 D12 H_A#18
H_XSCOMP H_D#16 H_D#_15 H_A#_18 H_A#19
T10 H_D#_16 H_A#_19 A11
H_D#17 W11 C11 H_A#20
H_D#18 H_D#_17 H_A#_20 H_A#21
T3 H_D#_18 H_A#_21 A12
H_D#19 U7 A13 H_A#22
+1.05V H_D#20 H_D#_19 H_A#_22 H_A#23
U9 H_D#_20 H_A#_23 E13
H_D#21 U11 G13 H_A#24
H_D#22 H_D#_21 H_A#_24 H_A#25
T11 H_D#_22 H_A#_25 F12
H_D#23 W9 B12 H_A#26
H_D#24 H_D#_23 H_A#_26 H_A#27
T1 H_D#_24 H_A#_27 B14
R409 H_D#25 T8 C12 H_A#28
221/F H_D#26 H_D#_25 H_A#_28 H_A#29 +1.05V
T4 H_D#_26 H_A#_29 A14 < 0.1"
H_D#27 W7 C14 H_A#30
H_XSWING H_D#28 H_D#_27 H_A#_30 H_A#31
H_VREF :10 mils/20 mils space
U5 H_D#_28 H_A#_31 D14
H_D#29 T9
H_D#30 H_D#_29 H_ADS# R183
W6 H_D#_30 H_ADS# E8 H_ADS# (5)
H_D#31 T5 B9 H_ADSTB#0 100/F
C H_D#_31 H_ADSTB#_0 H_ADSTB#0 (5) C
R410 C527 H_D#32 AB7 C13 H_ADSTB#1
H_D#_32 H_ADSTB#_1 H_ADSTB#1 (5)
100/F H_D#33 AA9 J13 H_VREF
0.1U H_D#34 H_D#_33 H_VREF_0 H_BNR#
W4 H_D#_34 H_BNR# C6 H_BNR# (5)
H_D#35 W3 F6 H_BPRI#
HOST
H_D#_35 H_BPRI# H_BPRI# (5)
H_D#36 Y3 C7 H_BREQ#0 C216 R176
H_D#_36 H_BREQ#0 H_BREQ#0 (5)
H_D#37 Y7 B7 R397 0 0.1U 200/F
H_D#_37 H_CPURST# H_CPURST# (5)
H_D#38 W5 A7
H_D#_38 H_DBSY# H_DBSY# (5)
H_D#39 Y10 C3 H_DEFER#
+1.05V H_D#_39 H_DEFER# H_DEFER# (5)
H_D#40 AB8 J9 H_DPWR#
H_D#_40 H_DPWR# H_DPWR# (5)
H_D#41 W2 H8 H_DRDY#
H_D#_41 H_DRDY# H_DRDY# (5)
H_D#42 AA4 K13 H_VREF
H_D#43 H_D#_42 H_VREF_1
AA7 H_D#_43 H_DINV#[3:0] (5)
R189 H_D#44 AA2 J7 H_DINV#0
54.9/F H_D#45 H_D#_44 H_DINV#_0 H_DINV#1 C232
AA6 H_D#_45 H_DINV#_1 W8
H_D#46 AA10 U3 H_DINV#2 0.1U
H_YSCOMP H_D#47 H_D#_46 H_DINV#_2 H_DINV#3
Y8 H_D#_47 H_DINV#_3 AB10
H_D#48 AA1 H_D#_48 H_DSTBN#[3:0] (5)
H_D#49 AB4 K4 H_DSTBN#0
H_D#50 H_D#_49 H_DSTBN#_0 H_DSTBN#1
AC9 H_D#_50 H_DSTBN#_1 T7
+1.05V H_D#51 AB11 Y5 H_DSTBN#2
H_D#52 H_D#_51 H_DSTBN#_2 H_DSTBN#3
AC11 H_D#_52 H_DSTBN#_3 AC4
H_D#53 AB3 H_D#_53 H_DSTBP#[3:0] (5)
H_D#54 AC2 K3 H_DSTBP#0
H_D#55 H_D#_54 H_DSTBP#_0 H_DSTBP#1
B AD1 H_D#_55 H_DSTBP#_1 T6 B
R190 H_D#56 AD9 AA5 H_DSTBP#2
221/F H_D#57 H_D#_56 H_DSTBP#_2 H_DSTBP#3
AC1 H_D#_57 H_DSTBP#_3 AC5
H_D#58 AD7
H_YSWING H_D#59 H_D#_58
AC6 H_D#_59
H_D#60 AB5 D3 H_HIT#
H_D#_60 H_HIT# H_HIT# (5)
H_D#61 AD10 D4 H_HITM#
H_D#_61 H_HITM# H_HITM# (5)
H_D#62 AD4 B3 H_LOCK#
H_D#_62 H_LOCK# H_LOCK# (5)
R191 C265 H_D#63 AC8
100/F H_D#_63
0.1U H_XRCOMP E1 H_XRCOMP H_REQ#[4:0] (5)
H_XSCOMP E2 D8 H_REQ#0
H_XSWING H_XSCOMP H_REQ#_0 H_REQ#1
E4 H_XSWING H_REQ#_1 G8
B8 H_REQ#2
H_YRCOMP H_REQ#_2 H_REQ#3
Y1 H_YRCOMP H_REQ#_3 F8
H_YSCOMP U1 A8 H_REQ#4
H_YRCOMP H_YSWING H_YSCOMP H_REQ#_4
W1 H_YSWING H_RS#[2:0] (5)
B4 H_RS#0
CLK_MCH_BCLK AG2 H_RS#_0 H_RS#1
(4) CLK_MCH_BCLK H_CLKIN H_RS#_1 E6
R192 CLK_MCH_BCLK# AG1 D6 H_RS#2
(4) CLK_MCH_BCLK# H_CLKIN# H_RS#_2
24.9/F
E3 H_CPUSLP#
H_SLPCPU# H_CPUSLP# (5,14)
15 mils/10mils E7 H_TRDY#
H_TRDY# H_TRDY# (5)
Short Stub < 100mils
A Calistoga A
extract from same point
PROJECT : OT1
B GMCH HOST(1 OF 6 ) 1A

5 4 3 2 1
5 4 3 2 1
(13) M_A_DQ[63:0]
U35D U35E
M_A_DQ0 AJ35 AU12 M_A_BS#0 AK39
D SA_DQ0 SA_BS_0 M_A_BS#0 (13) SB_DQ0 D
M_A_DQ1 AJ34 AV14 M_A_BS#1 AJ37 AT24
SA_DQ1 SA_BS_1 M_A_BS#1 (13) SB_DQ1 SB_BS_0
M_A_DQ2 AM31 BA20 M_A_BS#2 AP39 AV23
SA_DQ2 SA_BS_2 M_A_BS#2 (13) SB_DQ2 SB_BS_1
M_A_DQ3 AM33 AR41 AY28
SA_DQ3 M_A_CAS# (13) SB_DQ3 SB_BS_2
M_A_DQ4 AJ36 AY13 M_A_CAS# AJ38
SA_DQ4 SA_CAS# M_A_DM[7:0] (13) SB_DQ4
M_A_DQ5 AK35 AJ33 M_A_DM0 AK38 AR24
M_A_DQ6 SA_DQ5 SA_DM_0 M_A_DM1 SB_DQ5 SB_CAS#
AJ32 SA_DQ6 SA_DM_1 AM35 AN41 SB_DQ6 SB_DM_0 AK36
M_A_DQ7 AH31 AL26 M_A_DM2 AP41 AR38
M_A_DQ8 SA_DQ7 SA_DM_2 M_A_DM3 SB_DQ7 SB_DM_1
AN35 SA_DQ8 SA_DM_3 AN22 AT40 SB_DQ8 SB_DM_2 AT36
M_A_DQ9 AP33 AM14 M_A_DM4 AV41 BA31
AR31 SA_DQ10 SA_DM_5 AL9 AU38 SB_DQ10 SB_DM_4 AL17
M_A_DQ11 AP31 AR3 M_A_DM6 AV38 AH8
AN38 SA_DQ12 SA_DM_7 AH4 AP38 SB_DQ12 SB_DM_6 BA5
M_A_DQ13 AM36 AR40 AN4
SA_DQ13 M_A_DQS[7:0] (13) SB_DQ13 SB_DM_7
M_A_DQ14 AM34 AK33 M_A_DQS0 AW38
A
M_A_DQ15 SA_DQ14 SA_DQS_0 M_A_DQS1 SB_DQ14
AN33 AT33 AY38 AM39
B
M_A_DQ16 SA_DQ15 SA_DQS_1 M_A_DQS2 SB_DQ15 SB_DQS_0
AK26 SA_DQ16 SA_DQS_2 AN28 BA38 SB_DQ16 SB_DQS_1 AT39
M_A_DQ17 AL27 AM22 M_A_DQS3 AV36 AU35
AM26 SA_DQ18 SA_DQS_4 AN12 AR36 SB_DQ18 SB_DQS_3 AR29
M_A_DQ19 AN24 AN8 M_A_DQS5 AP36 AR16
MEMORY
AK28 AP3 BA36 AR10
MEMORY
AL28 SA_DQ21 SA_DQS_7 AG5 M_A_DQS#[7:0] (13) AU36 SB_DQ21 SB_DQS_6 AR7
M_A_DQ22 AM24 AK32 M_A_DQS#0 AP35 AN5
M_A_DQ23 SA_DQ22 SA_DQS#_0 M_A_DQS#1 SB_DQ22 SB_DQS_7
AP26 SA_DQ23 SA_DQS#_1 AU33 AP34 SB_DQ23 SB_DQS#_0 AM40
M_A_DQ24 AP23 AN27 M_A_DQS#2 AY33 AU39
C SA_DQ24 SA_DQS#_2 SB_DQ24 SB_DQS#_1 C
M_A_DQ25 AL22 AM21 M_A_DQS#3 BA33 AT35
M_A_DQ26 SA_DQ25 SA_DQS#_3 M_A_DQS#4 SB_DQ25 SB_DQS#_2
AP21 SA_DQ26 SA_DQS#_4 AM12 AT31 SB_DQ26 SB_DQS#_3 AP29
M_A_DQ27 AN20 AL8 M_A_DQS#5 AU29 AP16
M_A_DQ28 SA_DQ27 SA_DQS#_5 M_A_DQS#6 SB_DQ27 SB_DQS#_4
AL23 SA_DQ28 SA_DQS#_6 AN3 AU31 SB_DQ28 SB_DQS#_5 AT10
M_A_DQ29 AP24 AH5 M_A_DQS#7 AW31 AT7
M_A_DQ30 SA_DQ29 SA_DQS#_7 SB_DQ29 SB_DQS#_6
AP20 SA_DQ30 M_A_A[13:0] (13) AV29 SB_DQ30 SB_DQS#_7 AP5
M_A_DQ31 AT21 AY16 M_A_A0 AW29
M_A_DQ32 SA_DQ31 SYSTEM SA_MA_0 M_A_A1 SB_DQ31
AR12 SA_DQ32 SA_MA_1 AU14 AM19 SB_DQ32 SB_MA_0 AY23
M_A_DQ33 M_A_A2
SYSTEM
AR14 SA_DQ33 SA_MA_2 AW16 AL19 SB_DQ33 SB_MA_1 AW24
M_A_DQ34 AP13 BA16 M_A_A3 AP14 AY24
M_A_DQ35 SA_DQ34 SA_MA_3 M_A_A4 SB_DQ34 SB_MA_2
AP12 SA_DQ35 SA_MA_4 BA17 AN14 SB_DQ35 SB_MA_3 AR28
M_A_DQ36 AT13 AU16 M_A_A5 AN17 AT27
AT12 SA_DQ37 SA_MA_6 AV17 AM16 SB_DQ37 SB_MA_5 AT28
M_A_DQ38 AL14 AU17 M_A_A7 AP15 AU27
AL12 SA_DQ39 SA_MA_8 AW17 AL15 SB_DQ39 SB_MA_7 AV28
M_A_DQ40 AK9 AT16 M_A_A9 AJ11 AV27
AN7 SA_DQ41 SA_MA_10 AU13 AH10 SB_DQ41 SB_MA_9 AW27
M_A_DQ42 AK8 AT17 M_A_A11 AJ9 AV24
AK7 SA_DQ43 SA_MA_12 AV20 AN10 SB_DQ43 SB_MA_11 BA27
M_A_DQ44 AP9 AV12 M_A_A13 AK13 AY27
SA_DQ44 SA_MA_13 SB_DQ44 SB_MA_12
DDR
M_A_DQ45 AN9 AH11 AR23

SA_DQ45 SB_DQ45 SB_MA_13
DDR
M_A_DQ46 AT5 AW14 M_A_RAS# AK10
SA_DQ46 SA_RAS# M_A_RAS# (13) SB_DQ46
M_A_DQ47 AL5 AK23 TP_MA_RCVENIN# AJ8 AU23
SA_DQ47 SA_RCVENIN# T37 SB_DQ47 SB_RAS#
B M_A_DQ48 AY2 AK24 TP_MA_RCVENOUT# BA10 AK16 B
SA_DQ48 SA_RCVENOUT# T36 SB_DQ48 SB_RCVENIN#
M_A_DQ49 AW2 AY14 M_A_WE# AW10 AK18
SA_DQ49 SA_WE# M_A_WE# (13) SB_DQ49 SB_RCVENOUT#
M_A_DQ50 AP1 BA4 AR27
M_A_DQ51 SA_DQ50 SB_DQ50 SB_WE#
AN2 SA_DQ51 AW4 SB_DQ51
M_A_DQ52 AV2 AY10
M_A_DQ53 SA_DQ52 SB_DQ52
AT3 SA_DQ53 AY9 SB_DQ53
M_A_DQ54 AN1 AW5
AL2 SA_DQ55 AY5 SB_DQ55
M_A_DQ56 AG7 AV4
AF9 SA_DQ57 AR5 SB_DQ57
M_A_DQ58 AG4 AK4
AF6 SA_DQ59 AK3 SB_DQ59
M_A_DQ60 AG9 AT4
AH6 SA_DQ61 AK5 SB_DQ61
M_A_DQ62 AF4 AJ5
AF8 SA_DQ63 AJ3 SB_DQ63
Calistoga Calistoga
A A
PROJECT : OT1
B GMCH DDR(2 OF 6) 1A

5 4 3 2 1
5 4 3 2 1
20mils/20mils space
U35B +V1.5_PCIE
T22 CLK_MCH_OE# H32 RSVD_0 R143
T27 MCH_RSVD_1 T32 RSVD_1 AY35 M_CLK_DDR0 U35C 24.9/F
SM_CK_0 M_CLK_DDR0 (13)
T23 MCH_RSVD_2 R32 RSVD_2 AR1 M_CLK_DDR1 DPST_PWM D32 D40 EXP_A_COMPX
SM_CK_1 M_CLK_DDR1 (13) (18) DPST_PWM L_BKLTCTL EXP_A_COMPI
T109 MCH_RSVD_3 F3 RSVD_3 AW7 LCD_BLON J30 D38
SM_CK_2 (18) LCD_BLON L_BKLTEN EXP_A_COMPO
T110 MCH_RSVD_4 F7 RSVD_4 AW40 L_CLKCTLA H30
SM_CK_3 (5) L_CLKCTLA L_CLKCTLA
RSVD
T51 MCH_RSVD_5 AG11 RSVD_5 L_CLKCTLB H29 F34
(5) L_CLKCTLB L_CLKCTLB EXP_A_RXN_0
T50 MCH_RSVD_6 AF11 RSVD_6 AW35 M_CLK_DDR#0 EDIDCLK G26 G38
SM_CK#_0 M_CLK_DDR#0 (13) (18) EDIDCLK L_DDC_CLK EXP_A_RXN_1
T52 MCH_RSVD_7 H7 RSVD_7 AT1 M_CLK_DDR#1 EDIDDATA G25 H34
SM_CK#_1 M_CLK_DDR#1 (13) (18) EDIDDATA L_DDC_DATA EXP_A_RXN_2
T41 MCH_RSVD_8 J19 RSVD_8 AY7 L_IBG B38 J38
+1.05V TV_DCONSEL0 SM_CK#_2 L_VBG L_IBG EXP_A_RXN_3
D T26 K30 RSVD_9 SM_CK#_3 AY40 T24 C35 L_VBG EXP_A_RXN_4 L34 D
T25 TV_DCONSEL1 J29 RSVD_10 DISP_ON F32 M38
(18) DISP_ON L_VDDEN EXP_A_RXN_5
T90 MCH_RSVD_11 A41 RSVD_11 AU20 M_CKE0 L_VREFH C33 N34
SM_CKE_0 M_CKE0 (13) L_VREFH EXP_A_RXN_6
T98 MCH_RSVD_12 A35 RSVD_12 AT20 M_CKE1 R366 L_VREFL C32 P38
SM_CKE_1 M_CKE1 (13) L_VREFL EXP_A_RXN_7
T99 MCH_RSVD_13 A34 RSVD_13 BA29 1.5K R34
R175 MCH_RSVD_14 SM_CKE_2 TXLCLKOUT- EXP_A_RXN_8
T28 D28 RSVD_14 SM_CKE_3 AY29 (18) TXLCLKOUT- A33 LA_CLK# EXP_A_RXN_9 T38
10K T30 MCH_RSVD_15 D27 RSVD_15 TXLCLKOUT+ A32 V34
(18) TXLCLKOUT+ LA_CLK EXP_A_RXN_10
AW13 M_CS#0 E27 W38
SM_CS#_0 M_CS#0 (13) LB_CLK# EXP_A_RXN_11
AW12 M_CS#1 E26 Y34
SM_CS#_1 M_CS#1 (13) LB_CLK EXP_A_RXN_12
MCH_BSEL0
MUXING
K16 CFG_0 SM_CS#_2 AY21 EXP_A_RXN_13 AA38
LVDS
MCH_BSEL1 K18 AW21 (18) TXLOUT0- TXLOUT0- C37 AB34
MCH_BSEL2 CFG_1 SM_CS#_3 TXLOUT1- LA_DATA#_0 EXP_A_RXN_14
(4) MCH_BSEL2 J18 CFG_2
15mils/15mils (18) TXLOUT1- B35 LA_DATA#_1 EXP_A_RXN_15 AC38
T46 MCH_CFG_3 F18 AL20 M_OCDCOMP_0 (18) TXLOUT2- TXLOUT2- A37
MCH_CFG_4 CFG_3 SM_OCDCOMP_0 M_OCDCOMP_1 LA_DATA#_2
T47 E15 CFG_4 SM_OCDCOMP_1 AF10 EXP_A_RXP_0 D34
MCH_CFG_5 F15 F38
CFG_5 EXP_A_RXP_1
GRAPHICS
R172 MCH_CFG_6 E18 BA13 M_ODT0 G34
CFG_6 SM_ODT_0 M_ODT0 (13) EXP_A_RXP_2
10K MCH_CFG_7 D19 BA12 M_ODT1 (18) TXLOUT0+ TXLOUT0+ B37 H38
CFG_7 SM_ODT_1 M_ODT1 (13) LA_DATA_0 EXP_A_RXP_3
T43 MCH_CFG_8 D16 AY20 R178 R168 (18) TXLOUT1+ TXLOUT1+ B34 J34
CFG_8 SM_ODT_2 LA_DATA_1 EXP_A_RXP_4
CFG
MCH_CFG_9 G16 AU21 *40.2/F *40.2/F (18) TXLOUT2+ TXLOUT2+ A36 L38
MCH_CFG_10 CFG_9 SM_ODT_3 LA_DATA_2 EXP_A_RXP_5
E16 M34
DDR
MCH_CFG_11 CFG_10 M_RCOMP# EXP_A_RXP_6
D15 CFG_11 SM_RCOMP# AV9 EXP_A_RXP_7 N38
MCH_CFG_12 G15 AT9 M_RCOMP G30 P34
MCH_CFG_13 CFG_12 SM_RCOMP Layout as short as passable LCD_BLON LB_DATA#_0 EXP_A_RXP_8
(10) MCH_CFG_13 K15 CFG_13 D30 LB_DATA#_1 EXP_A_RXP_9 R38
T45 MCH_CFG_14 C15 AK1 SMDDR_VREF
NC from WW45 F29 T34
MCH_CFG_15 CFG_14 SM_VREF_0 LB_DATA#_2 EXP_A_RXP_10
T49 H16 CFG_15 SM_VREF_1 AK41 EXP_A_RXP_11 V38
MCH_CFG_16 G18 W34
MCH_CFG_17 CFG_16 R147 EXP_A_RXP_12
T48 H15 CFG_17 EXP_A_RXP_13 Y38
MCH_CFG_18 J25 AF33 100K F30 AA34
CFG_18 G_CLKIN# CLK_PCIE_3GPLL# (4) LB_DATA_0 EXP_A_RXP_14
MCH_CFG_19 K27 AG33 Shall be 10K divider of 1.8V_SUS D29 AB38
CFG_19 G_CLKIN CLK_PCIE_3GPLL (4) LB_DATA_1 EXP_A_RXP_15
PCI-EXPRESS
MCH_CFG_20 J26 A27 DREFCLK# F28
DREFCLK# (4)
CLK
CFG_20 D_REFCLKIN# DREFCLK LB_DATA_2
C
D_REFCLKIN A26 DREFCLK (4) EXP_A_TXN_0 F36 C
PM_BMBUSY# G28 C40 DREFSSCLK# G40
(16) PM_BMBUSY# PM_BMBUSY# D_REFSSCLKIN# DREFSSCLK# (4) EXP_A_TXN_1
PM_EXTTS#0 F25 D41 DREFSSCLK H36
(13) PM_EXTTS#0 PM_EXTTS#_0 D_REFSSCLKIN DREFSSCLK (4) EXP_A_TXN_2
PM
PM_EXTTS#1 H26 J40

PM_EXTTS#_1 DMI_TXN[3:0] (15) EXP_A_TXN_3
(5,14) PM_THRMTRIP# G6 TV_COMP A16 L36
PM_THRMTRIP# (31) TV_COMP TV_DACA_OUT EXP_A_TXN_4
AH33 AE35 DMI_TXN0 TV_Y/G C18 M40
(16,37) DELAY_VR_PWRGOOD PWROK DMI_RXN_0 (31) TV_Y/G TV_DACB_OUT EXP_A_TXN_5
AH34 AF39 DMI_TXN1 TV_C/R A19 N36
RSTIN# DMI_RXN_1 (31) TV_C/R TV_DACC_OUT EXP_A_TXN_6
TV
RST IN# MCH AG35 DMI_TXN2 P40
(15) PLT_RST-R# DMI_RXN_2 EXP_A_TXN_7
R144 100/F AH39 DMI_TXN3 R377 150/F R167 4.99K/F TVIREF J20 R36
DMI_RXN_3 TV_IREF EXP_A_TXN_8
MISC
T29 H28 R379 150/F B16 T40

R153 *10K/F SDVO_CTRLCLK R381 150/F TV_IRTNA EXP_A_TXN_9
+3V H27 SDVO_CTRLDATA B18 TV_IRTNB EXP_A_TXN_10 V36
K28 AC35 DMI_TXP0 B19 W40
(15) MCH_ICH_SYNC LT_RESET# DMI_RXP_0 TV_IRTNC EXP_A_TXN_11
AE39 DMI_TXP1 Y36
DMI_RXP_1 DMI_TXP2 EXP_A_TXN_12
DMI_RXP_2 AF35 EXP_A_TXN_13 AA40
T118 TP_MCH_NC0 D1 AG39 DMI_TXP3 AB36
NC0 DMI_RXP_3 DMI_TXP[3:0] (15) EXP_A_TXN_14
T92 TP_MCH_NC1 C41 < 0.1" . 15mils/15mils space AC40
NC1 DMI_RXN[3:0] (15) EXP_A_TXN_15
T117 TP_MCH_NC2 C1
TP_MCH_NC3 NC2
T89 BA41 NC3 DMI_TXN_0 AE37 DMI_RXN0 (26) CRT_B
CRT_B E23 CRT_BLUE EXP_A_TXP_0 D36
T96 TP_MCH_NC4 BA40 AF41 DMI_RXN1 D23 F40
NC4 DMI_TXN_1 CRT_BLUE# EXP_A_TXP_1
NC
T97 TP_MCH_NC5 BA39 AG37 DMI_RXN2 CRT_G C22 G36

NC5 DMI_TXN_2 (26) CRT_G CRT_GREEN EXP_A_TXP_2
VGA
T112 TP_MCH_NC6 BA3 AH41 DMI_RXN3 B22 H40
TP_MCH_NC7 NC6 DMI_TXN_3 CRT_R CRT_GREEN# EXP_A_TXP_3
BA2 A21 J36
DMI
T120 NC7 (26) CRT_R CRT_RED EXP_A_TXP_4

T116 TP_MCH_NC8 BA1 R159 75/F B21 L40
TP_MCH_NC9 NC8 CRT_RED# EXP_A_TXP_5
T91 B41 NC9 DMI_TXP_0 AC37 DMI_RXP0 R162 75/F
EXP_A_TXP_6 M36
T114 TP_MCH_NC10 B2 AE41 DMI_RXP1 R165 75/F N40
TP_MCH_NC11 NC10 DMI_TXP_1 EXP_A_TXP_7
T88 AY41 NC11 DMI_TXP_2 AF37 DMI_RXP2 (26) DDCCLK
DDCCLK C26 CRT_DDC_CLK EXP_A_TXP_8 P36
T119 TP_MCH_NC12 AY1 AG41 DMI_RXP3 DDCDATA C25 R40
NC12 DMI_TXP_3 (26) DDCDATA CRT_DDC_DATA EXP_A_TXP_9
T93 TP_MCH_NC13 AW41 G23 T36
TP_MCH_NC14 NC13 CRT_HSYNC EXP_A_TXP_10
T115 AW1 NC14 J22 CRT_IREF EXP_A_TXP_11 V40
T94 TP_MCH_NC15 A40 R160 39/F HSYNC H23 W36
B NC15 (26) CRT_HSYNC CRT_VSYNC EXP_A_TXP_12 B
T111 TP_MCH_NC16 A4 Y40
NC16 DMI_RXP[3:0] (15) EXP_A_TXP_13
T95 TP_MCH_NC17 A39 R164 255/F CRTIREF AA36
TP_MCH_NC18 NC17 EXP_A_TXP_14
T113 A3 NC18 EXP_A_TXP_15 AB40
R158 39/F VSYNC
(26) CRT_VSYNC
Calistoga Calistoga
+3V
1.8VSUS L_CLKCTLA R145 10K/F

+3V L_CLKCTLB R148 10K/F
R155 10K/F PM_EXTTS#0

R182
80.6/F R157 *10K/F PM_EXTTS#1 R353 0
PM_DPRSLPVR (16,37)
M_RCOMP#
15mils/10mils DB2 CHANGE
M_RCOMP
MCH_CFG_6 R179 *10K/F

R177 MCH_CFG_7 R166 *10K/F
80.6/F
MCH_CFG_9 R187 *10K/F +3V
A A
+V1.5_PCIE +V1.5_PCIE (11)

MCH_CFG_[12:5] SMDDR_VREF
(10) MCH_CFG_[12:5] SMDDR_VREF (13,35)
MCH_CFG_[20:16] 1.8VSUS
(10) MCH_CFG_[20:16] 1.8VSUS (10,13,30,31,35)
+3V +3V (4,5,10,11,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37) PROJECT : OT1
Custom GMCH DMI VEDIO(3 OF 6) 1A

5 4 3 2 1
5 4 3 2 1
U35G C267 U35F

+1.05V C268 AA33 +1.05V AD27
VCC_0 VCC_NCTF0
330U/2.5V/ESR-9/POS
W33 VCC_1 AC27 VCC_NCTF1 VSS_NCTF0 AE27
330U/2.5V/ESR-9/POS
P33 VCC_2
25mils + AB27 VCC_NCTF2 VSS_NCTF1 AE26
+ N33 C172 C173 C166 C159 C167 C244 AA27 AE25
VCC_3 C444 0.47U 10U/X6S 10U/X6S 1U 0.1U 0.1U 0.1U VCC_NCTF3 VSS_NCTF2
L33 VCC_4 VCC_SM_0 AU41 Y27 VCC_NCTF4 VSS_NCTF3 AE24
J33 VCC_5 VCC_SM_1 AT41 VCC_SM1 W27 VCC_NCTF5 VSS_NCTF4 AE23
AA32 VCC_6 VCC_SM_2 AM41 VCC_SM2 C154 0.47U V27 VCC_NCTF6 VSS_NCTF5 AE22
Y32 VCC_7 VCC_SM_3 AU40 U27 VCC_NCTF7 VSS_NCTF6 AE21
W32 VCC_8 VCC_SM_4 BA34 T27 VCC_NCTF8 VSS_NCTF7 AE20
V32 VCC_9 VCC_SM_5 AY34 R27 VCC_NCTF9 VSS_NCTF8 AE19
P32 VCC_10 VCC_SM_6 AW34 AD26 VCC_NCTF10 VSS_NCTF9 AE18
N32 AV34 1.8VSUS 120mils AC26 AC17
VCC_11 VCC_SM_7 VCC_NCTF11 VSS_NCTF10
D
M32 VCC_12 VCC_SM_8 AU34 AB26 VCC_NCTF12 VSS_NCTF11 Y17 D
L32 AT34 AA26 U17
VCC_13 VCC_SM_9 VCC_NCTF13 VSS_NCTF12
J32 AR34 Y26
VCC_14 VCC_SM_10 + VCC_NCTF14
AA31 BA30 W26
VCC_15 VCC_SM_11 C264 C195 C168 C176 C153 C245 C158 VCC_NCTF15
W31 AY30 V26
VCC_16 VCC_SM_12 330U 10U/X6S 10U/X6S 0.47U 0.1U 0.1U 0.1U VCC_NCTF16 +1.5V_AUX
V31 AW30 U26
VCC_17 VCC_SM_13 VCC_NCTF17
T31 AV30 T26
VCC_18 VCC_SM_14 VCC_NCTF18
R31 AU30 R26 AG27
VCC_19 VCC_SM_15 VCC_NCTF19 VCCAUX_NCTF0
P31
VCC_20 VCC_SM_16
AT30 AD25
VCC_NCTF20 VCCAUX_NCTF1
AF27 100mils
N31 AR30 AC25 AG26
M31 AP30 AB25 AF26
AA30 AN30 AA25 AG25
Y30 AM30 Y25 AF25
W30 AM29 W25 AG24
V30 AL29 V25 AF24
U30 AK29 U25 AG23
T30 AJ29 T25 AF23
R30 AH29 R25 AG22
P30 AJ28 AD24 AF22
N30 AH28 AC24 AG21
M30 AJ27 AB24 AF21
L30 AH27 AA24 AG20
AA29 BA26 Y24 AF20
Y29 AY26 W24 AG19
W29 AW26 V24 AF19
V29 AV26 U24 R19
U29 AU26 T24 AG18
R29 AT26 R24 AF18
P29 AR26 AD23 R18
M29 AJ26 V23 AG17
C L29 AH26 U23 AF17 C
AB28 AJ25 T23 AE17
AA28 AH25 R23 AD17
Y28 AJ24 AD22 AB17
V28 AH24 V22 AA17
U28 BA23 U22 W17
T28 AJ23 T22 V17
R28
VCC_49 VCC_SM_45
BA22 place Cap on BA23 Ball R22
T17
P28 AY22 C189 C208 AD21 R17
N28
M28
VCC_50
VCC_51
VCC_52
VCC_SM_46
VCC_SM_47
VCC_SM_48
AW22
AV22
0.47U 0.47U V21
U21
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
NCTF VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
AG16
AF16
L28
VCC_53 VCC_SM_49
AU22 place Cap on AJ23 Ball T21
AE16
P27 AT22 R21 AD16
N27 AR22 AD20 AC16
M27 AP22 V20 AB16
L27 AK22 U20 AA16
P26 AJ22 T20 Y16
VCC_58 VCC_SM_54 +1.5V_AUX VCC_NCTF58 VCCAUX_NCTF39
N26 AK21 (11) +1.5V_AUX R20 W16
L26 AK20 AD19 V16
VCC_60 VCC_SM_56 +1.05V VCC_NCTF60 VCCAUX_NCTF41
N25 BA19 (4,5,6,7,9,11,14,17,31,36) +1.05V V19 U16
M25 AY19 U19 T16
VCC_62 VCC_SM_58 1.8VSUS VCC_NCTF62 VCCAUX_NCTF43
L25 AW19 (9,13,30,31,35) 1.8VSUS T19 R16
P24 AV19 AD18 AG15
N24 AU19 AC18 AF15
M24 AT19 AB18 AE15
AB23 AR19 AA18 AD15
AA23 AP19 Y18 AC15
Y23
P23
VCC_68
VCC_69
VCC_70
VCC VCC_SM_64
VCC_SM_65
VCC_SM_66
AK19
AJ19
W18
V18
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
AB15
AA15
N23 AJ18 U18 Y15
B VCC_71 VCC_SM_67 VCC_NCTF71 VCCAUX_NCTF52 B
M23 VCC_72 VCC_SM_68 AJ17 T18 VCC_NCTF72 VCCAUX_NCTF53 W15
L23 VCC_73 VCC_SM_69 AH17 VCCAUX_NCTF54 V15
AC22 AJ16 U15
VCC_74 VCC_SM_70 VCCAUX_NCTF55
AB22 VCC_75 VCC_SM_71 AH16 VCCAUX_NCTF56 T15
Y22 BA15 R15
VCC_76 VCC_SM_72 VCCAUX_NCTF57
W22 VCC_77 VCC_SM_73 AY15
P22 AW15 C171 place Cap on BA15 Ball Calistoga
VCC_78 VCC_SM_74 0.47U
N22 AV15
VCC_79 VCC_SM_75
M22 VCC_80 VCC_SM_76 AU15
L22 AT15 1.MCH_CFG_5 Low = DMI X2, High=DMIX4
VCC_81 VCC_SM_77
AC21 VCC_82 VCC_SM_78 AR15
AA21 AJ15 2.MCH_CFG_6 DDR : Low =Moby Dick, High= Calistoga (Default)
VCC_83 VCC_SM_79
W21 VCC_84 VCC_SM_80 AJ14 GMCH Strap pin
N21 AJ13 3.MCH_CFG_7 CPU Strap Low=RSVD, High=Mobile CPU
VCC_85 VCC_SM_81
M21 AH13
VCC_86 VCC_SM_82 R184 *2.2K 4.MCH_CFG_9 PCI Exp Graphics Lane: Low =Reserved,High=Mobility
L21 VCC_87 VCC_SM_83 AK12 (9) MCH_CFG_5
AC20 AJ12
VCC_88 VCC_SM_84 R185 *2.2K 5.MCH_CFG_10 Host PLL VCC Select: Low=Reserved, High=Mobility
AB20 VCC_89 VCC_SM_85 AH12 (9) MCH_CFG_6
Y20 AG12
VCC_90 VCC_SM_86 R163 *2.2K 6.MCH_CFG_11: Low=Calistoga, High=Reserved
W20 AK11 (9) MCH_CFG_7
VCC_91 VCC_SM_87
P20 VCC_92 VCC_SM_88 BA8
N20 AY8 R186 *2.2K 7.MCH_CFG_16 FSB Dynmic ODT: Low=Dynamic ODT Disabled,
VCC_93 VCC_SM_89 (9) MCH_CFG_9 High=Dynamic ODT Enabled.
M20 VCC_94 VCC_SM_90 AW8
L20 AV8 R181 *2.2K
VCC_95 VCC_SM_91 (9) MCH_CFG_10 8.MCH_CFG_18 VCC Select: LOW=1.05V, High=1.5V
AB19 AT8
VCC_96 VCC_SM_92 R180 *2.2K DB2 change:not stuff 7/29
AA19 VCC_97 VCC_SM_93 AR8 (9) MCH_CFG_11
Y19 AP8 9.MCH_CFG_19 DMI LANE Reversal:Low=Normal,High=LANES Reversed.
VCC_98 VCC_SM_94 R173 *2.2K
N19 VCC_99 VCC_SM_95 BA6 (9) MCH_CFG_12
M19 AY6 intel WW51 recommand 10.MCH_CFG_20 PCIE Backward interpoerability mode: Low= only SDVO
VCC_100 VCC_SM_96 R174 *2.2K or PCIE x1 is operational (defaults) ,High=SDVO and PCIE x1 are
A L19 VCC_101 VCC_SM_97 AW6 (9) MCH_CFG_13 operation simultaneously via the PEG port.
A
N18 VCC_102 VCC_SM_98 AV6
M18 AT6 R169 *2.2K
VCC_103 VCC_SM_99 (9) MCH_CFG_16
L18 VCC_104 VCC_SM_100 AR6
P17 AP6
VCC_105 VCC_SM_101
N17 VCC_106 VCC_SM_102 AN6
M17 AL6 R161 *1K/F +3V
(9) MCH_CFG_18
N16
VCC_107
VCC_108
VCC_SM_103
VCC_SM_104 AK6 25mils PROJECT : OT1
M16 AJ6 R146 *1K/F +3V
(9) MCH_CFG_19
L16
VCC_109
VCC_110
VCC_SM_105
VCC_SM_106
AV1 VCC_SM106
AJ1 VCC_SM107
C529 0.47U
R156 *1K/F
VCC_SM_107 (9) MCH_CFG_20 +3V Size Document Number Rev
C528 0.47U
Calistoga Custom GMCH PW & STRAP(4 OF 6) 1A
25mils
5 4 3 2 1
5 4 3 2 1
+V3.3_TVDAC 80mils +2.5V +1.05V

+1.5V +V1.5_DPLLA L46 +V3.3_ATVBG
L14 10uH/0805 FCM2012C-181
+V3.3_ATVBG C152 C162 U35H
0.1U 10U/X6S H22 +1.05V
C489 VCCSYNC
VTT_0 AC14
+ C183 C180 C30 AB14
C155 C165 10U/0805 0.1U 0.022U VCC_TXLVDS0 VTT_1
+2.5V B30 VCC_TXLVDS1 VTT_2 W14
470U 0.1U Change part number +V1.5_PCIE A30 V14 C210 C242 C253 C160
+V3.3_ATVBG VCC_TXLVDS2 VTT_3 4.7U/6.3V/08052.2U/6.3V0.1U 10U/X6S
VTT_4 T14
+V1.5_DPLLB +2.5V AJ41 R14
L13 10uH/0805 +V3.3_ATVBG VCC3G0 VTT_5
AB41 VCC3G1 VTT_6 P14
D Y41 VCC3G2 VTT_7 N14 D
+V1.5_3GPLL V41 M14
C184 C196 C151 VCC3G3 VTT_8
R41 VCC3G4 VTT_9 L14
+ 0.1U 0.022U 0.1U N41 AD13 +1.05V
C132 C156 VCC3G5 VTT_10
L41 VCC3G6 VTT_11 AC13
470U 0.1U +V3.3_ATVBG C161 C143 AC33 AB13
0.1U 10U/X6S VCCA_3GPLL VTT_12
G41 VCCA_3GBG VTT_13 AA13
+V1.5_HPLL +V3.3_ATVBG H41 Y13 C177 C188 C259 C207
L16 FCM2012C-181 VSSA_3GBG VTT_14 0.22U 0.22U 0.47U 0.47U
VTT_15 W13
+V2.5_CRTDAC F21 V13
C182 C191 VCCA_CRTDAC0 VTT_16
E21 VCCA_CRTDAC1 VTT_17 U13
0.1U 0.022U G21 T13
C266 C261 +V1.5_DPLLA VSSA_CRTDAC VTT_18
VTT_19 R13
10U/X6S 0.1U +V3.3_ATVBG C175 C178 +V1.5_DPLLB B26 N13
0.1U 0.022U +V1.5_HPLL VCCA_DPLLA VTT_20
C39 VCCA_DPLLB VTT_21 M13
+V1.5_MPLL +V3.3_ATVBG AF1 L13
L15 FCM2012C-181 VCCA_HPLL VTT_22
+2.5V AB12
VTT_23 +2.5V
A38 VCCA_LVDS VTT_24 AA12
B39 VSSA_LVDS VTT_25 Y12
22U +V1.5_MPLL W12
C262 C248 C164 C163 VTT_26
in Capell Rev0.93 AF2 VCCA_MPLL VTT_27 V12
10U/X6S 0.1U 0.01U 0.1U U12 C179 C174
VTT_28 0.1U 4.7U
H20 VCCA_TVBG VTT_29 T12
G20 VSSA_TVBG VTT_30 R12
+V3.3_ATVBG P12
+2.5V R371 D12 +1.05V VTT_31
25mils VTT_32 N12
10 PDZ5.6B +V3.3_ATVBG M12
VCCGFOLLOW VTT_33
C 1 2 E19 VCCA_TVDACA0 VTT_34 L12 C
C486 C190 +V3.3_ATVBG F19 R11
L41 +V2.5_CRTDAC 0.1U 0.022U VCCA_TVDACA1 VTT_35
C20 VCCA_TVDACB0 VTT_36 P11
FCM2012C-181 D20 N11
+V3.3_ATVBG VCCA_TVDACB1 VTT_37
E20 M11
F20
VCCA_TVDACC0
VCCA_TVDACC1 POWER VTT_38
VTT_39
VTT_40
R10
P10
+1.5V AH1 N10
VCCD_HMPLL0 VTT_41
AH2 VCCD_HMPLL1 VTT_42 M10
+V1.5_PCIE 60mils +1.5V P9
L10 R134 VTT_43
A28 VCCD_LVDS0 VTT_44 N9
100nH 0/A B28 M9
PCIE_L VCCD_LVDS1 VTT_45
C28 VCCD_LVDS2 VTT_46 R8
+3V +1.5V +V1.5_TVDAC P8
+ VTT_47
RC0805 D21 VCCD_TVDAC VTT_48 N8
C142 C141 C145 M8
10U/X6S 10U/X6S 220U +3V VTT_49
A23 VCC_HV0 VTT_50 P7
B23 VCC_HV1 VTT_51 N7
C169 C170 C256 C263 B25 M7
10U/X6S 0.1U 0.1U 10U/X6S 40mils +V1.5_QTVDAC VCC_HV2 VTT_52
VTT_53 R6
H19 VCCD_QTVDAC VTT_54 P6
60mils +1.5V_AUX M6
+V1.5_3GPLL +1.5V VTT_55
60mils AK31 VCCAUX0 VTT_56 A6
R137 L12 R138 AF31 R5
0.5/F 1uH 0/A VCCAUX1 VTT_57
AE31 VCCAUX2 VTT_58 P5
3GPLL_FB_R 3GPLL_FB_L AC31 N5
VCCAUX3 VTT_59
AL30 VCCAUX4 VTT_60 M5
B RC0805 AK30 VCCAUX5 VTT_61 P4 B
60mils AJ30 VCCAUX6 VTT_62 N4
+V1.5_TVDAC +1.5V AH30 M4
R378 VCCAUX7 VTT_63
L42 AG30 VCCAUX8 VTT_64 R3
+1.5V_AUX R133 +1.5V AF30 P3 VTT_56 , VTT_71 and 72 are
0 V15_TVDAC_R 0/A VCCAUX9 VTT_65
AE30 VCCAUX10 VTT_66 N3 attached with 0.1u seperated .Checking
AD30 VCCAUX11 VTT_67 M3
FCM2012C-181 RC0805 AC30 R2
C473 C471 VCCAUX12 VTT_68
RC0805 AG29 VCCAUX13 VTT_69 P2
C146 0.022U 0.1U AF29 M2
0.1U VCCAUX14 VTT_70
AE29 VCCAUX15 VTT_71 D2
AD29 VCCAUX16 VTT_72 AB1
AC29 VCCAUX17 VTT_73 R1
+3V +V1.5_QTVDAC AG28 P1
VCCAUX18 VTT_74
L43 AF28 VCCAUX19 VTT_75 N1
AE28 VCCAUX20 VTT_76 M1
+1.5V AH22 VCCAUX21
30mils AJ21 VCCAUX22
D13 PDZ5.6B FCM2012C-181 AH21
C187 C181 VCCAUX23
AJ20 VCCAUX24
V1_5SFOLLOW 1 2 0.022U 0.1U AH20 VCCAUX25
AH19 VCCAUX26
P19 VCCAUX27
R395 P16
+V3.3_TVDAC VCCAUX28
AH15 VCCAUX29
10 P15 VCCAUX30
AH14 VCCAUX31
A R392 0/A AG14 A
VCCAUX32
AF14 VCCAUX33
RC0805 AE14 VCCAUX34
Y14 VCCAUX35
AF13 VCCAUX36
AE13
+1.05V
+1.5V
+1.05V (4,5,6,7,9,10,14,17,31,36) AF12
VCCAUX37
VCCAUX38
PROJECT : OT1
+1.5V (6,15,17,19,31,36) AE12
+V1.5_PCIE
+2.5V
+V1.5_PCIE (9) AD12
VCCAUX39
VCCAUX40 Quanta Computer Inc.
+2.5V (30,32) Size Document Number Rev
+3V +3V (4,5,9,10,13,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37)
Calistoga Custom GMCH POWER (5 OF 6) 1A

5 4 3 2 1
5 4 3 2 1
U35I U35J
AC41 VSS_0 VSS_97 AK34 AT23 VSS_180 VSS_273 J11
AA41 VSS_1 VSS_98 AG34 AN23 VSS_181 VSS_274 D11
W41 VSS_2 VSS_99 AF34 AM23 VSS_182 VSS_275 B11
T41 VSS_3 VSS_100 AE34 AH23 VSS_183 VSS_276 AV10
P41 VSS_4 VSS_101 AC34 AC23 VSS_184 VSS_277 AP10
M41 VSS_5 VSS_102 C34 W23 VSS_185 VSS_278 AL10
J41 VSS_6 VSS_103 AW33 K23 VSS_186 VSS_279 AJ10
F41 VSS_7 VSS_104 AV33 J23 VSS_187 VSS_280 AG10
AV40 VSS_8 VSS_105 AR33 F23 VSS_188 VSS_281 AC10
D AP40 VSS_9 VSS_106 AE33 C23 VSS_189 VSS_282 W10 D
AN40 VSS_10 VSS_107 AB33 AA22 VSS_190 VSS_283 U10
AK40 VSS_11 VSS_108 Y33 K22 VSS_191 VSS_284 BA9
AJ40 VSS_12 VSS_109 V33 G22 VSS_192 VSS_285 AW9
AH40 VSS_13 VSS_110 T33 F22 VSS_193 VSS_286 AR9
AG40 VSS_14 VSS_111 R33 E22 VSS_194 VSS_287 AH9
AF40 VSS_15 VSS_112 M33 D22 VSS_195 VSS_288 AB9
AE40 VSS_16 VSS_113 H33 A22 VSS_196 VSS_289 Y9
B40 VSS_17 VSS_114 G33 BA21 VSS_197 VSS_290 R9
AY39 VSS_18 VSS_115 F33 AV21 VSS_198 VSS_291 G9
AW39 VSS_19 VSS_116 D33 AR21 VSS_199 VSS_292 E9
AV39 VSS_20 VSS_117 B33 AN21 VSS_200 VSS_293 A9
AR39 VSS_21 VSS_118 AH32 AL21 VSS_201 VSS_294 AG8
AN39 VSS_22 VSS_119 AG32 AB21 VSS_202 VSS_295 AD8
AJ39 VSS_23 VSS_120 AF32 Y21 VSS_203 VSS_296 AA8
AC39 VSS_24 VSS_121 AE32 P21 VSS_204 VSS_297 U8
AB39 VSS_25 VSS_122 AC32 K21 VSS_205 VSS_298 K8
AA39 VSS_26 VSS_123 AB32 J21 VSS_206 VSS_299 C8
Y39 VSS_27 VSS_124 G32 H21 VSS_207 VSS_300 BA7
W39 VSS_28 VSS_125 B32 C21 VSS_208 VSS_301 AV7
V39 VSS_29 VSS_126 AY31 AW20 VSS_209 VSS_302 AP7
T39 AV31 AR20 AL7
R39
P39
VSS_30
VSS_31
VSS_32
VSS_127
VSS_128
VSS_129
AN31
AJ31
AM20
AA20
VSS_210
VSS_211
VSS_212
VSS VSS_303
VSS_304
VSS_305
AJ7
AH7
N39 AG31 K20 AF7
M39
L39
VSS_33
VSS_34
VSS_35
VSS VSS_130
VSS_131
VSS_132
AB31
Y31
B20
A20
VSS_213
VSS_214
VSS_215
VSS_306
VSS_307
VSS_308
AC7
R7
C J39 VSS_36 VSS_133 AB30 AN19 VSS_216 VSS_309 G7 C
H39 VSS_37 VSS_134 E30 AC19 VSS_217 VSS_310 D7
G39 VSS_38 VSS_135 AT29 W19 VSS_218 VSS_311 AG6
F39 VSS_39 VSS_136 AN29 K19 VSS_219 VSS_312 AD6
D39 VSS_40 VSS_137 AB29 G19 VSS_220 VSS_313 AB6
AT38 VSS_41 VSS_138 T29 C19 VSS_221 VSS_314 Y6
AM38 VSS_42 VSS_139 N29 AH18 VSS_222 VSS_315 U6
AH38 VSS_43 VSS_140 K29 P18 VSS_223 VSS_316 N6
AG38 VSS_44 VSS_141 G29 H18 VSS_224 VSS_317 K6
AF38 VSS_45 VSS_142 E29 D18 VSS_225 VSS_318 H6
AE38 VSS_46 VSS_143 C29 A18 VSS_226 VSS_319 B6
C38 VSS_47 VSS_144 B29 AY17 VSS_227 VSS_320 AV5
AK37 VSS_48 VSS_145 A29 AR17 VSS_228 VSS_321 AF5
AH37 VSS_49 VSS_146 BA28 AP17 VSS_229 VSS_322 AD5
AB37 VSS_50 VSS_147 AW28 AM17 VSS_230 VSS_323 AY4
AA37 VSS_51 VSS_148 AU28 AK17 VSS_231 VSS_324 AR4
Y37 VSS_52 VSS_149 AP28 AV16 VSS_232 VSS_325 AP4
W37 VSS_53 VSS_150 AM28 AN16 VSS_233 VSS_326 AL4
V37 VSS_54 VSS_151 AD28 AL16 VSS_234 VSS_327 AJ4
T37 VSS_55 VSS_152 AC28 J16 VSS_235 VSS_328 Y4
R37 VSS_56 VSS_153 W28 F16 VSS_236 VSS_329 U4
P37 VSS_57 VSS_154 J28 C16 VSS_237 VSS_330 R4
N37 VSS_58 VSS_155 E28 AN15 VSS_238 VSS_331 J4
M37 VSS_59 VSS_156 AP27 AM15 VSS_239 VSS_332 F4
L37 VSS_60 VSS_157 AM27 AK15 VSS_240 VSS_333 C4
J37 VSS_61 VSS_158 AK27 N15 VSS_241 VSS_334 AY3
H37 VSS_62 VSS_159 J27 M15 VSS_242 VSS_335 AW3
B G37 VSS_63 VSS_160 G27 L15 VSS_243 VSS_336 AV3 B
F37 VSS_64 VSS_161 F27 B15 VSS_244 VSS_337 AL3
D37 VSS_65 VSS_162 C27 A15 VSS_245 VSS_338 AH3
AY36 VSS_66 VSS_163 B27 BA14 VSS_246 VSS_339 AG3
AW36 VSS_67 VSS_164 AN26 AT14 VSS_247 VSS_340 AF3
AN36 VSS_68 VSS_165 M26 AK14 VSS_248 VSS_341 AD3
AH36 VSS_69 VSS_166 K26 AD14 VSS_249 VSS_342 AC3
AG36 VSS_70 VSS_167 F26 AA14 VSS_250 VSS_343 AA3
AF36 VSS_71 VSS_168 D26 U14 VSS_251 VSS_344 G3
AE36 VSS_72 VSS_169 AK25 K14 VSS_252 VSS_345 AT2
AC36 VSS_73 VSS_170 P25 H14 VSS_253 VSS_346 AR2
C36 VSS_74 VSS_171 K25 E14 VSS_254 VSS_347 AP2
B36 VSS_75 VSS_172 H25 AV13 VSS_255 VSS_348 AK2
BA35 VSS_76 VSS_173 E25 AR13 VSS_256 VSS_349 AJ2
AV35 VSS_77 VSS_174 D25 AN13 VSS_257 VSS_350 AD2
AR35 VSS_78 VSS_175 A25 AM13 VSS_258 VSS_351 AB2
AH35 VSS_79 VSS_176 BA24 AL13 VSS_259 VSS_352 Y2
AB35 VSS_80 VSS_177 AU24 AG13 VSS_260 VSS_353 U2
AA35 VSS_81 VSS_178 AL24 P13 VSS_261 VSS_354 T2
Y35 VSS_82 VSS_179 AW23 F13 VSS_262 VSS_355 N2
W35 VSS_83 D13 VSS_263 VSS_356 J2
V35 VSS_84 B13 VSS_264 VSS_357 H2
T35 VSS_85 AY12 VSS_265 VSS_358 F2
R35 VSS_86 AC12 VSS_266 VSS_359 C2
P35 VSS_87 K12 VSS_267 VSS_360 AL1
N35 VSS_88 H12 VSS_268
M35 VSS_89 E12 VSS_269
A L35 VSS_90 AD11 VSS_270 A
J35 VSS_91 AA11 VSS_271
H35 VSS_92 Y11 VSS_272
G35 VSS_93
F35 Calistoga
VSS_94
D35
AN34
VSS_95
VSS_96
PROJECT : OT1
Calistoga
Custom GMCH GND(6 OF 6) 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
+3V
1.8VSUS +3V (4,5,9,10,11,14,15,16,17,18,19,21,22,23,25,26,27,28,29,30,31,32,34,37) M_A_DM[0..7] (8)
1.8VSUS
1.8VSUS (9,10,30,31,35) M_A_DQ[0..63] (8)
SMDDR_VREF
M_A_DQS[0..7] (8) Place these Caps near So-Dimm1.
1.8VSUS 1.8VSUS
M_A_DQS#[0..7] (8)
CN25
M_A_A[0..13] (8)
1 VREF VSS46 2
M_A_DQ0
3 VSS47
5 DQ0
DQ4
DQ5 6
4 M_A_DQ6
M_A_DQ4
DDRII A CHANNEL C520 C510 C496 C483 C499
M_A_DQ1 7 DQ1 2.2U 2.2U 2.2U 2.2U 2.2U
VSS15 8 M_A_DM0 SMDDR_VTERM
9 VSS37 DM0 10
M_A_DQS#0 11 DQS#0
M_A_DQS0 VSS5 12 M_A_DQ7 SMDDR_VTERM
13 DQS0 DQ6 14
15 VSS48 16 M_A_DQ5 1.8VSUS Place these Caps near So-Dimm1.
M_A_DQ2 DQ7
A 17 DQ2 VSS16 18
A
M_A_DQ3 19 DQ3 M_A_DQ13 C213 C511 C487 C501 C492 C508 C516 C228 C226 C197 C243 C249 C247
DQ12 20 M_A_DQ12 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U
21 VSS38 DQ13 22
M_A_DQ8 23 DQ8
M_A_DQ14 VSS17 24 M_A_DM1 C506 C505 C514 C515 C488
25 DQ9 DM1 26
27 VSS49 28 0.1U 0.1U 0.1U 0.1U 0.1U
M_A_DQS#1 VSS53 M_CLK_DDR0
29 DQS#1 CK0 30 M_CLK_DDR0 (9)
M_A_DQS1 31 DQS1 M_CLK_DDR#0
CK0# 32 M_CLK_DDR#0 (9)
33 VSS39 VSS41 34
M_A_DQ15 35 DQ10 M_A_DQ9 SMDDR_VTERM
M_A_DQ11 DQ14 36 M_A_DQ10
37 DQ11 DQ15 38
39 VSS50 SMDDR_VTERM SMDDR_VREF +3V
VSS54 40
41 VSS18 VSS20 42
M_A_DQ17 43 44 M_A_DQ20 C209 C231 C227 C497 C504 C518 C214 C490 C258 C513 C509 C246 C215
M_A_DQ21 DQ16 DQ20 M_A_DQ16 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P 1000P
45 DQ17 DQ21 46
47 PC4800 DDR2 SDRAM 48 C147 C140 C292 C285
M_A_DQS#2 VSS1 VSS6 PM_EXTTS#0 0.1U 2.2U 2.2U 0.1U
49 DQS#2 NC3 50 PM_EXTTS#0 (9)
M_A_DQS2 51 52 M_A_DM2
DQS2 DM2
53 VSS19 VSS21 54
M_A_DQ19 55 56 M_A_DQ18
M_A_DQ22 DQ18 DQ22 M_A_DQ23
57 DQ19 DQ23 58
SO-DIMM (200P)
59 60
M_A_DQ25 61
VSS22
DQ24
VSS24
DQ28 62 M_A_DQ29 Place these Caps near So-Dimm1.
M_A_DQ24 63 64 M_A_DQ28
65
DQ25
VSS23
DQ29
VSS25 66 No Vias Between the Trace of PIN to
M_A_DM3 67 68 M_A_DQS#3
69
DM3
NC4
DQS#3
DQS3 70 M_A_DQS3 CAP.
B
71 VSS9 VSS10 72 B
M_A_DQ27 73 74 M_A_DQ26
75 DQ27 DQ31 76
77 VSS4 VSS8 78
M_CKE0 79 80 M_CKE1 M_ODT0 RP44 1 2 56X2
(9) M_CKE0 CKE0 CKE1 M_CKE1 (9) M_A_A13
81 VDD7 VDD8 82 3 4
83 84 M_A_A8 RP26 1 2 56X2
M_A_BS#2 NC1 A15 M_A_A5
(8) M_A_BS#2 85 A16_BA2 A14 86 3 4
87 88 M_A_A3 RP27 1 2 56X2
M_A_A12 VDD9 VDD11 M_A_A11 M_A_A1 SMDDR_VTERM
89 A12 A11 90 3 4
M_A_A9 91 92 M_A_A7
M_A_A8 A9 A7 M_A_A6 M_CKE1 RP39 56X2
93 A8 A6 94 1 2
95 96 M_A_A11 3 4
M_A_A5 VDD5 VDD4 M_A_A4 M_A_A10 RP28 56X2
97 A5 A4 98 1 2
M_A_A3 99 100 M_A_A2 M_A_BS#0 3 4
M_A_A1 A3 A2 M_A_A0 M_A_A7 RP40 56X2
101 A1 A0 102 1 2
103 104 M_A_A6 3 4
M_A_A10 VDD10 VDD12 M_A_BS#1 M_A_A4 RP41 56X2
105 A10/AP BA1 106 M_A_BS#1 (8) 1 2
M_A_BS#0 107 108 M_A_RAS# M_A_A2 3 4 SMDDR_VTERM
(8) M_A_BS#0 BA0 RAS# M_A_RAS# (8)
M_A_WE# 109 110 M_CS#0
(8) M_A_WE# WE# S0# M_CS#0 (9)
111 112 M_A_A0 RP42 1 2 56X2
M_A_CAS# VDD2 VDD1 M_ODT0 M_A_BS#1
(8) M_A_CAS# 113 CAS# ODT0 114 M_ODT0 (9) 3 4
M_CS#1 115 116 M_A_A13 M_A_A12 RP25 1 2 56X2
(9) M_CS#1 S1# A13
117 118 M_A_A9 3 4
M_ODT1 VDD3 VDD6 M_A_WE# RP29
(9) M_ODT1 119 ODT1 NC2 120 1 2 56X2
121 122 M_A_CAS# 3 4 SMDDR_VTERM
M_A_DQ36 VSS11 VSS12 M_A_DQ38
123 DQ32 DQ36 124
M_A_DQ34 125 126 M_A_DQ33 M_A_RAS# RP43 1 2 56X2
DQ33 DQ37 M_CS#0
127 VSS26 VSS28 128 3 4
C M_A_DQS#4 129 130 M_A_DM4 M_CS#1 RP30 1 2 56X2 C
M_A_DQS4 DQS#4 DM4 M_ODT1
131 DQS4 VSS42 132 3 4
133 134 M_A_DQ37 M_CKE0 RP24 1 2 56X2
M_A_DQ32 VSS2 DQ38 M_A_DQ35 M_A_BS#2 SMDDR_VTERM
135 DQ34 DQ39 136 3 4
M_A_DQ39 137 138
DQ35 VSS55 M_A_DQ42
139 VSS27 DQ44 140
M_A_DQ44 141 142 M_A_DQ40
M_A_DQ45 DQ40 DQ45
143 DQ41 VSS43 144
145 146 M_A_DQS#5
M_A_DM5 VSS29 DQS#5 M_A_DQS5
147 DM5 DQS5 148
149 VSS51 VSS56 150
M_A_DQ41 151 152 M_A_DQ47
153 DQ43 DQ47 154
155 VSS40 VSS44 156
M_A_DQ49 157 158 M_A_DQ53
159 DQ49 DQ53 160
161 VSS52 VSS57 162
163 164 M_CLK_DDR1
NCTEST CK1 M_CLK_DDR1 (9)
165 166 M_CLK_DDR#1
M_A_DQS#6 VSS30 CK1# M_CLK_DDR#1 (9)
167 DQS#6 VSS45 168
M_A_DQS6 169 170 M_A_DM6 SMDDR_VTERM
DQS6 DM6 SMDDR_VTERM (32,35)
171 VSS31 VSS32 172
M_A_DQ54 173 174 M_A_DQ51 SMDDR_VREF
DQ50 DQ54 SMDDR_VREF (9,35)
M_A_DQ50 175 176 M_A_DQ55
DQ51 DQ55
177 VSS33 VSS35 178
M_A_DQ58 179 180 M_A_DQ57
181 DQ57 DQ61 182
183 VSS3 VSS7 184
M_A_DM7 185 186 M_A_DQS#7
D DM7 DQS#7 M_A_DQS7 D
187 VSS34 DQS7 188
M_A_DQ62 189 190
M_A_DQ63 DQ58 VSS36 M_A_DQ61
191 DQ59 DQ62 192
193 194 M_A_DQ56
SMBDT VSS14 DQ63
(4,19,26) SMBDT 195 SDA VSS13 196
SMBCK 197 198 R438 10K
(4,19,26) SMBCK
+3V 199
SCL
VDD(SPD)
SA0
SA1 200 R443 10K PROJECT : OT1
DDR2_SODIMM Quanta Computer Inc.
CLOCK 0,1 SMbus address A0 Size Document Number Rev
H 5.2 Custom DDR SO-DIMM(200P) 1A
CKE 0,1
1 2 3 4 5 6 7 8
5 4 3 2 1
RTC VCCRTC
VCCRTC C389 1U +3V

3VPCU
D9
DB2 stage:C78,C79 change to 18P
CH500H-40 R310
20K C78 CLK_32KX1
7/12/2005
VCCRTC_2 18P R309 +3V +3V
D D
10K
1
D11
1
CH500H-40 Y4 R98
C390 G2 32.768KHZ 10M LDRQ#1
R326 R304 1U SHORT_ PAD1 R302 R318
2
1K 1M/F U10A 10K 10K
2
AB1 AA6 LAD0/FWH0
RTXC1 LAD0 LAD0/FWH0 (19,25,28,30)
C79 CLK_32KX2 AB2 AB5 LAD1/FWH1 KBCCPURST#
RTCX2 LAD1 LAD1/FWH1 (19,25,28,30)
CN22 18P AC4 LAD2/FWH2 GATEA20
LAD2 LAD2/FWH2 (19,25,28,30)
LPC
RTCRST#
RTC
AA3 Y6 LAD3/FWH3
1 RTCRST# LAD3 LAD3/FWH3 (19,25,28,30) +1.05V
2 SM_INTRUDER# LDRQ#0
Y5 INTRUDER# LDRQ0# AC3 LDRQ#0
BAT_CONN ICH_INTVRMEN W4 AA5 LDRQ#1
INTVRMEN LDRQ1#/GPIO23
W1 AB3 LFRAME#/FWH4
EE_CS LFRAME# LFRAME#/FWH4 (19,25,28,30)
Y1 EE_SHCLK
Y2 AE22 GATEA20 R333 R334 +1.05V
EE_DOUT A20GATE GATEA20 (25)
W3 AH28 H_A20M# *56/F *56/F
EE_DIN A20M# H_A20M# (5)
V3 AG27 TP_H_CPUSLP# R290 *0/F
LAN_CLK CPUSLP# H_CPUSLP# (5,7)
U3 AF24 H_DPRSTP#_R R317 *0/F R299
LAN_RSTSYNC TP1/DPRSTP# ICH_DPRSTP# (5)
LAN
CPU
AH25 H_DPSLP#_R R316 *0/F 56/F
TP2/DPSLP# H_DPSLP# (5)
U5 LAN_RXD0
FOR EMI V4 AG26 H_FERR#
LAN_RXD1 FERR# H_FERR# (5)
T5 LAN_RXD2
AG24 R301 0/F
GPIO49/CPUPWRGD H_PWRGD (5)
C68 C52 C61 C339 U7 LAN_TXD0
V6 LAN_TXD1
C *10P *10P *10P *10P V7 AG22 H_IGNNE# C
LAN_TXD2 IGNNE# H_IGNNE# (5)
AG21 FWH_INIT#
INIT3_3V# FWH_INIT# (30)
R97 39 ACZ_BCLK U1 AF22 H_INIT#
(23) ACZ_BITCLK_ADI ACZ_BIT_CLK INIT# H_INIT# (5)
R82 39 ACZ_SYNC R6 AF25 H_INTR
AC-97/AZALIA
(23) ACZ_SYNC_ADI ACZ_SYNC INTR H_INTR (5) +1.05V
R88 39 ACZ_RST# R5 AG23 KBCCPURST#
(23) ACZ_RST_ADI# ACZ_RST# RCIN# KBCCPURST# (25)
ACZ_SDIN0 T2 AH24 H_NMI
(23) ACZ_SDIN0 ACZ_SDIN0 NMI H_NMI (5)
ACZ_SDIN1 T3 AF23 H_SMI#_R R303 0/F R315
(28) ACZ_SDIN1 ACZ_SDIN1 SMI# H_SMI# (5)
T17 ACZ_SDIN2 T1 56/F
ACZ_SDIN2 H_STPCLK#
STPCLK# AH22 H_STPCLK# (5)
R275 39 ACZ_SDOUT T4
(23) ACZ_SDOUT_ADI ACZ_SDOUT
AF26 H_THERMTRIP_R R312 24.9/F
THERMTRIP# PM_THRMTRIP# (5,9)
AF18 SATALED#
R95 39 Should be 2" close ICH7
(28) ACZ_BITCLK_MDC PDD[15:0] (27)
R85 39 AF3 AB15 PDD0
(28) ACZ_SYNC_MDC SATA0RXN DD0
R92 39 AE3 AE14 PDD1
(28) ACZ_RST_MDC# SATA0RXP DD1
R276 39 AG2 AG13 PDD2
(28) ACZ_SDOUT_MDC SATA0TXN DD2
AH2 AF13 PDD3
SATA0TXP DD3 PDD4
DD4 AD14
C345 C64 C54 C66 AF7 AC13 PDD5
SATA2RXN DD5 PDD6
AE7 SATA2RXP DD6 AD12
*10P *10P *10P *10P 0-AUDIO AG6 AC12 PDD7
SATA2TXN DD7 PDD8
AH6 AE12
1-MODEM SATA2TXP DD8
AF12 PDD9
DD9 PDD10
FOR EMI AF1 SATA_CLKN SATA DD10 AB13
PDD11
AE1 SATA_CLKP DD11 AC14
AF14 PDD12
DD12 PDD13
AH10 SATARBIASN DD13 AH13
AG10 AH14 PDD14
B SATARBIASP DD14 PDD15 B
DD15 AC15
PDA[2:0] (27)
PDIOR# PDA0
(27) PDIOR#
PDIOW#
AF15
AH15
DIOR# IDE DA0 AH17
AE17 PDA1
(27) PDIOW# DIOW# DA1
PDDACK# AF16 AF17 PDA2
(27) PDDACK# DDACK# DA2
IRQ14 AH16
(27) IRQ14 IDEIRQ
PDIORDY AG16 AE16 PDCS1#
(27) PDIORDY IORDY DCS1# PDCS1# (27)
PDDREQ AE15 AD16 PDCS3#
(27) PDDREQ DDREQ DCS3# PDCS3# (27)
ICH7-M
VCCRTC +3V
ICH7 internal VR
enable strap
R279
STATUS INTVRMEN 332K R104 R105
8.2K 4.7K
Enable ICH_INTVRMEN
(default) 1
PDIORDY
Disable 0 R277 IRQ14
*0/F
A A
PROJECT : OT1
Custom ICH7-M HOST (1 OF 4) 1A

5 4 3 2 1
5 4 3 2 1
U10D
PCIE_RXN0 F26 V26 DMI_RXN0 +3V
(19) PCIE_RXN0 PERn1 DMI0RXN DMI_RXN0 (9)
PCIE_RXP0 F25 V25 DMI_RXP0
Direct Media Interface

(19) PCIE_RXP0 PERp1 DMI0RXP DMI_RXP0 (9) RP31
C319 0.1U PCIE_TXN0_C DMI_TXN0
MINI CARD PCI-E (19) PCIE_TXN0
C316 0.1U PCIE_TXP0_C
E28
E27
PETn1 DMI0TXN U28
U27 DMI_TXP0
DMI_TXN0 (9)
REQ4# 6 5
(19) PCIE_TXP0 PETp1 DMI0TXP DMI_TXP0 (9)
REQ1# 7 4 REQ2#
H26 Y26 DMI_RXN1 DEVSEL# 8 3 REQ3#
PERn2 DMI1RXN DMI_RXN1 (9)
H25 Y25 DMI_RXP1 FRAME# 9 2 SERR#
PERp2 DMI1RXP DMI_RXP1 (9)
G28 W28 DMI_TXN1 +3V 10 1 STOP#
PETn2 DMI1TXN DMI_TXN1 (9)
G27 W27 DMI_TXP1
PETp2 DMI1TXP DMI_TXP1 (9)
8.2KX8
PCI-Express
K26 AB26 DMI_RXN2
K25 AB25 DMI_RXP2
D PERp3 DMI2RXP DMI_RXP2 (9) D
J28 AA28 DMI_TXN2 +3V
J27 AA27 DMI_TXP2
PETp3 DMI2TXP DMI_TXP2 (9) RP32
M26 AD25 DMI_RXN3 LOCK# 6 5
M25 AD24 DMI_RXP3 +1.5V TRDY# 7 4
PERp4 DMI3RXP DMI_RXP3 (9)
L28 AC28 DMI_TXN3 INTE# 8 3 PERR#
L27 AC27 DMI_TXP3 INTG# 9 2 IRDY#
PETp4 DMI3TXP DMI_TXP3 (9)
+3V 10 1 REQ5#
3VSUS P26 AE28 CLK_PCIE_ICH#
PERn5 DMI_CLKN CLK_PCIE_ICH# (4)
P25 AE27 CLK_PCIE_ICH R259 8.2KX8
PERp5 DMI_CLKP CLK_PCIE_ICH (4)
N28 24.9/F
PETn5
N27 PETp5 DMI_ZCOMP C25 15/15mils
D25 DRI_IRCOMP_R Place within 500 +3V
DMI_IRCOMP
T25 mils of ICH7 RP33
R274 R272 R273 PERn6 USBP0-
T24 PERp6 USBP0N F1 USBP0- (28)
10K 10K 10K R28 F2 USBP0+ SYSTEM(RIGHT) REQ0# 6 5
PETn6 USBP0P USBP0+ (28)
R27 G4 USBP1- INTD# 7 4 INTH#
PETp6 USBP1N USBP1- (28)
G3 USBP1+ SYSTEM(LEFT) INTC# 8 3 INTF#
USBP1P USBP1+ (28)
SPI_SCLK R2 H1 USBP2- INTB# 9 2
(30) SPI_CLK SPI_CLK USBP2N USBP2- (28)
SPI_CS# P6 H2 USBP2+ Bluetooth Module +3V 10 1 INTA#
(30) SPI_CS# SPI_CS# USBP2P USBP2+ (28)
SPI_ARB P1 J4 USBP3-
SPI
T16 SPI_ARB USBP3N USBP3- (28)
J3 USBP3+ FINGER PRINT 8.2KX8
USBP3P USBP3+ (28)
SPI_SI P5 K1 USBP4-
(30) SPI_SI SPI_MOSI USBP4N USBP4- (31)
SPI_SO P2 K2 USBP4+ Docking
USB
(30) SPI_SO SPI_MISO USBP4P USBP4+ (31)
L4 USBP5- 3VSUS
USBP5N USBP5- (19)
USBOC#0 D3 L5 USBP5+ Mini PCI-E 1
OC0# USBP5P USBP5+ (19) RP34
USBOC#1 C4 M1 USBP6-
OC1# USBP6N T13
USBOC#2 D5 M2 USBP6+ USBOC#3 6 5
OC2# USBP6P T14
USBOC#3 D4 N4 USBP7- USBOC#4 7 4 USBOC#2
OC3# USBP7N T78
C USBOC#4 E5 N3 USBP7+ USBOC#0 8 3 USBOC#5 C
OC4# USBP7P T77
USBOC#5 C3 9 2 USBOC#7
USBOC#6 OC5#/GPIO29 USBOC#6
A2 OC6#/GPIO30 USBRBIAS# D2 3VSUS 10 1
USBOC#7 B3 D1 USB_RBIAS_PN
OC7#/GPIO31 USBRBIAS 8.2KX8
25mils/15mils
ICH7-M
CKL use 10Kohm
Place within 500 R54
mils of ICH7 22.6/F
R43 8.2K USB_OC1# USB_OC1# (28)

3VSUS
USBOC#1 R42 1K
(28) USBOC#1
C21
U10B 1000P
(20,22) AD[0..31]
AD0 E18 D7 REQ0#
AD0 REQ0# REQ0# (22)
AD1 GNT0#
AD2
C18
A16
AD1 PCI GNT0# E7
C16 REQ1#
GNT0# (22)
AD2 REQ1# REQ1# (20)
AD3 F18 D16 GNT1#
AD3 GNT1# GNT1# (20)
AD4
AD5
E16
A18
AD4 REQ2# C17
D17
REQ2#
GNT2#
T71
ICH7 Boot BIOS select
AD6 AD5 GNT2# REQ3# PCLK_ICH
E17 AD6 REQ3# E13
AD7 A17 F13 GNT3# R39 10K
AD7 GNT3# T74 +3V
AD8
AD9
A15
C14
AD8 REQ4#/GPIO22 A13
A14
REQ4#
GNT4# R40 *1K ICH7 Boot BIOS select
B AD9 GNT4#/GPIO48 B
AD10
AD11
E14
D14
AD10 GPIO1/REQ5# C8
D8
REQ5#
GNT5# R254 *1K STRAP GNT4# GNT5# R41
*33
AD11 GPIO17/GNT5#
AD12
AD13
B12
C13
AD12
B15 C/BE0# R44 10K LPC 1 1 (default)
AD13 C/BE0# C/BE0# (20,22) +3V
AD14
AD15
G15
G13
AD14 C/BE1# C12
D12
C/BE1#
C/BE2#
C/BE1# (20,22) SPI 0 1 C20
AD15 C/BE2# C/BE2# (20,22)
AD16 E12 C15 C/BE3# *10P
AD16 C/BE3# C/BE3# (20,22)
AD17 C11
AD18 AD17 IRDY#
D11 AD18 IRDY# A7 IRDY# (20,22)
AD19 A11 E10 PAR
AD19 PAR PAR (20,22)
AD20 A10 B18 PCIRST#
AD20 PCIRST# PCIRST# (20,22)
AD21 F11 A12 DEVSEL#
AD21 DEVSEL# DEVSEL# (20,22)
AD22 F10 C9 PERR#
AD23
AD24
E9
D9
AD22
AD23
PERR#
PLOCK# E11
B10
LOCK#
SERR#
PERR# (20,22)
FOR EMI
AD24 SERR# SERR# (20,22,25)
AD25 B9 F15 STOP#
AD25 STOP# STOP# (20,22)
AD26 A8 F14 TRDY#
AD26 TRDY# TRDY# (20,22)
AD27 A6 F16 FRAME#
AD27 FRAME# FRAME# (20,22)
AD28 C7
AD29 AD28 PLT_RST-R#
B6 AD29 PLTRST# C26 PLT_RST-R# (9)
AD30
AD31
E6
D6
AD30 PCICLK A9
B19
PCLK_ICH
PCI_PME#
PCLK_ICH (4)
PCI_PME# (20,22)
PCI DEVICES IRQ ROUTING
AD31 PME#
INTA# A3
Interrupt I/F G8 INTE# +3V DEVICE IDSEL # REQ/GNT # PCI_INT
PIRQA# GPIO2/PIRQE# INTE# (20)
(22) INTB#
INTB#
INTC#
B4 PIRQB# GPIO3/PIRQF# F7 INTF#
INTG#
GBIT ETHERNET AD16 0 B
(20) INTC# C5 PIRQC# GPIO4/PIRQG# F8
INTD# B5 G7 INTH#
(20) INTD# PIRQD# GPIO5/PIRQH# SES_INT (26)
C311
CardBus AD25 1 C,D,E
A
TP_ICH_RSVD1 AE5
MISC AE9 TP_ICH_RSVD6 DB2 stage:connect to U15 0.1U
A
T86 RSVD[1] RSVD[6] T84
T85 TP_ICH_RSVD2 AD5 AG8 TP_ICH_RSVD7
RSVD[2] RSVD[7] T18
5
T21 TP_ICH_RSVD3 AG4 AH8 TP_ICH_RSVD8 7/15/2005

RSVD[3] RSVD[8] T20
T19 TP_ICH_RSVD4 AH4 F21 RSVD9 PLT_RST-R# 2
TP_ICH_RSVD5 RSVD[4] RSVD[9]
T83 AD9 RSVD[5] MCH_SYNC# AH20 MCH_ICH_SYNC (9) 4 PLTRST# (16,19,25,27,28,30)
1
ICH7-M U23
TC7SH08FU
PROJECT : OT1
3
R34
*1K/F
Don't connect to PCI device / Express card Custom ICH7-M PCI E (2 OF 4) 1A

5 4 3 2 1
5 4 3 2 1
3V_S5
3V_S5 3V_S5
+3V
PCLK_SMB R32 2.2K RI# R25 10K
PDAT_SMB R17 2.2K SMB_LINK_ALERT# R15 10K NBSWON# R16 *10K CLKRUN# R102 8.2K
SMLINK0 R31 10K SYS_RST# R19 10K SERIRQ R108 8.2K
PCIE_WAKE# R26 1K SMLINK1 R33 10K
DB2 stage:R26 pull hi to 3V_S5 LID_SW# R29 10K
SMB_ALERT# R18 10K
DB2 stage:Delete R36 DB2 stage:Delete R28 C577
D *0.1U D
7/12/2005
7/12/2005 EMI ADD
U10C RSMRST# R282 10K

+3V PCLK_SMB C22 AF19 R306 100
(4) PCLK_SMB SMBCLK GPIO21/SATA0GP
PDAT_SMB B22 AH18 R308 100
SMB
(4) PDAT_SMB SMBDATA GPIO19/SATA1GP
SATA
SMB_LINK_ALERT# R307 100
GPIO
T62 A26 LINKALERT# GPIO36/SATA2GP AH19
T5 SMLINK0 B25 AE19 R305 100
SMLINK1 SMLINK0 GPIO37/SATA3GP
T6 A25 SMLINK1
R38 AC1 14M_ICH
CLK14 14M_ICH (4)
Clocks
+3V *1K/F RI# A28 B2 CLKUSB_48
RI# RI# CLK48 CLKUSB_48 (4)
PCSPK A19 C20
(23) PCSPK SPKR SUSCLK T73
SUS_STAT# A27
(25,28) SUS_STAT# SUS_STAT#
SYS_RST# A22 B24 SLP_S3#
(5) SYS_RST# SYS_RST# SLP_S3# SLP_S3# (25,30)
+3V R20 *10K D23 R267 *0
SLP_S4# SLP_S5# (30)
R278 0/F AB18 F22 R266 0
(9) PM_BMBUSY# GPIO0/BM_BUSY# SLP_S5#
R337 R322
*10K/F *10K/F SMB_ALERT# B23 AA4 ICH_PWROK DB2 stage
GPIO11/SMBALERT# PWROK R336 0
Power MGT
R321 0/F PM_STPPCI_ICH# AC20 AC22 PM_DPRSLPVR_R
C (4) PM_STPPCI# GPIO18/STPPCI# GPIO16/DPRSLPVR PM_DPRSLPVR (9,37) C
R319 0/F PM_STPCPU_ICH# AF21 R335 *100K
GPIO
(4) PM_STPCPU# GPIO20/STPCPU#
C21 PM_BATLOW#_R R24 0/F
SYS
No ASF support TP0/BATLOW# BATLOW# (25)
T7 A21 GPIO26
C23 NBSWON#
PWRBTN# NBSWON# (30)
LP_EN# B21
(22) LP_EN# GPIO27
DB2 stage:add GPIO27 pin funcion T68 FPBACK_R E23 GPIO28
R30 100K
C19 R27 0/F
(18) FPBACK_R LAN_RST# PLTRST# (15,19,25,27,28,30)
7/12/2005 +3V CLKRUN# AG18
(20,22,25,28) CLKRUN# GPIO32/CLKRUN#
Y4 PM_RSMRST#_R R280 100/F RSMRST#
RSMRST# RSMRST# (25)
FWH_WP# AC19
(30) FWH_WP# GPIO33/AZ_DOCK_EN#
FWH_TBL# GPIO9
(30) FWH_TBL# U2 GPIO34/AZ_DOCK_RST# GPIO9 E20
A20 LOM_LOW_PWR
T9 DB2 stage:Del GPIO9,add GPIO10(LOM_LOW_PWR)
GPIO10 LOM_LOW_PWR (22)
R320 PCIE_WAKE# SB_GPIO12
10K/F
(19) PCIE_WAKE#
SERIRQ
F20
AH21
WAKE# GPIO12 F19
E19 LID_SW#
T63 7/12/2005
(20,25,28) SERIRQ SERIRQ GPIO13 LID_SW# (18)
THERM_ALERT# AF20 R4 LAN_LED#
(5) THERM_ALERT# THRM# GPIO14 LAN_LED# (22,31)
E22 SB_GPIO15
GPIO15 T70
VR_PWRGD_CK410 AD22 R3 RF_OFF#
(4) VR_PWRGD_CK410 VRMPWRGD GPIO24 RF_OFF# (19)
R281 10K D20 BT_OFF#
+3V GPIO25 BT_OFF# (28)
(25) RUNSCI_EC# AC21 GPIO6 GPIO35 AD21 T122
PR_INSERT# AC18 SB_GPIO38 DB2 stage:Pin AD21 change to test pad
(22,23,31) PR_INSERT#
E21
GPIO7 GPIO GPIO38 AD20
AE20 SB_GPIO39
T75 GPIO8 GPIO39 T82 7/12/2005
ICH7-M
B B
SB_GPIO12 R37 10K 3V_S5 CLKUSB_48 14M_ICH
DB2 stage:R37 pull hi to 3V_S5 R50 R283

*10 *33
7/12/2005
3VSUS
3VSUS C33 C357
*10P *10P
C392
0.047U C360
0.047U FOR EMI
5
5
DELAY_VR_PWRGOOD 2
(9,37) DELAY_VR_PWRGOOD
4 2
PWROK 1 4 ICH_PWROK
(25) PWROK
1
U31
3
A TC7SH08FU U29 A
3
R311 TC7SH08FU R284
100K 10K
(5) XDP_DBRESET#
PROJECT : OT1
B ICH7-M GPIO (3 OF 4) 1A

5 4 3 2 1
5 4 3 2 1
U10E +5V +3V +1.05V

A4 P28 U10F
VSS[1] VSS[98] V5REF(1)
A23 VSS[2] VSS[99] R1 G10 V5REF[1] Vcc1_05[1] L11
2
B1 VSS[3] VSS[100] R11 Vcc1_05[2] L12
B8 R12 D7 AD17 L14 + C46
VSS[4] VSS[101] R103 5VPCU 3VPCU V5REF[2] Vcc1_05[3] 330U
B11 VSS[5] VSS[102] R13 PDZ5.6B Vcc1_05[4] L16
B14 R14 15/15mils 100/F V5REF_SUS F6 L17 C350 C348
VSS[6] VSS[103] 15/15mils V5REF_Sus Vcc1_05[5] 0.1U 0.1U
B17 R15 L18
1
VSS[7] VSS[104] Vcc1_05[6]
2
B20 VSS[8] VSS[105] R16 AA22 Vcc1_5_B[1] Vcc1_05[7] M11
B26 R17 D4 AA23 M18
VSS[9] VSS[106] C327 C361 R64 Vcc1_5_B[2] Vcc1_05[8]
CORE
B28 VSS[10] VSS[107] R18 PDZ5.6B AB22 Vcc1_5_B[3] Vcc1_05[9] P11
C2 T6 1U 0.1U 10 AB23 P18
VSS[11] VSS[108] Vcc1_5_B[4] Vcc1_05[10]
C6 T12 AC23 T11
1
VSS[12] VSS[109] Vcc1_5_B[5] Vcc1_05[11] C328 C340 C332 C353
D
C27 VSS[13] VSS[110] T13 AC24 Vcc1_5_B[6] Vcc1_05[12] T18 D
D10 T14 AC25 U11 0.1U 0.1U 0.1U 0.1U
VSS[14] VSS[111] C323 C41 Vcc1_5_B[7] Vcc1_05[13]
D13 VSS[15] VSS[112] T15 AC26 Vcc1_5_B[8] Vcc1_05[14] U18
D18 T16 1U 0.1U AD26 V11
VSS[16] VSS[113] Vcc1_5_B[9] Vcc1_05[15]
D21 VSS[17] VSS[114] T17 AD27 Vcc1_5_B[10] Vcc1_05[16] V12
D24 VSS[18] VSS[115] U4 AD28 Vcc1_5_B[11] Vcc1_05[17] V14
E1 U12 D26 V16 C334 C351 C338 C377 C333
VSS[19] VSS[116] Vcc1_5_B[12] Vcc1_05[18] 0.1U 0.1U 0.1U 0.1U 0.1U
E2 VSS[20] VSS[117] U13 D27 Vcc1_5_B[13] Vcc1_05[19] V17
E4 U14 +1.5V +1.5V_PCIE_ICH D28 V18 3V_S5
VSS[21] VSS[118] Vcc1_5_B[14] VCC PAUX Vcc1_05[20]
E8 VSS[22] VSS[119] U15 L31 E24 Vcc1_5_B[15]
E15 VSS[23] VSS[120] U16 E25 Vcc1_5_B[16] VccSus3_3/VccLAN3_3[1] V5
F3 U17 E26 V1 +3V
VSS[24] VSS[121] Vcc1_5_B[17] VccSus3_3/VccLAN3_3[2]
F4 VSS[25] VSS[122] U24 F23 Vcc1_5_B[18] VccSus3_3/VccLAN3_3[3] W2
F5 U25 BK1608HS800-T F24 W7 C317
VSS[26] VSS[123] + Vcc1_5_B[19] VccSus3_3/VccLAN3_3[4] 3V_S5 0.1U
F12 VSS[27] VSS[124] U26 G22 Vcc1_5_B[20]
F27 V2 C81 C358 C341 C336 G23 U6
VSS[28] VSS[125] 220U 0.1U 0.1U 0.1U Vcc1_5_B[21] Vcc3_3/VccHDA C352
F28 VSS[29] VSS[126] V13 H22 Vcc1_5_B[22]
G1 V15 H23 R7 0.1U
VSS[30] VSS[127] Vcc1_5_B[23] VccSus3_3/VccSusHDA C318
G2 VSS[31] VSS[128] V24 J22 Vcc1_5_B[24]
G5 V27 J23 AE23 0.1U +1.05V
VSS[32] VSS[129] Vcc1_5_B[25] V_CPU_IO[1]
G6 VSS[33] VSS[130] V28 change footprint 7/27/2005 K22 Vcc1_5_B[26] V_CPU_IO[2] AE26
G9 W6 K23 AH26
VCCA3GP
VSS[34] VSS[131] Vcc1_5_B[27] V_CPU_IO[3]
G14 VSS[35] VSS[132] W24 L22 Vcc1_5_B[28]
G18 W25 L23 AA7 +3V
VSS[36] VSS[133] Vcc1_5_B[29] Vcc3_3[3] C369 C359 C335
G21 VSS[37] VSS[134] W26 M22 Vcc1_5_B[30] Vcc3_3[4] AB12
G24 Y3 M23 AB20 0.1U 0.1U 4.7U/10V/1206
VSS[38] VSS[135] Vcc1_5_B[31] Vcc3_3[5]
G25 VSS[39] VSS[136] Y24 N22 Vcc1_5_B[32] Vcc3_3[6] AC16
G26 VSS[40] VSS[137] Y27 N23 Vcc1_5_B[33] Vcc3_3[7] AD13
IDE
H3 Y28 P22 AD18 C321
VSS[41] VSS[138] Vcc1_5_B[34] Vcc3_3[8] 0.1U
H4 VSS[42] VSS[139] AA1 P23 Vcc1_5_B[35] Vcc3_3[9] AG12
C H5 VSS[43] VSS[140] AA24 R22 Vcc1_5_B[36] Vcc3_3[10] AG15 C
H24 AA25 R23 AG19 +3V
VSS[44] VSS[141] Vcc1_5_B[37] Vcc3_3[11]
H27 VSS[45] VSS[142] AA26 R24 Vcc1_5_B[38]
H28 VSS[46] VSS[143] AB4 R25 Vcc1_5_B[39] Vcc3_3[12] A5
J1 VSS[47] VSS[144] AB6 R26 Vcc1_5_B[40] Vcc3_3[13] B13
J2 VSS[48] VSS[145] AB11 T22 Vcc1_5_B[41] Vcc3_3[14] B16
J5 AB14 +3V T23 B7 C312 C326 C378 C379
VSS[49] VSS[146] Vcc1_5_B[42] Vcc3_3[15] 0.1U 0.1U 0.1U 0.1U
J24 VSS[50] VSS[147] AB16 T26 Vcc1_5_B[43] Vcc3_3[16] C10
PCI
J25 VSS[51] VSS[148] AB19 T27 Vcc1_5_B[44] Vcc3_3[17] D15
J26 VSS[52] VSS[149] AB21 T28 Vcc1_5_B[45] Vcc3_3[18] F9
K24 VSS[53] VSS[150] AB24 U22 Vcc1_5_B[46] Vcc3_3[19] G11
K27 AB27 C322 U23 G12
VSS[54] VSS[151] 0.1U Vcc1_5_B[47] Vcc3_3[20] VCCRTC
K28 VSS[55] VSS[152] AB28 V22 Vcc1_5_B[48] Vcc3_3[21] G16
L13 VSS[56] VSS[153] AC2 V23 Vcc1_5_B[49]
L15 VSS[57] VSS[154] AC5 W22 Vcc1_5_B[50] VccRTC W5
L24 VSS[58] VSS[155] AC9 W23 Vcc1_5_B[51]
L25 AC11 Y22 P7 3V_S5
VSS[59] VSS[156] Vcc1_5_B[52] VccSus3_3[1] C349 C343
L26 VSS[60] VSS[157] AD1 Y23 Vcc1_5_B[53]
M3 AD3 +1.5V +1.5V_GPLL_ICH 30mils A24 0.1U 0.1U
VSS[61] VSS[158] L4 VccSus3_3[2]
M4 VSS[62] VSS[159] AD4 B27 Vcc3_3[1] VccSus3_3[3] C24
M5 AD7 R107 R106 1uH D19
VSS[63] VSS[160] 0/F 1 GPLL_R GPLL_R_L VccSus3_3[4] C331 C347
M12 VSS[64] VSS[161] AD8 AG28 VccDMIPLL VccSus3_3[5] D22
M13 AD11 G19 0.1U 0.1U
VSS[65] VSS[162] +1.5V VccSus3_3[6]
M14 VSS[66] VSS[163] AD15 AB7 Vcc1_5_A[1]
M15 AD19 C92 C94 AC6 K3
VSS[67] VSS[164] 10U/X6S Vcc1_5_A[2] VccSus3_3[7]
M16 VSS[68] VSS[165] AD23 AC7 Vcc1_5_A[3] VccSus3_3[8] K4
M17 AE2 .01U/50V/0603/X7R AD6 K5 3V_S5
VSS[69] VSS[166] Vcc1_5_A[4] VccSus3_3[9]
ARX
M24 VSS[70] VSS[167] AE4 AE6 Vcc1_5_A[5] VccSus3_3[10] K6
M27 AE8 +1.5V C370 AF5 L1
VSS[71] VSS[168] 1U Vcc1_5_A[6] VccSus3_3[11]
M28 VSS[72] VSS[169] AE11 AF6 Vcc1_5_A[7] VccSus3_3[12] L2
USB
B B
N1 VSS[73] VSS[170] AE13 AG5 Vcc1_5_A[8] VccSus3_3[13] L3
N2 AE18 AH5 L6 C344 C346
VSS[74] VSS[171] Vcc1_5_A[9] VccSus3_3[14] 0.1U 0.1U
N5 VSS[75] VSS[172] AE21 VccSus3_3[15] L7
N6 AE24 C371 AD2 M6
VSS[76] VSS[173] 0.1U VccSATAPLL VccSus3_3[16]
N11 VSS[77] VSS[174] AE25 VccSus3_3[17] M7
N12 AF2 +3V AH11 N7 +1.5V
VSS[78] VSS[175] Vcc3_3[2] VccSus3_3[18]
N13 VSS[79] VSS[176] AF4
N14 AF8 +1.5V AB10 AB17
VSS[80] VSS[177] C384 Vcc1_5_A[10] Vcc1_5_A[19] +1.5V
N15 VSS[81] VSS[178] AF11 30mils AB9 Vcc1_5_A[11] Vcc1_5_A[20] AC17
N16 AF27 0.1U AC10
VSS[82] VSS[179] 3VPCU Vcc1_5_A[12] C355
N17 VSS[83] VSS[180] AF28 AD10 Vcc1_5_A[13] Vcc1_5_A[21] T7
N18 AG1 AE10 F17 0.1U
VSS[84] VSS[181] Vcc1_5_A[14] Vcc1_5_A[22]
ATX
N24 AG3 R59 *0/F C313 AF10 G17 +1.5V
VSS[85] VSS[182] 3V_S5 1U Vcc1_5_A[15] Vcc1_5_A[23] C356 C354
N25 VSS[86] VSS[183] AG7 AF9 Vcc1_5_A[16]
N26 AG11 R61 AG9 AB8 0.1U 0.1U
VSS[87] VSS[184] 0/F Vcc1_5_A[17] Vcc1_5_A[24]
P3 VSS[88] VSS[185] AG14 AH9 Vcc1_5_A[18] Vcc1_5_A[25] AC8
P4 VSS[89] VSS[186] AG17
P12 AG20 +1.5V 3VS5_ICH_SUS3 E3 K7 TP_ICHVCCSUS1 T12 PAD C330
VSS[90] VSS[187] C337 VccSus3_3[19] VccSus1_05[1] 0.1U
P13 VSS[91] VSS[188] AG25
P14 AH1 0.1U C1 C28 TP_ICHVCCSUS2 T10 PAD
VSS[92] VSS[189] VccUSBPLL VccSus1_05[2] TP_ICHVCCSUS3 T76 PAD
P15 VSS[93] VSS[190] AH3 VccSus1_05[3] G20
P16 AH7 PAD T81 TPVCCSUSLAN1 AA2
VSS[94] VSS[191] C342 T80 TPVCCSUSLAN2 VccSus1_05/VccLAN1_05[1]
P17 VSS[95] VSS[192] AH12 Y7 VccSus1_05/VccLAN1_05[2]
Vcc1_5_A[26] A1
P24 AH23 0.1U PAD H6 +1.5V
VSS[96] VSS[193] Vcc1_5_A[27]
USB CORE
P27 VSS[97] VSS[194] AH27 Vcc1_5_A[28] H7
Vcc1_5_A[29] J6
ICH7-M J7
Vcc1_5_A[30]
ICH7-M C325
A 0.1U A
PROJECT : OT1
Custom ICH7-M POWER (4 OF 4) 1A

5 4 3 2 1
5 4 3 2 1
+3V
L6 *BK1608HS121-T
DPST_PWM (9)
5
CN9 2 L5 BK1608HS121-T
PWM_INV (25)
PWM_INV_1 4
32 30 FPBACK
31 29 VIN 1
28 +3V
1
U18
LCDVCC
3
D 27 TC7SH08FU D
26 C82 C80 C85 C84 C83 C97 C93 +3V 3VPCU
25 EDIDDATA_1 1000P 0.1U 1000P 0.1U 10U/25V 0.1U *0.1U/0402
2
24 EDIDCLK_1
23 +3V
22 R111
21 10K R136
20 *33K
19 D8
18 FPBACK R140 1K
17 2 1 LID_SW# (16)
R121
16
3
10K 1SS355
15
14
13 2
TXLOUT0+ Q16
12 TXLOUT0+ (9)
3
TXLOUT0- DTC144EUA
11 TXLOUT0- (9)
1
10 TXLOUT1+ LCD_BLON
9 TXLOUT1+ (9) (9) LCD_BLON 2
TXLOUT1- Q15
8 TXLOUT1- (9)
DTC144EUA CN2
7 TXLOUT2+
TXLOUT2+ (9)
1
6 TXLOUT2- 2
5 TXLOUT2- (9) 1
3
4 TXLCLKOUT+ LID SW
C 3 TXLCLKOUT+ (9) C
TXLCLKOUT- 2
2 TXLCLKOUT- (9) (16) FPBACK_R
Q14
1 *DTC144EUA DB2 stage:
LCD_CON30
1
Chanhed the footprint.
7/11/2005
PANEL VCC CONTROL
R84 10K
+3V
Q4
Q7 2N7002E SI3443DV
B 1 3 EDIDCLK_1 3 4 B
(9) EDIDCLK G S +3V
R72 2 D D 5 40mil LCDVCC
3
R100 10K *10K C53 1 6 L3
2
3300P D D FBM2125HM330
+3V
(9) DISP_ON 2
2
R99 10K Q3
DTC144EUA
1 3 EDIDDATA_1 C56 C63 C73 C71 C67
(9) EDIDDATA
1
R70 0.1U 10U/10V/0805 1000P 0.1U 4.7U/10V
Q6 2N7002E 100K
A A
PROJECT : OT1
B LCD CONN 1A

5 4 3 2 1
A B C D E
+1.5V
C409 C407 C411 C406
D
Mini PCI-E Card 1000P 0.01U 0.1U/10V 10U/10V/0805
3VSUS
C396 C413 C400

+3V +1.5V 3VSUS 1000P 0.1U/10V 1U
CN24
51 Reserved +3.3V 52
49 Reserved GND 50
47 48 +3V
Reserved +1.5V R329 0 BLUELED
45 Reserved LED_WPAN# 46
43 44 R328 0 RF_LINK
Reserved LED_WLAN#
41 Reserved LED_WWAN# 42 T87
39 Reserved GND 40
37 38 C424 C412 C419
Reserved USB_D+ USBP5+ (15)
35 36 1000P 0.1U/10V 10U/10V/0805
GND USB_D- USBP5- (15)
(15) PCIE_TXP0 33 PETp0 GND 34
(15) PCIE_TXN0 31 PETn0 SMB_DATA 32 SMBDT (4,13,26)
29 GND SMB_CLK 30 SMBCK (4,13,26)
C 27 GND +1.5V 28 C
C441 0.1U PCIE_RXP0_C 25 26
(15) PCIE_RXP0 PERp0 GND
C440 0.1U PCIE_RXN0_C 23 24
(15) PCIE_RXN0 PERn0 +3.3Vaux
DB2 stage:Delete Pin17,RP38 ,add R460 21 GND PERST# 22 PLTRST# (15,16,25,27,28,30)
R460 0 19 20 R330 0
(4) PCLK_DBP Reserved Reserved RF_OFF# (16)
7/12/2005 17 Reserved GND 18
3VSUS FOR DEBUG PORT(LPC) 15 GND Reserved 16 RP37 3 4 0X2 LAD0/FWH0

LAD0/FWH0 (14,25,28,30)
13 14 1 2 LAD1/FWH1
(4) CLK_PCIE_MINI REFCLK+ Reserved LAD1/FWH1 (14,25,28,30)
11 12 RP36 3 4 0X2 LAD2/FWH2
(4) CLK_PCIE_MINI# REFCLK- Reserved LAD2/FWH2 (14,25,28,30)
2
9 10 1 2 LAD3/FWH3
GND Reserved LAD3/FWH3 (14,25,28,30)
CLKREQB# 7 8 R325 0 LFRAME#/FWH4
(4) CLKREQB# CLKREQ# Reserved LFRAME#/FWH4 (14,25,28,30)
R355 0 CCI_CLK 5 6
(28) CH_CLK
(28) CH_DATA
R354 0 CCI_DATA 3
Reserved
Reserved
+1.5V
GND 4 FOR DEBUG PORT(LPC)
(16) PCIE_WAKE# 3 1 1 WAKE# +3.3V 2 +3V
Q26
DTC144EUA PCI-E Card D10 *SW1010C
RF_LINK 2 1 BLUELED
(29) RF_LINK
DB2 stage:
Chanhed the footprint.
Elson 7/11/2005
B B
DB2 stage:
Del CN5.
7/11/2005
A A
PROJECT : OT1
B MINI CARD 1A
Date: Wednesday, August 03, 2005 Sheet 19 of 38

A B C D E
5 4 3 2 1
DB2 stage: C450 18P

Chanhed the footprint. DB2 stage:change C450,C451 to 18,22P
1
7/11/2005 7/12/2005
Y7
U34A 24.576MHZ
GNT1# L2 R19 1394_XIN
(15) GNT1#
2
REQ1# GNT# XI 1394_XOUT C451 22P
(15) REQ1# L3 REQ# XO R18
AD25 R388 100R N5
FRAME# IDSEL R0 R364 6.34K
(15,22) FRAME# R6 FRAME# R0 T18
D IRDY# R1 R360 *0 D
(15,22) IRDY# V5 IRDY# R1 T19 3VSUS
DEVSEL# U6 R12 CPS R374 0 C467 1U R455 0
(15,22) DEVSEL# DEVSEL# CPS
5
6
7
8
TRDY# W5 P12 R375 0 EB5 *1632090
(15,22) TRDY# TRDY# TEST0
SERR# W6 R17 R367 56.2 3 3 4 4
5
6
7
8
1394 Interface
(15,22,25) SERR# SERR# VSSPLL
STOP# V6 R368 56.2 2 2 TPA0P_C 4
(15,22) STOP#
PERR# STOP# TPA0P 1 1 4
(15,22) PERR# R7 PERR# TPA0P V14
PAR U7 W14 TPA0N R454 0 TPA0N_C 3
(15,22) PAR PAR TPA0N 3
R13 TPBIAS0
C/BE3# TPBIAS0 TPB0P R453 0 TPB0P_C 2
(15,22) C/BE3# P2 CBE3 TPB0P V13 2
C/BE2# U5 W13 TPB0N
(15,22) C/BE2# CBE2 TPB0N
C/BE1# R369 56.2 TPB0_DFC468 220P TPB0N_C 1
1
(15,22) C/BE1# V7 CBE1 2 2 1 1 1
C/BE0# W10 V16 R372 56.2 R370 5.11K/F 3 4
(15,22) C/BE0# CBE0 TPA1P 3 4 *1632090
W16 EB4
PCLK_6611 TPA1N R452 0
(4) PCLK_6611 L1 PCLK TPBIAS1 W17 Closed Phy IC CN33
(21) GRST# TPB1P V15
PCIRST# K3 W15 1394_CONN
(15,22) PCIRST# PRST# TPB1N
R386 0 K5 GRST#
PCI Interface
(15,22) AD[0..31] P15 C460 1U
AD0 VDDPLL15 PHY_TEST_MA R363 4.7K
AD1
R11 AD00 PHY_TEST_MA P17 3VSUS DB2 stage:
P11 AD01
AD2 U11 U12 Chanhed the footprint.
AD3 AD02 PC0_RSVD 3VSUS
V11 AD03 PC1_RSVD V12 7/11/2005
AD4 W11 W12
AD5 AD04 PC2_RSVD
C R10 AD05 C
AD6 U10 U13
AD7 AD06 AGND_00 R385 3VSUS 3VSUS 3VSUS
V10 AD07 AGND_01 U14
AD8 R9 R14 43K
AD9 AD08 AGND_02
U9 AD09
AD10 V9 J5
AD11 AD10 SUSPEND# 7411_PME#
W9 AD11 RI_OUT# L5
AD12 V8 H3 PCMSPK# R382 R390
AD12 SPKROUT PCMSPK# (23)
AD13 U8 R394 43K 2.7K 2.7K
AD14 AD13 R387 0 U39
R8 AD14 VR_EN# K2
AD15 W7 E10 R373 *10K 8 1
Miscellaneous
AD15 USB_EN 3VSUS VCC A0
AD16 W4 7 2
AD17 AD16 SCL SCL NC A1
T2 AD17 SCL G2 6 SCL A3 3
AD18 T1 G3 SDA SDA 5 4
AD19 AD18 SDA SDA GND
R3 AD19
AD20 P5 G1 INTC# 24LC08
AD20 MFUNC0 INTC# (15)
AD21 R2 H5 INTD#
AD21 MFUNC1 INTD# (15)
AD22 R1 H2 INTE#
AD22 MFUNC2 INTE# (15)
AD23 P3 H1 SERIRQ
AD24 AD23 MFUNC3 PLOCK# SERIRQ (16,25,28)
N3 AD24 MFUNC4 J1 T108
AD25 N2 J2 CARD_LED
AD25 MFUNC5 T107
AD26 N1 J3 CLKRUN#
AD26 MFUNC6 CLKRUN# (16,22,25,28)
AD27 M5
AD28 AD27 TPS_LATCH
M6 AD28 LATCH/VD3/VPPD0 C9 TPS_LATCH (21)
B AD29 M3 A9 TPS_CLOCK C578 B
AD29 CLOCK/VD1/VCCD0# TPS_CLOCK (21,25)
AD30 M2 B9 TPS_DATA *0.1U
AD30 DATA/VD2/VPPD1 TPS_DATA (21)
AD31 M1 C4 PSMODE R376 10K
AD31 RSVD_03/VD0/VCCD1#/PS_MODE 3VSUS
PCI7612ZHK
FOR EMI
EMI 3VSUS
3VSUS
PCLK_6611
R391
R383 *100K
*22R
GRST#
R389
2
10K
C494 C502 R359
A *22P *0.22U *1M 7411_PME# 1 3 A
PCI_PME# (15,22)
Q27
2N7002E
PROJECT : OT1
B CardBus Connector 1A

5 4 3 2 1
5 4 3 2 1
U34B
F18 A_A16 R362 47 A_A16_R U34C
CCLK
CAUDIO B12 A_SPKR_P CN13 SC_OC# F2
A12 A_STSCHG_P A_D3 2 G5
CSTSCHG A_D4 SKTAAD0/D3 SC_PWR_CTRL
VCCCA_00 J19 3 SKTAAD1/D4 SC_VCC5 G6
A15 A_D11 37 C5
VCCCA_01 A_VCC SKTAAD2/D11 SD_CMD/M_ALE/SC_GPIO2
H14 A_A13 A_D5 4 A4
CPAR A_IOIS16# A_D12 SKTAD3/D5 SD_CLK/SM_RE#/SC_GPIO1
CCLKRUN# A11 38 SKTAD4/D12 SM_CLE/SC_GPIO0 B4
A_D6 5 D1
A_D14 A_D13 SKTAD5/D6 SM_R/B#/SC_RFU
RSVD_01/D14 M19 39 SKTAAD6/D13 SM_PHYS_WP#/SC_FCB E3
D A_A18 A_D7 R380 0 D
H17 6 E2 CLK48M (4)
FlashMedia Interface
RSVD_02/A18 A_D15 SKTAAD7/D7 SC_CLK
41 SKTAAD8/D15 SC_RST F5
CTRDY# G15 A_A22 A_A10 8 SKTAAD9/A10 SC_DATA E1
Y8 48MHz Clock +3V
F17 A_A15 A_CE2# 42 L44
CIRDY A_A20 A_OE# SKTAAD10/CE2# CLK48M_R
CSTOP# G18 9 SKTABAD11/OE# SKTA/VCC1 17 CLK_48 F1 3 OUT VDD 4
G19 A_A14 A_A11 10 51 A_VCC *FCM1608K221
CPERR# A_VS2# A_IORD# SKTAAD12/A11 SKTA/VCC2 R393 *0
CVS2/VS2# B16 44 SKTAAD13/IORD# SC_CD# F3 2 GND OE 1
E12 A_IREQ# A_A9 11 E9
CINT# A_WE# A_IOWR# SKTAAD14/A9 SD_CD# R384 *SG-8002CA 48M
CGRANT# G17 45 SKTAAD15/IOWR# MS_CD# A8
E19 A_A23 A_A17 46 B8 *33 C493 C484
CFRAME# A_A21 A_A24 SKTAAD16/A17 SM_CD# *0.01U *0.01U
CDEVSEL# F19 55 SKTAAD17/A24
C12 A_WAIT# A_A7 22 A3 L47
CSERR#/WAIT# A_INPACK# A_A25 SKTAAD18/A7 XD_CD#/SM_PHYS_WP# *FCM1608K221
C14 56
CARDBUS SLOT
CREQ#/INPACK# A_A19 A_A6 SKTAAD19/A25 C485
CBLOCK# H15 23 SKTAAD20/A6 MC_PWR_CTRL_0 C8
C15 A_RESET A_A5 24 F8 *10P
CRST# A_VS1# A_A4 SKTAAD21/A5 MC_PWR_CTRL_1/SM_R/B#
CVS1/VS1# A13 25 SKTAAD22/A4 MS_BS/SD_CMD/SM_WE# E8
A_A3 26 18 AVPP A7
CardBus Interface
A_CD2# A_A2 SKTAAD23/A3 SKTA/VPP1 MS_CLK/SD_CLK/SM_EL_WP#

CCD2#/CD2# B11 27 SKTAAD24/A2 SKTA/VPP2 52
N15 A_CD1# A_A1 28 B7 EMI
CCD1#/CD1# A_D2 A_A0 SKTAAD25/A1 MS_SDIO(DATA0)/SD_DATA0/SM_D0
RSVD_04/D2 B10 29 SKTAAD26/A0 MS_DATA1/SD_DATA1_SM_D1 C7
A_D0 30 C98 C100 A6
A_CE1# A_D8 SKTAAD27/D0 0.001U 10U/10V MS_DATA2/SD_DATA2_SM_D2
CCBE0 L17 64 SKTAAD28/D8 MS_DATA3/SD_DATA3_SM_D3 B6
H18 A_A8 A_D1 31 3VSUS 3VSUS
CCBE1 A_A12 A_D9 SKTAAD29/D1
C CCBE2 E18 65 SKTAAD30/D9 SD_WP/SM_CE# E7 C
E13 A_REG# A_D10 66
CCBE3 SKTAAD31/D10
SD_DAT0/SM_D4/SC_GPIO6 C6
P19 A_D3 A_CE1# 7 1 A5
CAD00 A_D4 A_A8 -SKTACBE0/CE1# GND1 SD_DAT1/SM_D5/SC_GPIO5 C475 C474 C453 C452 C472 C470 C465 C463
CAD01 N18 12 -SKTACBE1/A8 GND2 34 SD_DAT2/SM_D6/SC_GPIO4 B5
N17 A_D11 A_A12 21 35 E6 0.001U .01U 0.1U 0.1U 0.001U .01U 0.1U 0.1U
CAD02 A_D5 A_REG# -SKTACBE2/A12 GND3 SD_DAT3/SM_D7/SC_GPIO3
CAD03 M15 61 -SKTACBE3/REG# GND4 68
N19 A_D12 69 PCI7612ZHK
CAD04 A_D6 A_A16_R GND5
CAD05 M18 19 SKTAPCLK/A16 GND6 70
M17 A_D13 A_A23 54 71 DB2 stage:
CAD06 A_D7 A_A15 -SKTAFRAME/A23 GND7
CAD07 L19 20 -SKTAIRDY/A15 GND8 72
L18 A_D15 A_A22 53 Modify CN13#71. DB2 stage:
CAD08 A_A10 A_A21 -SKTATRDY/A22
CAD09 L15 50 -SKTADEVSEL/A21 7/11/2005 Del R358.
K18 A_CE2# A_A20 49 3VSUS 3VSUS
CAD10 A_OE# A_A13 -SKTASTOP/A20
CAD11 K17
A_A11 A_A14
13 SKTAPAR/A13 3VSUS
7/11/2005
K15 14 U34D
CAD12 A_IORD# A_WAIT# -SKTAPERR/A14
CAD13 J18 59 0SKTASERR/WAIT# VCC33_00 J6
J15 A_A9 A_INPACK# 60 L39 C480 1U K1 L6
CAD14 A_IOWR# A_WE# -SKTAREQ/INPACK# FBM1608 C455 1U 1.5V_00 VCC33_01 C479 C478
CAD15 J17 15 -SKTAGNT/WE# K19 1.5V_01 VCC33_02 P6
H19 A_A17 A_IREQ# 16 VDDPLL33 U19 P8 0.1U 0.1U
CAD16 A_A24 A_A19 -SKTAINT/RDY VDDPLL33 VCC33_03
CAD17 F15 48 -SKTALOCK/A19 VCC33_04 P10
E17 A_A7 A_IOIS16# 33 L14
Power/GND
CAD18 A_A25 A_RESET -SKTACLKRUN/WP C458 C456 C457 C449 C445 VCC33_05
CAD19 D19 58 -SKTARST/RESET H6 GND_00 VCC33_06 J14
A16 A_A6 A_D14 40 0.1U .01U 0.1U 0.1U 10U/10V K6 F14
CAD20 A_A5 A_A18 SKTARSVD/D14 GND_01 VCC33_07
B
CAD21 E14 47 -SKTRSVD/A18 N6 GND_02 VCC33_08 F12 B
B15 A_A4 A_VS1# 43 P7 F9 3VSUS
CAD22 A_A3 A_VS2# -SKTAVS1/VS1# GND_03 VCC33_09 L40
CAD23 B14 57 -SKTAVS2VS2# P9 GND_04 VCC33_10 F6
A14 A_A2 A_CD1# 36 M14 FBM1608
CAD24 A_A1 A_CD2# -SKTACD1/CD1# GND_05 AVDD33
CAD25 C13 67 -SKTACD2/CD2# K14 GND_06 AVDD33_00 P13
B13 A_A0 A_SPKR_P 62 G14 P14
CAD26 A_D0 A_STSCHG_P SKTAAUDIO/BVD2 GND_07 AVDD33_01
CAD27 C11 63 -SKTASTSCHG/BVD1 F13 GND_08 AVDD33_02 U15
E11 A_D8 A_D2 32 F10 C461 C462 C464 C459
CAD28 A_D1 SKTARSVD/D2 GND_09 0.1U 0.1U 10U/10V 0.1U
CAD29 F11 F7 GND_10 VCCP_00 P1
A10 A_D9 W8
CAD30 A_D10 VCCP_01
CAD31 C10
PCI7612ZHK
PCI7612ZHK CARDBUS SLOT 3VSUS
pci-130671-9-68p
C469 C481 C482
CARDBUS POWER SWITCH 5VSUS 5VSUS 0.1U 0.1U 10U/10V
A_VCC 3VSUS 5VSUS U33

1 5V_0 5V_2 24
2 5V_1 NC_3 23
TPS_DATA 3 22
(20) TPS_DATA DATA NC_2
TPS_CLOCK 4 21
(20,25) TPS_CLOCK CLOCK SHDN#
C454 C442 C466 C99 C443 C447 C448 C434 C433 C435 C432 TPS_LATCH 5 20
(20) TPS_LATCH LATCH 12V_1
A 0.1U 0.1U 0.1U 0.001U 10U/10V 0.1U 0.1U 0.1U 0.1U 0.1U 0.1U 6 19 A
NC_0 BVPP/BVCORE
7 12V_0 BVCC1 18
TPS_CLOCK AVPP 8 17
AVPP/AVCORE BVCC0
9 16
A_VCC
10
AVCC0
AVCC1
NC_1
OC# 15 PROJECT : OT1
11 14 3VSUS
GND 3.3VIN0
NC
GRST# 12 13
(20) GRST# RESET# 3.3VIN1
R350
*43K TPS2220B(PWR) Size Document Number Rev
25
B CardBus 1A

5 4 3 2 1
5 4 3 2 1
+3V 1.2V_LAN
LAN LAN_VDDIO
LANVCC
10 mil
-EEWP
8
7
U17
M24C64
VCC
WP#
A0
A1
1
2
C418 C428 C417 C427 C414 C415 C420 C416 EECLK 6 3
M14
N14
E12
K10
P12
P13
P14
SCL A3
L10
J10
G1
C5
N6
H5
H6
H7
H8
EEDATA
A7
B3
E1
E4
K3
P2
K5
K6
K7
K8
K9
P8
.01U .1U .01U .1U .01U .1U .01U .1U C380
L4
L5
5 4
J5
J6
J7
J8
J9
.1U SDA GND
U19
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI
10 mil L38 10 mil
AD[0..31] A14 BIASVDD 1 2
(15,20) AD[0..31] BIASVDD 2.5V_LAN
A11 L33 0 BLM11A601S
AD0 VDDIO LANVCC LANVCC
N7 F11 C421 *.47U
D
AD1 AD0 VDDIO C425
D
M7 AD1 VDDIO K12
AD2 10 mil 100P
AD3
AD4
P6
P5
N5
AD2
AD3
BCM5788M VDDIO
L12
P1 VESD
R295
0
AD5 AD4 VESD1 C439 C438 C437 C436
M5
AD5 VESD2
G2 10 mil
AD6 P4 A1 L32 *0 .01U .01U .01U .01U R298 Q9
AD6 VESD3 +3V
2
AD7 N4 C368 *.47U 10K 2N7002E
AD8 AD7
P3 K14 2.5_VDDP 15 mil
AD8 NC/VDDP
2
4
2
4
2
4
2
4
EMI AD9 N3 L13 -LAN_PME 1 3
AD10 AD9 NC/VDDP PCI_PME# (15,20)
N2 P11
PCLK_LAN
AD11
AD12
M1
M2
AD10
AD11
BCM5788M LAN VDDP
NC/AVDD
A13
F14 L36 0
15 mil
RP5 RP4 RP3 RP2
AD12 NC/AVDD 2.5V_LAN
AD13 M3 C423 *.47U 49.9/FX2 49.9/FX2 49.9/FX2 49.9/FX2
AD14 AD13
L1
1
3
1
3
1
3
1
3
AD15 AD14
L2 F12 1.2V_AVDD 10 mil
R292 AD16 AD15 EPHY_AVDD/AVDDL L37 0
K1 F13 1.2V_LAN
*33 AD17 AD16 EPHY_AVDD/AVDDL C430 *.47U 2.5V_LAN
E3
AD18 AD17 TX3N_R
D1 E14
AD19 AD18 NC/TRD[3]- TX3P_R VESD C372 .01U
D2 E13
AD20 AD19 NC/TRD[3]+
D3
C367 AD21 AD20 TX2N_R C373 .1U
C1 D14
*10P AD22 AD21 NC/TRD[2]- TX2P_R C116 C403 C426 C399
B1 D13
AD23 AD22 NC/TRD[2]+ 4.7U .1U .01U .1U C364 .01U
B2
AD24 AD23 TX1N_R
B4 C14
AD25 AD24 RDN/TRD[1]- TX1P_R
A5 C13
AD26 AD25 RDP/TRD[1]+
B5
AD27 AD26 TX0N_R
B6 B14
AD28 AD27 TDN/TRD[0]- TX0P_R
C6 B13
AD29 AD28 TDP/TRD[0]+
C7
AD30 AD29
A8 G13 -LAN_LILED_10
AD31 AD30 LINK_LED10#/LINKLEDB
B8 H13 -LAN_100LED_100 LAN_LED#
AD31 LINK_LED100#/SPD100LEDB
COL_LED#/SPD1000LEDB
ACT_LED#/TRAFFICLEDB
G12 -LAN_1000LED_1000
G14
R340 *0
LAN_ACTLED#
LAN_LED# (16,31)
LAN_ACTLED# (31)
Check Layout
C/BE0#
(15,20)
(15,20)
C/BE0#
C/BE1#
C/BE1#
C/BE2#
M4
L3
F3
CBE_0#
CBE_1# RDAC
D10 LAN_RDAC R323 1.24K/F Footprint
R342 *4.7K
(15,20)
(15,20)
C/BE2#
C/BE3# C/BE3# C4
CBE_2#
CBE_3# GPIO0
H12
K13 -EEWP R341 4.7K 2.5V_LAN
LAN Transformer
C 10 mil 15 mil C
LANVCC
R343 4.7K
(15) REQ0#
VAUXPRSNT
REQ0#
GNT0#
J12
C3
VAUXPRSNT
REQ#
15mm x 15mm GPIO1
GPIO2
J13
LANVCC
L17 C540 C537
J3 M10 EECLK R331 4.7K BLM11A601S .01U .01U
(15) GNT0#
(15,20) FRAME#
(15,20) IRDY#
FRAME#
IRDY#
DEVSEL#
F2
F1
GNT#
FRAME#
IRDY#
BGA196 SPROM_CLK/EECLK
SPROM_CS/EEDATA
P10 EEDATA R324 4.7K 1 2
TX0P_R
2.5V_LAN_TR 1
U43
TCT1 MCT1
24 MCT1 R207
XTX0P
75/F
(15,20) DEVSEL# H3 2 23
STOP# DEVSEL# TX0N_R TD1+ MX1+ XTX0N
(15,20) STOP# H1 N9 3 22
TRDY# STOP# SPROMDOUT/NC TD1- MX1-
(15,20) TRDY#
PAR
G3
J1
TRDY# SPROMDIN/NC
P9 DB stage:add R339 4 21 MCT2 R204 75/F
(15,20) PAR PAR TCT2 MCT2
PERR# J2 7/12/2005 TX1P_R 5 20 XTX1P
(15,20) PERR# PERR# TD+ MX2+
(15,20,25) SERR# SERR# A2 TX1N_R 6 19 XTX1N
INTB# SERR# TD2- MX2-
(15) INTB# H2 D11 -BCM_TRST R339 4.7K
PCIRST# INTA# TRST# MCT3 R201 75/F
(15,20) PCIRST# C2 D12 7 18
PCLK_LAN PCI_RST# TDI R338 *4.7K TX2P_R TCT3 MCT3 XTX2P
(4) PCLK_LAN A3 C12 40mils 8 17
AD16 R287 100 IDSELLAN PCI_CLK TCK TX2N_R TD3+ MX3+ XTX2N
A4 A12 LANVCC 9 16
-LAN_PME IDSEL TMS TD3- MX3-
A6 B12
R286 *0 -LAN_CLKRUN PME# TDO Q11 MCT4 R200 75/F
(16,20,25,28) CLKRUN# 10 15
TCT4 MCT4
3
B11 BCP69T1 TX3P_R 11 14 XTX3P
R313 *10K CSTSCHG REGIN33/REGSUP25 C101 C95 TX3N_R TD4+ MX4+ XTX3N
C8 12 13
E
R285 1K -LAN_CLKRUN H4 CSTSCHG .01U 4.7U TD4- MX4- C271
C11 1
R109 *4.7K BCM_SMCLK A10 CLKRUN# NC/REGCTL25 B GST5009 1000P
4
SMB_CLK C
C
R314 *4.7K BCM_SMDATA C9 C10 2.5V@88mA 0.564W C548 C556 CC1808
LANVCC SMB_DATA OUT33/REGSEN25
LOW_PWR_1 M11 .01U .01U
40mils
2
LOW_PWR Q21
2.5V_LAN
3
F4 B9 BCP69T1
M66EN NC/REGSUP12
E
10 mil B10 1 C121 C125 C126 C122 XTX0N
NC/REGCTL12 B XTX0N (31)
8 mil J14 4 .1U .01U .1U 4.7U XTX0P
2.5V_LAN XTALVDD C XTX0P (31)
C
C102 27P LAN_XIN N11 A9
LAN_XOUT XTALI REGOUT18/REGSEN12 XTX1N
N10
2
XTALO XTX1N (31)
2
L7 XTX1P
NC XTX1P (31)
Y5 K11 R356
25Mhz NC *1K XTX2N
NC
K4 40mils 1.2V@618mA 0.803W XTX2N (31)
J11 XTX2P
1
NC 1.2V_LAN XTX2P (31)

C91 27P R110 200 J4
NC XTX3N
H10 XTX3N (31)
NC C136 C134 C130 C124 XTX3P
B NC M8 XTX3P (31) B
10 mil L9 P7 L14 .1U .01U .1U 4.7U
LAN_PLLVDD2 NC/PLLVDD3 VSS/NC
1.2V_LAN 1 2 H14 L11
BLM11A601S PLLVDD2 VSS/NC LANVCC
1.5" AWAY FROM CHIP
NC/CS# H11 Use Philips BCP69-16, hfe=75~275
L8 E11
C113
.01U
C115
2.2U
M9
N8
NC
NC
EECLK_PXE/SCLK
EEDATA_PXE/SI
E10
G11
LANVCC
R466
RJ45 Connector
NC NC/SO
NC/VSS
ND/VSS
10K
LANVCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
LOW_PWR R332 0 LOW_PWR_1 CN26

R462 R195 150 9
LANVCC G+
5
10K LAN_LED_M# 10
B7
D4
D5
D6
D7
D8
D9
E2
E5
E6
E7
E8
E9
F5
F6
F7
F8
F9
F10
G4
G5
G6
G7
G8
G9
G10
H9
K2
L6
L9
M6
M12
M13
N1
N12
N13
G-
3
DET_P R463 0 2 4 R464
LOM_LOW_PWR (16) XTX0P 1
*0 TX+/0+
(16) LP_EN# 2
U46 XTX0N 2
Check
3
1
C576 7SV17 Q40 TX-/0-

7/19/2005 *0.1U 2N7002E XTX1P 3
RX+/1+
Layout
1
XTX2P 4
NC1/2+
DB2 stage:add NIC power down circuitry
Footprint XTX2N
XTX1N
5
6
NC2/2-
RX-/1-
DB2 stage:change Q18,Q19 PIN1,PIN3 XTX3P 7
NC/3+
+3V
LANVCC XTX3N
7/12/2005 8
NC4/3-
LANVCC
DB2 stage:U16 power source change to 3V_S5 TO SYSTEM TO DOCK
DET_P R215 150 11
LANVCC Y+
C74 C393 C395 C386 C374 C385 C376 C75 C76 C363 C362 C383 LAN_ACTLED_M# 12
4.7U .1U .01U .1U .01U .1U .01U 4.7U 4.7U .1U .01U .01U
7/12/2005 LAN_LED_M# 3 1 LAN_LED# Y-
R465 RJ45
3V_S5 R291 10K LANVCC R352
10K Q18 0
2
A Q10 2N7002E A
LAN_ON# 3 4
G S 3VPCU
1
1.2V_LAN
C96 C381 2 5 R351
D D
3
0.047U .1U 1 6 10K 2

2
D D
DB2 stage:For test only .when do not mount, low power enable
SI3443DV 2 LAN_ACTLED_M# 3 1 LAN_ACTLED#
LANVCC
5
C431 C117 C394 C397 C404 C388 C405 C410 C398 C391 C429 C422
3
*4.7U 4.7U .1U .01U .1U .01U .1U .01U .1U .01U .1U .01U 2 Q17
(30,32) S5_ON
4 2 DTC144EUA Q19
1
1 Q8 2 2N7002E
(25,33) ACPRES
U16 DTC144EUA
(16,23,31) PR_INSERT#
Q20 PROJECT : OT1
7SZ32 DTC144EUA
1

1

C BCM5788M 1A

5 4 3 2 1
5 4 3 2 1
3V_DVDD AVDD
+3V DB2 stage:Change to 0 ohm
+5V
U37 L45
L48 0 5 1 1 2
Vout Vin BLM11A601S
4 BYP
D C517 C521 C524 C525 C526 C557 C544 C549 C498 C495 C503 C477 C476 D
10U/10V 0.1U 10U/10V 0.1U 0.1U 0.1U 0.1U 10U/10V 2 3 0.1U 0.047U 1U 0.1U 10U/10V
C512 GND EN
PLACED NEAR 1U TPS793475_NC
PIN1&9 AGND MAINON
MAINON (30,32,35,36)
AGND AGND Vset=1.242V
25
38
1
9
U41
DVDD1
DVDD2
AVDD1
AVDD2
DB2 stage:Change
MONO-O 37
ACZ_SYNC_ADI 10 41 HP_OUT_R PORT PLACE TO

(14) ACZ_SYNC_ADI SYNC PORT-A_R HP_OUT_R (24)
ACZ_BITCLK_ADI R407 0 AC_BITCLK1 HP_OUT_L
AC_BITCLK1
(14) ACZ_BITCLK_ADI
ACZ_SDOUT_ADI
6
5
BIT-CLK PORT-A_L 39 HP_OUT_L (24) MONO_OUT X
(14) ACZ_SDOUT_ADI SDATA-OUT
ACZ_SDIN0 R406 39 AC_SDIN MIC2
(14) ACZ_SDIN0 ACZ_RST_ADI#
8
11
SDATA-IN PORT-B_R 22
21 MIC1 MIC2 (24) PORT A HP OUT, DOCK HP LO
(14) ACZ_RST_ADI# RESET# PORT-B_L MIC1 (24)
R402 24 LINE_IN_R C550 1U LINE_IN_R_1 R434 4.7K
PORT B M/B MIC
*33 SENSE_A_A_R R427 *4.7K PORT-C_R LINE_IN_L C547 1U LINE_IN_L_1 R430 4.7K DOCK_LINE_IN_R (31)
(24) SENSE_A_A_R
R425 *4.7K
43
44
GPIO0_JS1 PORT-C_L 23
DOCK_LINE_IN_L (31) PORT C DOCK LI
AGND R421 *4.7K GPIO1/JS0 LINE_OUTR1 C561 0.1U LINE_OUTR
R408 *4.7K
2
3
GPIO2 PORT-D_R 36
35 LINE_OUTL1 C560 0.1U LINE_OUTL LINE_OUTR (24) PORT D M/B SPK
C (16,22,31) PR_INSERT# GPIO3 PORT-D_L LINE_OUTL (24) C
C519
*10P DB2 stage:Change R421 to 4.7k ohm 15
PORT E X
PORT-E_R R431 4.7K
EAPD 47
PORT-E_L 14
AVDD AVDD R435 4.7K AGND
PORT F X
(24,25) EAPD EPAD
48 SPDIF_OUT PORT-F_R 17
BEEP1 R405 47K BEEP2 C533 0.1U BEEP 12 16
PCBEEP PORT-F_L
27 VREF_FILT
CD-R 20 DB2 stage:
18 R439 R426
R413 C531 CD-L 2.2K 2.67K/F Chanhed the footprint.
31 NC CD-GND 19
4.7K .01U C559 C558 33 7/11/2005
1U 0.1U NC
40 NC MIC_BIAS_B 28
45 29 R440 0
NC MIC_BIAS_C
46 NC MIC_BIAS_D 32
30 R441
AGND AGND AGND MIC_BIAS_F
SENSE_B/SRC_A 34 *0
SENSE_A/SRC_B 13
R422 39.2K/F SENSE_A_A
SENSE_A_A (24)
DVSS1
DVSS2
AVSS1
AVSS2
R423 0 SENSE_A_R R424 20K/F SENSE_A_B AVDD
SENSE_A_B (24)
R419 10K/F SENSE_A_C
AD1981HDJSTZ
4
7
26
42
B R417 B
3
*10K
C538 2 LINE_IN_SENSE
LINE_IN_SENSE (31)
1U
Q29
1
2N7002 C535
AGND R461 *1U
AGND 100K
PC BEEP CONTROL AGND
AGND
AVDD
DB2 stage:delete R417,C535 ,Add R461
R398 0_1206 AGND
7/13/2005
C522 C408 *.01U
NORMAL : LOW 0.1U
5
C491 *.01U
1 AGND
(20) PCMSPK#
4 BEEP1 C543 *.01U
(16) PCSPK 2
C287 *.01U
U40
3
7SH86 C552 *.01U
A C571 *.01U A
AGND C532 *.01U
PROJECT : OT1
AGND Quanta Computer Inc.
R236 CLOSE TO CODEC #7 #26 Size Document Number Rev
B AUDIO AD1981HD CODEC 1A

5 4 3 2 1
5 4 3 2 1
DB2 stage: +5V

R400,R401 change vaule to 34.8k,R399 change to 16.2K
1
7/13/2005 C500 C507
10U .1U_10V
2
R401 34.8K/F U38 AGND CN12
(23) LINE_OUTR
R400 34.8K/F LINE_OUT 4 5 SPK+ L35 BK1608LL121 SPK_1+
(23) LINE_OUTL IN- VO+ 2
3 6 SPK_1-
D
AGND
C523 0.1U R399 16.2K 2
1
IN+
BYPASS
VDD
GND 7
8 SPK- L34 BK1608LL121
1
Speaker
INT. SPEAKER D
SHUTDOWN VO-
+5V C530 TPA6211A1DRBR C401 C402
10U 100P 100P
AGND
R396 AGND
10K
AGND
MUTE_AMP
3
(23,25) EAPD 2 (25) A_SD 2
Q31 Q30
1
*2N7002 2N7002
AGND AGND
(31) DOCK_HP_OUT_L
(31) DOCK_HP_OUT_R
CN32
1 7
HP_OUT_L HP_L HP_L_1 HP_L_2
+
C277 100U/6.3V R245 16 L26 BK1608LL121 2

(23) HP_OUT_L
6
HP_OUT_R HP_R HP_R_1 HP_R_2
+
C272 100U/6.3V R212 16 L21 BK1608LL121 3

C
(23) HP_OUT_R
4
5 8
LINE OUT DB2 stage: C
Chanhed location for MIC and line out

R226 R242 C293 C294 HP-JACK-GREEN 7/13/2005
1K 1K 470P 470P
AVDD
SENSE_A_A_R T-GND T-GND
(23) SENSE_A_A_R
AGND AGND AGND AGND
SENSE_A_A AVDD
(23) SENSE_A_A
R206 AVDD
100K
3
AVDD R211 0_1206

2 R436
100K C563 *.01U
3
Q35
1
2N7002 2 R233 R459 R457

100K 470 470
3
AGND Q34
1
2N7002 2 R232 100K T-GND
AGND Q22
1
2N7002 C274
2.2U C298
4.7U
R458
3.9K
R456
3.9K
C297
4.7U
MIC
3
B
DOCK_HP_SENSE 2 AGND AGND AGND AGND CN31 B
(31) DOCK_HP_SENSE
1 7
Q36 EXT_MIC1 L28 BK1608LL121 EXT_MIC1_4 2
1
2N7002 AVDD 6
R442 EXT_MIC2 L27 BK1608LL121 EXT_MIC2_4 3
100K AGND 4
5 8
R433 C295 C296 MIC-JACK-PINK

AGND 33K 470P 470P
CLOSE TO #3 #5 DB2 stage:Close CN32

AGND AGND T-GND T-GND
AVDD
R432 C545 C539 AVDD
33K .01U 4.7U
(23) SENSE_A_B
AGND AGND AGND U45 C568 R246
3
CLOSE TO #2 #3 3 8 .1U_16V 47K
1IN+ VDD+ MICSENSE
5 2IN+ GND 4 2
CLOSE TO #5 #6 Q37
1
C553 C555 AGND 2N7002 C286
33P 33P 0.1U
EXT_MIC1 C574 0.22U EXT_MIC1_1 L50 BK1608LL121 EXT_MIC1_2 R449 10K EXT_MIC1_3 2 1 MIC1_1 C541 1U
1IN- 1OUT MIC1 (23)
A EXT_MIC2 C573 0.22U EXT_MIC2_1 L49 BK1608LL121 EXT_MIC2_2 R448 10K EXT_MIC2_3 6 7 MIC2_1 C546 1U AGND AGND A
2IN- 2OUT MIC2 (23)
TLV2462CDGKR
C570 C569
68P 68P R446 100K DB2 stage:
AGND AGND
C565 180P Chanhed the footprint. PROJECT : OT1
7/11/2005
R444 100K Quanta Computer Inc.
C562 180P Size Document Number Rev
Custom AUDIO AMP & AUDIO JACK 1A
Date: Tuesday, August 02, 2005 Sheet 24 of 38

5 4 3 2 1
5 4 3 2 1
FOR DEBUG
3VPCU +3V
PORT (BIOS)
PCLK_KBC
C19 C18 C32 C40 C47 C25 C43 C35 C30
10U/10V/0805 0.1U 0.1U 0.1U 0.1U 10U/10V/0805 0.1U 0.1U 0.1U DB2 stage:Delete CN6
R62
*33
D
7/12/2005 D
C39 3VPCU
11
67
81
94
30
38
47
*10P U6
KSOUT[0..11]
VCC1
VCC1
VCC1
VCC1
VCC2
VCC2
VCC2
(29) KSOUT[0..11]
Access Bus General Purpose I/O Interface

KSOUT0 17 99 KBC_PW_ON
KSOUT1 KSO0 OUT0 BAT_GRNLED# KBC_PW_ON (30)
16 100 R46
KSO1 OUT1/IRQ8~ BAT_GRNLED# (29)
3VPCU KSOUT2 15 10K
14M_KBC KSOUT3 KSO2 BATSELB D3 RB751V-40
14 KSO3 OUT7/SMI~ 98 T59
KSOUT4 13 97 KBCCPURST_R# 1 2
KSO4 OUT8/KBRST KBCCPURST# (14)
Keyboard/Mouse Interface
KSOUT5 12 96 R48 0 3VPCU
KSO5 OUT9/PWM2 PWM_INV (18)
KSOUT6 10 95 PWM_FAN#
KSO6 OUT10/PWM0 PWM_FAN# (29)
R67 R21 KSOUT7 9 93 CC-SET
KSO7 OUT11/PWM1 CC-SET (33)
*33 100K KSOUT8 7
KSOUT9 KSO8 R77
6 KSO9
SMSC_KBC1021_TQFP_100P
KSOUT10 5 62 PWSWON# 8.2K
KSOUT11 KSO10 GPIO2 BATLOW# PWSWON# (30,31)
4 KSO11 GPIO3 63 BATLOW# (16)
C44 DC/C- 3 64 CA_AKZ
(33) DC/C- KSO12/GPIO00/KBRST GPIO4/KSO14 CA_AKZ (29)
*10P 2 66 CA_CLK
KSIN[0..7] KSO13/GPIO18 GPIO5/KSO15 CA_CLK (29)
(29) KSIN[0..7]
68 RSMRST#
GPIO7/PWM3 RSMRST# (16)
KSIN0 25 69 UART_RXD R76 10K
KSIN1 KSI0 GPIO8/RXD UART_TXD 3VPCU 3VPCU
24 KSI1 GPIO9/TXD 70
+5V +5V KSIN2 23
KSIN3 KSI2 AIR_NON_CHG#
22 71
FOR EMI KSIN4
KSIN5
21
20
KSI3
KSI4
GPIO11/AB2A_DATA
GPIO12/AB2A_CLK 72
73 ACPRES
T15
AIR_NON_CHG# (33)
KSI5 GPIO13/AB2B_DATA ACPRES (22,33)

C KSIN6 19 74 SERR# R65 R68 C
KSI6 GPIO14/AB2B_CLK SERR# (15,20,22)
R22 R23 KSIN7 18 75 FANSIG 100K 10K
KSI7 GPIO15/FAN_TACH1 FANSIG (29)
10K 10K 76 MBAT_ID D5 RB751V-40
GPIO16/FAN_TACH2 MBAT_ID (33)
77 GATEA20_R 1 2
TS_CLK GPIO17/A20M GATEA20 (14)
(29) TS_CLK 26 IMCLK
TS_DAT 27 78 NUMLED#
(29) TS_DAT IMDAT GPIO20/PS2CLK NUMLED#
KBCLK 29 80 SLP_S3#_3R
T61 KCLK GPIO21/PS2DAT SLP_S3# (16,30)
KBDAT 31
T60 KDAT
EMCLK 32
T65 EMCLK
EMDAT 33
Interface
T64 EMDAT
86 MBDATA 3VPCU
AB1A_DATA MBDATA (5,33)
87 MBCLK
AB1A_CLK MBCLK (5,33)
84 ABDATA MBDATA R58 2.2K
AB1B_DATA ABCLK T11 MBCLK
85 R53 2.2K
AB1B_CLK T67
CLKRUN# 44
Mgmt SIRQ
(16,20,22,28) CLKRUN# SERIRQ CLKRUN~
(16,20,28) SERIRQ 46 SER_IRQ
DB2 stage:change R58,R53 to 2.2K
PCLK_KBC 43 R263 *4.7K 7/12/2005
(4) PCLK_KBC PCI_CLK 3VPCU
RUNSCI_EC# 59 R265 *4.7K
(16) RUNSCI_EC# EC_SCI~ A_SD
56
C579 3VPCU Power PGM Strap/GPIO25
82
A_SD (24)
GPIO01 T69
*0.1U LAD3/FWH3 RF_LED#
Miscellaneous
40 LAD[3] EA~/GPIO26/KSO17 83 RF_LED# (29)
(14,19,28,30) LAD3/FWH3 LAD2/FWH2 14M_KBC
39 48
(14,19,28,30) LAD2/FWH2 LAD1/FWH1 37
LAD[2] LPC Bus CLOCKI
58 R79 *0
14M_KBC (4)
(14,19,28,30) LAD1/FWH1 LAD[1] 32KHZ_OUT/GPIO22 TPS_CLOCK (20,21)
FOR EMI (14,19,28,30) LAD0/FWH0 LAD0/FWH0 35 49 R73 0
LAD[0] nRESET_OUT/GPIO06 PWROK (16)
R51 61
10K LFRAME#/FWH4 PWRGD R78 1K
(14,19,28,30) LFRAME#/FWH4 41 LFRAME~ VCC1_PWRGD 60 VCC1_PWRGD (30)
PLTRST# 42 50
(15,16,19,27,28,30) PLTRST# LRESET~ 24MHZ_OUT/GPIO19/WINDMON T72
R49 *0 34 1 CA_DATA R83
B (16,28) SUS_STAT# LPCPD~/GPIO23 GPIO24/KSO16 CA_DATA (29) B
57 *0
GPIO27 EAPD (23,24)
KBC_XTAL1 53 91
KBC_XTAL2 XTAL1 DMS_LED~/GPIO10 T66
54 XTAL2 BAT_LED~ 88 LED_BAT# (29)
51 VCC0 PWR_LED~/8051TX 90 POWER_LED# (29)
VCCRTC 52 89
TEST_PIN FDD_LED~/8051RX CAPSLED#
AGND
Y2
GND
GND
GND
GND
GND
GND
GND
32.768KHZ
1 2 3VPCU R271 *4.7K FOR DEBUG
55
92
79
65
45
36
28
8
+3V +3V
PORT(KBC)
3VPCU
C50 C49 C51 R80 CN4
22P 22P 0.1U 300 D6 *1SS355
C72 C57 VCC1_PWRGD 1
1 2 2
*0.1U *0.1U NUMLED#
3
5
POWER_LED#
CAPSLED# 4
EC_AGND R93 *180K 5
(30,32,37) VRON 2 4 2 4 6
DB2 stage:C49,C50 change to 22P *Debug
U14 C65 U11
3
1
3
1
7/12/2005 *7SV17 *1U *7SV17
C48 0.1U
EC_AGND R81 0
A A
AGND FILTER
PROJECT : OT1
Custom SMSC_KBC1021 1A

5 4 3 2 1
5 4 3 2 1
5V_CRT
F2
+5V 2 1
POLY SWITCH 1.1A

C566
0.1U
D D
(31) DOCK_CRT_R R237 0 CRT PORT

(31) DOCK_CRT_G R239 0
R240 0 CN28
16
(31) DOCK_CRT_B
CRT_CONN
6
CRT_R L19 39nH L23 110nH R238 0 CRT_R1 1 11
(9) CRT_R
7
CRT_G L20 39nH L24 110nH R243 0 CRT_G1 2 12 DDCDAT2
(9) CRT_G
8
CRT_B L18 39nH L25 110nH R244 0 CRT_B1 3 13 PR_CRT_HSYNC
(9) CRT_B
9
T121 4 14 PR_CRT_VSYNC
10
C278 C280 C279 5 15 DDCCLK2
18P 18P 18P
17
C C
C291 C290 C289 C288
*10P *10P *10P *10P
For EMI
+3V 5V_CRT
DB2 stage:
ESD PROTECTION Modify layout.
C567 C572 Elson 7/11/2005
0.1U 0.1U
U22
1 16 R229 39
VCC_SYNC SYNC_OUT2 PR_CRT_HSYNC (31)
2 15 CRT_HSYNC
VCC_VIDEO SYNC_IN2 CRT_HSYNC (9)
3 14 R228 39
VIDEO_1 SYNC_OUT1 PR_CRT_VSYNC (31)
B 4 13 CRT_VSYNC B
VIDEO_2 SYNC_IN1 DDCCLK1 CRT_VSYNC (9) R230 0 DDCCLK2
5 VIDEO_3 DDC_OUT2 12
6 11 DDCCLK
GND DDC_IN2 DDCCLK (9)
7 10 DDCDATA
VCC_DDC DDC_IN1 DDCDAT1 DDCDATA (9) R231 0 DDCDAT2
8 BYP DDC_OUT1 9
CM2009
Accelerometer Sensor DDCCLK2 (31)
C564 R451 R450 R445 R447
DDCDAT2 (31)
0.22U 2.2K 2.2K 2.2K 2.2K
SES_INT R35 *10K 3VPCU
+3V +3V +5V

U15
3 VDD NC 1
19 VDD NC 7
11 VDD_IO NC 8
C86 C62 C70 14
10U 0.1U 0.1U NC
NC 15
4 Reserved NC 21
18 Reserved NC 22
20 Reserved NC 23
A 24 A
NC
NC 25
6 RDY/INT NC 26
(15) SES_INT
9 27
(4,13,19) SMBDT 10
SDO
SDA/SDI/SDO
NC
NC 28 PROJECT : OT1
(4,13,19) SMBCK 12 2
+3V
R101 10K 13
16
SCL/SPC
CS
GND
GND 5
17
CK GND Size Document Number Rev
accelerometer sensor funtion
LIS3LV02DQ B CRT PORT 1A
7/21/2005
5 4 3 2 1
1 2 3 4 5 6 7 8
1.8 inch HDD CONNECTOR

HDD, CD-ROM CN19
DB2 stage:
41 42 +3V
Chanhed the footprint. CN34
1 7/11/2005 1
2 HDD_VDD 2
PDA[0..2] PLTRST_# 3
(14) PDA[0..2] +5V 3
4
A PDD[0..15] PDD7 A
5
(14) PDD[0..15]
6 PDD8 60MIL HDD
PDD6 7
PDIOW# 8 PDD9
(14) PDIOW#
PDDREQ PDD5 9
(14) PDDREQ
PDIORDY 10 PDD10 C308 C306 C309 C307
(14) PDIORDY PDIOR# PDD4 0.1U 1000P 0.1U 10U/10V/0805
(14) PDIOR# 11
IRQ14 12 PDD11
(14) IRQ14 PDDACK# PDD3
(14) PDDACK# 13
PDCS1# 14 PDD12
(14) PDCS1#
PDCS3# PDD2 15
(14) PDCS3#
PLTRST# 16 PDD13
(15,16,19,25,28,30) PLTRST#
PDD1 17 DB2 stage:DELETE L29,L30,ADD CN34
18 PDD14
PDD0 19 7/21/2005
20 PDD15
21
PLTRST# R253 47R PLTRST_# 22 PDDREQ
23
24 PDIOW#
PDIOR# 25
DB2 stage: PDIORDY
26
27
B
Chanhed the footprint. 28 B
7/11/2005 PDDACK# 29
30 IRQ14
PDA1 31
32 PDIAG
PDA0 33
34 PDA2
PDCS1# 35
36 PDCS3#
HDDLED# 37
(29) HDDLED#
38 HDD_VDD
HDD_VDD 39
40
43 44
40-Pin
CD-ROM
C C
1 2
PLTRST_# 3 4 PDD8
PDD7 5 6 PDD9
PDD6 7 8 PDD10
PDD5 9 10 PDD11
PDD4 11 12 PDD12
13 14
60MIL
PDD3 PDD13
PDD2 15 16 PDD14 CDVCC L2
PDD1 17 18 PDD15 PBY201209T-4A
PDD0 19 20 PDDREQ
21 22 +5V
PDIOR#
PDIOW# 23 24
PDIORDY 25 26 PDDACK#
IRQ14 27 28 IOCS16# C26 C28 C29 C27 C31
29 30 T4
PDA1 PDIAG 0.1U 0.1U 0.1U 0.1U 10U/10V/0805
PDA0 31 32 PDA2
PDCS1# 33 34 PDCS3#
HDDLED# 35 36
37 38 CDVCC
CDVCC 39 40
41 42
43 44
45 46 T2
D R45 470R CDSEL D
CDVCC 47 48
51
52
T3 49 50 T58
PROJECT : OT1
51
52
CN21 CD-ROM
CDSEL Quanta Computer Inc.

--> High, Slave device Size Document Number Rev
B HDD&ODD CONN. 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
MDC 3VSUS BLUE TOOTH

CN20
FINGER PRINT CN17 C305 C303 C304
+3V_BT 1
2
1
0.1U 2.2U 1000P R257 0 USBP2+1 2
1 2 (15) USBP2+ 3
ACZ_SDOUT_MDC GND REV R256 0 USBP2-1 3
(14) ACZ_SDOUT_MDC 3 4 (15) USBP2- 4
A_SDO REV 4
5 6 (29) BT_LED 5
ACZ_SYNC_MDC GND VCC 5
(14) ACZ_SYNC_MDC 7 8 (19) CH_DATA 6
CN11 R5 33 AC_SDIN1 A_SYNC GND 6
(14) ACZ_SDIN1 9 10 (19) CH_CLK 7
D A_SDI GND ACZ_BITCLK_MDC 7 D
11 12 ACZ_BITCLK_MDC (14) 8
1 C12 *10P A_RST# A_BCLK 8
3VSUS 2
R294 0 USBP3-1 MDC BLUE TOOTH
(15) USBP3- 3
R297 0 USBP3+1 R6
(15) USBP3+ 4 ACZ_RST#_MDC *33
5 (14) ACZ_RST_MDC# 3VSUS 3VSUS
Finger Printer
3VSUS
C87 C13
0.1U *10P R262
4.7K
1
C89 delete C88,C90,5VSUS,Change CN11
1000P
7/19/2005
RJ11 CONNECTOR 2 Q25
IRLML5103
CN14
3
CN16
TIP 1 +3V_BT
3
2 RING TIP BT_OFF#
MDC 1
2
(16) BT_OFF# 2
Q24 24mil
RING DTC144EUA
1
1
RJ11 C314
C5 C4 C23 100U/10V C22
1000P 1000P 1000P 0.1U
2
C C
TPM (1.2)
+3V
5VSUS PCLK_TPM U9
U44 LAD0/FWH0 26 10 +3V
(14,19,25,30) LAD0/FWH0 LAD0 VDD
5 1 USBPWR0_1 R437 0-0805 LAD1/FWH1 23 19
IN OUT (14,19,25,30) LAD1/FWH1 LAD1 VDD
(14,19,25,30) LAD2/FWH2 LAD2/FWH2 20 24
1
R56 LAD3/FWH3 LAD2 VDD C38 C60 C55 C36

4 3 (14,19,25,30) LAD3/FWH3
17 5
ON# SET C551 *33 PCLK_TPM LAD3 VSB 0.1U 0.1U 0.1U 0.1U
(4) PCLK_TPM 21
C554 LCLK
100U/6.3V 4
R428 470P LFRAME#/FWH4 GND
2 (14,19,25,30) LFRAME#/FWH4 22 11
2
C542 GND *6.8K PLTRST# LFRAME# GND R69 R91

(15,16,19,25,27,30) PLTRST# 16 18
1U G5240 Change part number & footprint 07/27/2005 C37 SUS_STAT# LRESET# GND *4.7K *4.7K
(16,25) SUS_STAT# 28 25
*10P SERIRQ LPCPD# GND
(16,20,25) SERIRQ 27
SERIRQ
6
GPIO
9 2
TEST/BADD GPIO2 R90 *0
+3V
CLKRUN# 15 7 R86 *0
(16,20,22,25) CLKRUN# CLKRUN# PP
R214 0 FOR EMI +3V 1
TESTI
8
R75 R87
CN29 NC TPM_XIN 4.7K 4.7K
EB3 USBPWR0
DB2 stage: 3
NC XTALI/32K IN
13
TPM_XOUT
8 12 14
1 GND Chanhed R71 footprint. NC XTALO
(15) USBP0-
(15) USBP0+
2
3
2 1
1
4
USBP0-1
USBP0+1 2 GND
7
6 USB 1 Address 7/11/2005 R71 SLB9635
Y3
32.768KHZ
3 4 3 GND
B
*1632090 4 GND
5
BADD 4.7K 1 2 B
R213 0 ESD Suyin_020173

HIGH 4EH/4F (default) C58 C59
DB2 stage:
LOW 2EH/2FH 12P 12P
1
Chanhed
DB2 stage: R74 7/11/2005
the
2
*4.7K
C282 C281 Chanhed address to "4E". footprint.
*Clamp-Diode *Clamp-Diode 7/11/2005
POWER USB (LEFT SIDE)

Change part number &footprint
R4 PQ2 SI4800BDY
5VSUS 2 1 8 1
1
2 1
7 2
2P 1P 6 3
C10 C9 2P 1P C8 C7 C6
5
2.2U 0.1U 10m/1W/3720 100U/6.3V 0.1U 1000P
2
4
R2 0
CN15
U2 R250 EB2 USBPWR1 8
820_0805_F C300 USBP1-1 1 GND
13 8 2 1 7
A
(15) USBOC#1
(15) USB_OC1# 11
12
ENABLE
FAULT
IN
10
0.1U
(15) USBP1-
(15) USBP1+ 3
2
3
1
4
4 USBP1+1 2
3
GND
GND
6
5
USB 2 A
R249 0 PWRGD ISET *1632090 4 GND

5VSUS
7 R3 0 ESD Suyin_020173
ISENSE
3
TIMER
4 1
1
VREG GATE
2 14
DGND DISCH 2 PROJECT : OT1
2
6
C11 C301 C302 AGND C2 C3
9 5
1000P 0.1U 0.1U AGND
TSP2331
VSENSE *Clamp-Diode *Clamp-Diode Quanta Computer Inc.
Custom USB, Blue Tooth, Finger Print 1A
Date: Thursday, August 04, 2005 Sheet 28 of 38

5 4 3 2 1
5 4 3 2 1
DB2 stage:add Pin1,3

TRACK POINT APPLICATION BUTTON BOARD
7/21/2005 CN3
KEYBOARD Change CN8 PIN DEFINE
3VPCU
(25) CA_AKZ 1
CN8 2
3VPCU 7/27/2005 R_BUTTOM CA_CLK R9 *4.7K 3
RP35 8 CA_DATA R8 *4.7K 4
7 (25) CA_CLK 5
CP2 *220PX4 10 1 KSIN2 L_BUTTOM
KEYBOARD KSOUT5 KSIN3 KSIN0 TS_CLK 6 6
1 2 9 2 (25) TS_CLK 5 (25) CA_DATA 7
D KSOUT11 KSOUT2 KSIN6 KSIN5 TS_DAT 3VPCU D
30 3 4 8 3 (25) TS_DAT 4 8
KSOUT0 5 6 KSOUT0 KSIN1 7 4 KSIN4
29 3 3VPCU 9
KSOUT2 7 8 KSOUT11 KSIN7 6 5 3VPCU
28 KSOUT5 2 10
27 KB_KSIN14 CP3 *220PX4 10KX8 +5V 1 11
26 KB_KSIN8 KB_KSIN12 TRACK POINT C15 C17 C14 C16 12
25 1 2
KB_KSIN12 3 4 C24 1000P 1000P 1000P 1000P SW-BOARD
24 KB_KSIN10 KB_KSIN8 1000P
23 5 6
KB_KSIN0 7 8 KB_KSIN14
22 KB_KSIN4 KSOUT[0..11]
21 (25) KSOUT[0..11]
KB_KSIN2 CP4 *220PX4
20 KB_KSIN1 KB_KSIN2 KSIN[0..7]
19 1 2 (25) KSIN[0..7]
KB_KSIN3 3 4 KB_KSIN10
18
17
KSOUT3
KSOUT8
5
7
6
8
KB_KSIN0
KB_KSIN4
FAN OUT PWM CONTROL
16 KSOUT4 CN23
15 KSOUT7 CP5 *220PX4 L8 0-0805 5V_FAN
14 +5V 1
KSOUT6 1 2 KB_KSIN3 (25) PWM_FAN#
13 KSOUT10 KB_KSIN1 2
12 3 4 3
KSOUT1 5 6 KSOUT8
11 KB_KSIN5 KSOUT3 C110 C107 (25) FANSIG 4
10 7 8
KB_KSIN6 10U 0.1U FAN
9 KSIN7 CP6 *220PX4
8 KB_KSIN13 KSOUT10 C103 C111
C 7 1 2 C
KB_KSIN11 3 4 KSOUT6 1000P 1000P
6 KB_KSIN9 KSOUT7
5 5 6
KSOUT9 7 8 KSOUT4
4
3 L_BUTTOM CP7 *220PX4
2 R_BUTTOM KSIN7 +5V 5VPCU
1 2
CN10
1
3
5
4
6
KB_KSIN5
KB_KSIN13
D2 LED
R247 330
LED BOARD
+5V
7 8 KB_KSIN6
DB2 stage:add Pin1,2,3
7/15/2005 CP8 *220PX4
1 2 KB_KSIN11
Change CN10 PINDEFINE 3 4 KSOUT1
5 6 KSOUT9
7/21/2005 7 8 KB_KSIN9 CN7
HDD LED HDDLED#
(27) HDDLED# 9
R63 330
LED_BAT 8
Check K/B Matrix BAT_GRNLED
7
6
POWER_LED# 5
POWER LED (25) POWER_LED# 4
R55 330
U26 U27 RF_LED# 3
(25) RF_LED# R52 330 2
B
KB_KSIN0 KSIN0 KB_KSIN4 KSIN4
W/L B/T ON/OFF LED 1 B
4 3 4 3
LED-BOARD
+3V 5VPCU 5VPCU
KB_KSIN8 5 KB_KSIN12 5
2 KB_KSIN9 2 KB_KSIN13
R251
C77 R60 330
KSIN1 6 1 KB_KSIN1 KSIN5 6 1 KB_KSIN5 0.1U POWER/SLEEP LED 330
5
Active : LOW
(19) RF_LINK 2
UMP11 UMP11 4 LED_BAT BAT_GRNLED
R96 10K 1
+3V
3
U13
TC7SH08FU
3
3
3
U28 U32 (25) BAT_GRNLED# 2
KB_KSIN2 4 3 KSIN2 KB_KSIN6 4 3 KSIN6 (28) BT_LED 2 (25) LED_BAT# 2
1
Active : High Q39
KB_KSIN10 5 KB_KSIN14 5 1 DTC144EUA
1
Q5 Q38
2 KB_KSIN11 2 DTC144EUA DTC144EUA
A A
KSIN3 6 1 KB_KSIN3 6 1 DB2 stage:add Q38 ,Q39 for Battery LED change to common cathode
7/12/2005
PROJECT : OT1
UMP11 UMP11
B FAN, KEYBOARD, TRACK POINT, LEDs 1A

5 4 3 2 1
5 4 3 2 1
POWER SEQUENCE +3V

FLASH ROM(BIOS)
1.8VSUS +2.5V +3V 5VSUS 5VPCU 5VPCU R10
4.7K
VRON +3V
U4
VRON (25,32,37) 8Mbit (1M Byte), SPI
3
1 10 U3
IN1 VCC
2 IN2 OUT1 9 1 5
D 3 IN3 OUT2 8 2 D
4 7 3 4 2 C366
IN4 OUT3 +3V *0.1U U30
5 GND OUT4 6
DB2 stage: SN74LVC1G04DCKR Q2 8 4 DB2 stage:
MAX6338IUB 2N7002E VCC VSS
Modify voltage. R296 *3.3K SPI_WP# 3 Chanhed the footprint.
1
W
7/11/2005 SPI_HOLD#
7/11/2005
DB2 stage: R289 *3.3K 7 HOLD
Chanhed to "IUB". (15) SPI_CS#
SPI_CS# 1
3VPCU S
7/11/2005 SPI_CLK SPI_CLK_R
(15) SPI_CLK R293 *47 6 C
SPI_SI R300 *47 SPI_SI_R 5 2 SPI_SO_R R288 *47 SPI_SO
3VPCU (15) SPI_SI D Q SPI_SO (15)
DB2 stage:
R94 *M25P80
100K Del R11,R12,R13,R14. C365 C382 C387 C375
5
7/11/2005 *33P *33P *33P *33P
2 4 VCC1_PWRGD
VCC1_PWRGD (25)
U12
7SV17
3
1
C69
0.1U
C C
3VPCU
POWER SWITCH 3V_S5
R248
+3V
R264 0-0805 +3V_FWH 8Mbit (1M Byte), PLCC
2
10K
SW2
1 2 PWSWON# 3 1 NBSWON# C324 C320 C315 U24
NBSWON# (16)
3 4 0.1U 4.7U/10V 0.1U 25 6 FWH_GPI0 R255 100
Q23 VCC GPI0 FWH_GPI1 R258 100
5 32 VCC GPI1 5
C299 2N7002E 1 4 FWH_GPI2 R260 100
0.1U VPP GPI2 FWH_GPI3 R261 100
GPI3 3
PWSWON# PCLK_FWH LAD0/FWH0 13 30 FWH_GPI4 R269 100
PWSWON# (25,31) (14,19,25,28) LAD0/FWH0 LAD0 GPI4
LAD1/FWH1 14
(25,31) PWSWON# (14,19,25,28) LAD1/FWH1 LAD1
LAD2/FWH2 15 11
(14,19,25,28) LAD2/FWH2 LAD2 RFU
DB2 stage: LAD3/FWH3 17 12
R268 (14,19,25,28) LAD3/FWH3 LAD3 RFU
18
Modify the net. *33 LFRAME#/FWH4 23
RFU
19
(14,19,25,28) LFRAME#/FWH4 LFRAME RFU
7/11/2005 PCLK_FWH 31 20
3VPCU (4) PCLK_FWH CLK RFU
(14) FWH_INIT# FWH_INIT# 24 21
3VPCU FWH_WP# INIT RFU
(16) FWH_WP# 7 WP RFU 22
C329 FWH_TBL# 8
(16) FWH_TBL# TBL
C34 *10P PLTRST# 2 10
(15,16,19,25,27,28) PLTRST# RP ID0
5
0.1U FWH_IC 29 9
B IC(VIL) ID1 B
2
4 S5_ON 16 27
(25) KBC_PW_ON S5_ON (22,32) VSS NC
1 R270 26 28
U5
TC7SH08FU
FOR EMI 10K VSS
PLCC32
NC
3
R47 *0
3VPCU
3VPCU
C42
5
0.1U
2
4 MAINON DB2 stage:
(16,25) SLP_S3# MAINON (23,32,35,36)
1
U7 Del U25.
TC7SH08FU 7/11/2005
3
R57 *0
3VPCU
3VPCU
A A
C45
5
0.1U
2
4 SUSON
(16) SLP_S5# SUSON (32,35)
1
U8 PROJECT : OT1
TC7SH08FU
3

R66 *0 Custom POWER SEQUENCE / LPC BIOS 1A

5 4 3 2 1
A B C D E
DOCKING BOARD CONNECT

L22
FBMJ3216HS800
51
VA DOCK_VA CN30
4 C283 C284 4
1000P 1000P 49 50
47 48
XTX0P 24 1 XTX2P
(22) XTX0P XTX2P (22)
XTX0N 25 2 XTX2N
LAN (22)
(22)
XTX0N
XTX1P
XTX1P 26 3 XTX3P XTX2N (22)
XTX3P (22)
LAN +3V
XTX1N 27 4 XTX3N
(22) XTX1N XTX3N (22)
5VSUS 28 5 5VSUS
29 6 R221
+5V 30 7 10K
31 8 LAN_LED#
LAN_LED# (16,22)
32 9 LAN_ACTLED# PR_INSERT#
R224 0 USBP4+1 LAN_ACTLED# (22)
33 10
USB (15) USBP4+
(15) USBP4-
R225 0 USBP4-1 34 11 ADP_ID
ADP_ID (33)
35 12 PWSWON# C276
PWSWON# (25,30)
TV_C/R 36 13 PR_INSERT# 0.1U
(9) TV_C/R PR_INSERT# (16,22,23)
TV_Y/G 37 14 DDCDAT2
TV (9) TV_Y/G
(9) TV_COMP
TV_COMP 38 15 DDCCLK2
DDCDAT2 (26)
DDCCLK2 (26)
39 16 PR_CRT_HSYNC
3 (26) DOCK_CRT_B
DOCK_CRT_B 40 17 PR_CRT_VSYNC
PR_CRT_HSYNC (26)
PR_CRT_VSYNC (26)
CRT 3
DOCK_CRT_G 41 18
CRT (26) DOCK_CRT_G
(26) DOCK_CRT_R
DOCK_CRT_R 42 19 AGND
43 20 LINE_IN_SENSE
LINE_IN_SENSE (23)
AGND 44 21 DOCK_HP_SENSE
DOCK_HP_SENSE (24)
DOCK_HP_OUT_L R241 0 45 22 R236 0 DOCK_LINE_IN_L
Line-out (24) DOCK_HP_OUT_L
(24) DOCK_HP_OUT_R
DOCK_HP_OUT_R R234 0 46 23 R235 0 DOCK_LINE_IN_R
DOCK_LINE_IN_L (23)
DOCK_LINE_IN_R (23)
Line-in
DOCK
52
Pin43 for Dock detect
Delete PAD2 70/27/2005

Area of Hole +1.05V
EC10 *0.1U
+3V
PAD4 EC11 *0.1U
+1.05V +3V
EMIPAD-276X100 H14 H4 H16 H12 H18 H2 H20 EC12 *0.1U
+1.05V 5VSUS
H-C313I160D110P2 h-c197d47p2 H-C315I160D110P2 H-C276D276N H-OT1-2-2P H-OT1-1-2P h-c157d47p2 EC13 *0.1U
+1.05V 5VSUS
1
EC8 *0.1U
1.8VSUS +1.5V
2 EC20 *0.1U 2
1.8VSUS +3V
EC21 *0.1U
1.8VSUS 3VSUS
+5V EC22 *0.1U
3VSUS
EC7 *0.1U
+1.5V +3V
1
1
EC17 *0.1U
+1.5V +3V
EC18 *0.1U
+1.5V +3V
PAD5 PAD6 +5V EC19 *0.1U
+3V
EMIPAD-276X100 EMIPAD-276X100 +5V EC15 *0.1U
+3V
H3 H15 H13 H17 H19 H10 EC4 *0.1U
VA +3V
1
h-c313d118p2 H-C313I160D110P2 H-C313D110P2 h-r313x165d118p2L H-C313D110P2 h-c313d118p2 H21

h-c157d47p2 EC3 *0.1U
VIN 3VPCU
EC14 *0.1U
VIN 3VPCU
EC16 *0.1U
VIN +3V
EC6 *0.1U
VIN +3V
EC5 *0.1U
VIN 5VSUS
1
1
EC2 *0.1U
VIN 5VSUS
1
PAD3
EMIPAD-276X100 Delete EC9 07/27/2005
1
H6 H7 H8 H9 H11 H5
h-c197d47p2 h-c313d118p2 H-C313D110P2 H-C313D110P2 h-c313d118p2 H-C313D110P2 FOR EMI
1 1
1
1 PROJECT : OT1
B CABLE DOCKING 1A

A B C D E
5 4 3 2 1
PR70
PC53
*.1U/50V
1 NC0 NC2 5 PC58
+2.5V (11,30)
2.5V
PC56 PC57
EN_4215 2 6
(23,30,35,36) MAINON EN VO +2.5V 0.6A
3VPCU 3 8
D VIN GND0 D
10U/6.3V/0805/X5R
10U/6.3V/0805/X5R
.1U/50V
0/0603/5%
4 9 S0
ADJ
NC1 GND1
7
PC54 PU4
.1U/50V SC4215 L-F
R1
4215FB
PC55 PR79
10U/6.3V/0805/X5R PR81 *4.12K/F
10K/F
R2
Vo=0.8(R1+R2)/R2
VIN
VCC_CORE
VIN +15V
SMDDR_VTERM +3V +5V PR35 PR100
C 1M 22A C
PR146 VCC_CORE_D
PR39 PR165 PR63 PR157 VRON_G
1M 22A 22A 22A 1M
3
MAINON_G MAIND
MAIND (34)
2
3
SMDDR_VTERM_D +3V_D +5V_D (25,30,37) VRON

3
3
3
PR36 2 PQ21
MAINON 2 1M
1
(23,30,35,36) MAINON PQ16 2N7002E L-F
PR40 2 2 2 2 PC121 DTC144EUA
1M 2200P/50V/0402/X7R
1
1
PQ18
DTC144EUA PQ43 PQ20 PQ37 PQ35
2N7002E L-F 2N7002E L-F 2N7002E L-F 2N7002E L-F
1
1
1
B B
VIN 3V_S5
+15V
VIN PR37 PR34 PR145

3VSUS 5VSUS +15V 1M 22A 1M
S5_ON_G S5_OND
S5_OND (34)
3V_S5_D
3
PR44 PR14 PR13 PR147
3
1M 22A 22A 1M
SUSON_G SUSD S5_ON 2 2

SUSD (34) (22,30) S5_ON
PR38 2 PC118
3VSUS_D 5VSUS_D 1M 2200P/50V/0402/X7R
3
PQ17 PQ33
1
3
DTC144EUA PQ15 2N7002E L-F
1
2N7002E L-F
1
SUSON 2 2 2
(30,35) SUSON PR45 PC122
2
1M 2200P/50V/0402/X7R
PQ19 PQ6 PQ36
1
DTC144EUA PQ7 2N7002E L-F 2N7002E L-F

1
A 2N7002E L-F A
1
PROJECT : OT1
Custom +2.5V/DISCHARGE 1A

5 4 3 2 1
5 4 3 2 1
PR21 10K/F
ADP_ID (31)
ADAPTER 65W 19.5 Volts 3.33A
From Docking AC power PD9
ADAPTER 50W 19.5 Volts 2.56A
3
E E
PR17 100K 1
ADP_ID 1 2 2 PQ9 3
2
SST3904
AC power from docking or system AC
1
R7 SBM1040
jack.Will not present at the same 3.9K_1%
time.
VA DB2 stage 7/25 DB2 stage 7/25 PQ5 VIN PQ11
PL2 AO4407L L-F AO4407L L-F
JP2 PD2
1 FBMJ3216HS800 2 1 8 1 8
2 3 VA_1 2 7 2 7
3 1 3 6 3 6
1
PC83
Normal:19.5 Volts 7 4 PR112 5 5
1
6 5 PC2 SBM1040 PC86 PR119 VA
PR8
1000P PC4 PR22
4
POWER JACK 1000P PC84 .1U/50V 220K *33K
Airline:15.0 Volts
2
10K .1U/50V .1U/50V 0 PR6
2
AC_DIS_G
PR25 100_1% PQ27
When AC voltage level under 16.3 volts disable PL5 1 6
1
FBMJ3216HS800 PR9 10K
2
charge/charge led/OS charge icon. PR120 2 5 *0 PR5
CSSP
PD7 VA DC/C- (25)
AC_DIS
CSSN
220K PR7 *10K
D 3 4 D
1
CH501H-40PT L-F PC103
When system with AC and DC can
3 2
1
5VPCU 1 2 IMD2 10K
1
PR115 PD3 support DC discharge for Battery
3
3VPCU
8724_DCIN .1U/50V 680K UDZ2.7B learning.
2 2
PR117 10K 2 PQ28
2
1
PC88 PQ26 2 AC_LATCH 1 2

PR11 PR4 *2N7002K L-F
1
.01U PR121 PR19 PC11 PC100
2
1
2N7002K L-F PR2 PC3 PC85 680K
1
1
8724_DCIN
10K 75K/F 75K/F
1
5
3
.1U/50V 1M 0.01U .1U/50V VA
2
PR12 1 1U/25V
+
2
8724_SHDN1# 4 Float= 3 CELLS
(25) AIR_NON_CHG#
3 REF2V_1999 2 VIN_PRO
-
1
PR18 REFIN=4CELLS
1
0 PU7 PR122 PQ4 PD16
2
PR142 *0 REFIN PR3

10.5K/F 15K/F 2N7002K L-F UDZS22B
1
LMV331 680K
2 2
PC87 CELL
2
VIN
2200P VBATT=4.2V*number of cells PR24 33R PL8 PR116 VIN
PC110 PC108 PC107
27
26
8724_LDO
3
3VPCU PC96 PC105 1K
C 3VPCU PC109 C
CSSN
CSSP
1
1
1
8724_LDO 17 1U HI0805R800R-00/5A L-F 2 AC_OVP
1
CELLS
2200P
4.7U/25V/1210/X7R
PR131 1 1U + PC111
DCIN
1
.1U/50V
4.7U/25V/1210/X7R
PR139
S2
G2
2
LDO
D1
220U/25V
PR140 DB2 stage 7/25 PQ3
2
PR118
8724_ACIN 10 22 8724_DLOV
(34) REF2V_1999 ACIN DLOV
*0 0 0 PQ32 DTC144EU 10K
PR141 *0 24 8724_BST 1 2
R2
2
BST
1
ICHG=VICTL/VREFIN*0.075/R2 VCTL 15 PC20 SI4814DY L-F
VCTL PD8
S1D2
PR137
G1
ICTL 13 .1U/50V CH501H-40PT L-F
2
(25) CC-SET ICTL
25 CHG_DH PL9 PR144
5
15K/F PC17 .1U/50V REFIN DHI
12
PC22 REFIN CHG_LX MBAT+ PC116
23 1 2 2 1 MBAT+
PR134 LX 2 1 PC119
Present AC:When AC voltage level > 12.3 Volts.
1
10U/6.3V/0805/X5R ACOK# 11 21 CHG_DL 4.7uH L-F 2P 1P
ACOK DLO 2P 1P
1
49.9K 1% PC112 *1000P PR143 *2.2 PC29 +
4.7U/25V/1210/X7R
100U/25V
3 1 8724_LDO DB2 stage 7/25 ICHG 9 20
ICHG PGND 15m/1W/3720 .1U/50V
2
IINP 28 19 CSIP
2
PQ8 IINP CSIP
PR15 8724_SHDN1# 8724_SHDN# 8 18 CSIN
SHDN CSIN
2
10K DTA124EUA PR127 0R CCV 7 16 MBAT+

CCV BATT 3VPCU
(22,25) ACPRES Vref = 4.096V VA
B DB2 stage:PC22 Change to 1u DB2 stage 7/25 B
DB2 stage:Change PR134 footprint CCI 6 4 8724_REF PC31
PR16 CCI REF PR33
PR124
1
15K CCS 5 3 CLS PR125 PD15 PR111 .01U/50V/0603/X7R 10K/F
1K CCS CLS CN18 PC30
GND
GND
PC94 0 PR113 220/2512

ICHG IINP UDZS5.6B 1 .01U/50V/0603/X7R
2
1
3
PC93 PC95 PC92 P3417 MBAT_ID (25)
14
29
2 220K 3 P3418 PL4 FBMJ3216HS800

.1U/16V .01U 1U 6 4
PU8
2
PR129 PC99 PR126 PC97 .01U PR114 VA_DIS_G 2 7 5
10K PQ24 BAT_CONN

20K
3
*1000P *1000P MAX8724/1908 47K PR31
1
2SK3577 PR30 100R
2 PD14 100R
1
PQ25
*UDZS5.6B
DTC144EU MBDATA MBCLK
1
2
MBCLK (5,25)
CLS connect to REF for Full-scale 75mV (5,25) MBDATA
1
PD10
PD11
UDZS5.6B
UDZS5.6B
2
A A
PROJECT : OT1
Custom CHARGING 1A

5 4 3 2 1
5 4 3 2 1
3VPCU
VIN_1999_3V PQ10
1
2
5
6
AO6402L L-F
PL7
S0-S5
PR132 PR128 S5_OND 3
(32) S5_OND
2 1 1 2 PC5 PC6 PC90 PC91 PC98 3V_S5
D
(5) 1999_SHDN#
VIN 0.5A D
390K 4.7/A HI0805R800R-00/5A L-F
4
2
1
PC102 3V_S5
3V_S5 (16,17,22,30,32)
2200P/50V/0402/X7R
.1U/50V
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
PC18 PR26
PC16
1
.1U/50V 150K .1U/50V
2
0.1U10V/0402/X7R
5
6
7
8
1999_DH3 4 DB2 stage 7/25 7A
PQ30
SI4800BDY L-F
ALWAYS
3
2
1
3VPCU (14,16,17,18,22,25,29,30,31,32,33)
PL6
PC14 PC12 PC101
1999_LX3 PR123 1 2 3VPCU 3VPCU
+3V 3V_AL
5
6
7
8
3.3uH L-F
2.2U/25V/0805/Y5V
.1U/50V
330U/6.3V/ESR-25
PC13
PC15
1
.1U/50V
1
2 1 4 *2.2
5
PR23
PC89
2
100K PU2 4.7U/10V/0805/Y5V PR20 PQ29 PQ31
1 28 1999_BST3
2
N.C BST3
*1000P
2 27 0/0603/5% AO4812 L-F
(35,36) HWPG
3
2
1
C PGOOD LX3 C
3 26 SI4810BDY_LF +3V
ON3 DH3
5V_AL DB2 stage 7/25 VIN_1999_5V
4 25 S0
4
ON5 LDO3
ILIM3 5 24 1999_DL3
ILIM3 DL3 SUSD
6 SHDN- GND 23 PL3 3A SUSD (32)
S3
REF2V_1999 PC113 PC114 PC28 PC27 PC26 3VSUS
REF2V_1999 1999_BST3_1
7 FB3 OUT3 22 3VPCU VIN PC104
3VSUS
PC21 2 1 8 REF OUT5 21 5VPCU PC19 HI0805R800R-00/5A L-F 0.1U10V/0402/X7R 3A
3VSUS (15,16,19,20,21,28,31,32)
5
6
7
8
2200P/50V/0402/X7R
.1U/50V
2.2U/25V/1206/X7R
2.2U/25V/1206/X7R
2.2U/25V/1206/X7R
1U/10V/0603/X5R 2.2U/25V/0805/Y5V
+
9 20 1 2 PC106
FB5 V+
PR27 2 1 10 19 1999_DL5 4 0.1U10V/0402/X7R
PRO- DL5 (32) MAIND
100K
ILIM5 11 18
ILIM5 LDO5 PC24 1U/25V PQ12
12 SKIP- VCC 17 DB2 stage 7/25
5VPCU (17,29,30,33,35,36,37)
PR28 13 16 1999_DH5 PL10
3
2
1
TON DH5 SI4800BDY L-F PC34 PC33 PC117 PC115
0 1999_LX5 5VPCU
14 BST5 LX5 15
PR32
1 2
5VPCU ALWAYS
5
6
7
8
MAX1999 L-F
1
2.2U/25V/0805/Y5V
.1U/50V
330U/6.3V/ESR-25
150U/6.3V
3.3uH L-F
7.5A
5
6
7
8
PR29 PC25 PQ13
1999_BST5 1999_BST5_1 1 2 4
*2.2 PQ14
2
0/0603/5% .1U/50V SI4810BDY_LF 4
2
PR136 PC32 SI4800BDY L-F

B PD6 B
51
5A
*1000P
CHP202UPT L-F
3
2
1
REF2V_1999 DB2 stage 7/25 5VSUS
3
3
2
1
5V_AL S3
SUSD
REF2V_1999 (33) (32) SUSD 5VSUS (21,28,30,31,32,35)
1
DB2 stage 7/25

+ PC23
4.7U/10V/0805/Y5V
PR130 PR135 PC35
2
100K/F 100K/F 0.1U10V/0402/X7R
ILIM3
L_I(A)*Mosfet(Low-Side)RDSON(mOHM)=V_ILIM(mV)/10
ILIM5
5VPCU
PR133 PR138
60.4K/F 60.4K/F
PQ34
S0-S5
1
2
5
6
AO6402L L-F
PD4 PD5
(32) MAIND
MAIND 3 3A
CHN217/80V/0.1A CHN217/80V/0.1A +5V
PC7 5VPCU PC9 +10V
2 2
DB2 stage 7/25
4
A 1999_DL3 1999_DL3 1 A
1 2 3 2 3 +15V (32) +5V (17,23,24,25,26,27,29,31,32)
+10V PC120
.01U/50V/0603/X7R 1 .01U/50V/0603/X7R 1 +15V
1
0.1U10V/0402/X7R
PC10
Only for power
1
PC8
PROJECT : OT1
2
.1U/50V 2.2U/25V/0805/Y5V
ALWAYS
2

Custom MAX1999(3VPCU/5VPCU) 1A

5 4 3 2 1
5 4 3 2 1
VIN_1992
VIN
PL13 5VPCU
E PC139 PC136 PC141 PC140 E
PC134
CH501H-40PT L-F
HI0805R800R-00/5A L-F PR57
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
0.1U/50V/0603/X7R
2200P/50V/0402/X7R
10U/10V/0805/Y5V 1992VCC
1.8V PC132
2
20 PC135
4.7U/25V/1210/X7R
10A
8
7
6
5
2
PD17 1U/10V/0603/X5R
1
DB2 stage 7/25
19
24
22
4
1992_BST
VIN_1992
S3
1
PQ41 1992_BST_1
OVP/UVP
VDD
VCC
PR160 14
V+
17
IR7821 L-F BST 1992POK PR159 0
4
1.8VSUS 1992DH 0 POK HWPG (34,36)
15
1
2
3
DH
DCR 8.1m OHM LSAT
3
2
PC127
23 1992SHDN# PR62 0
PC149 PC148 PC144 PC143 PL16 PR164 .1U/50V SHDN SUSON (30,32)
1
(9,10,13,30,31) 1.8VSUS 1.8VSUS 1992LX 16 21
PD19 LX AGND
D D
8
7
6
5
1.5uH/10A L-F 7
N.C1
1
470U/2.5V/ESR-25
470U/2.5V/ESR-25
2.2U/25V/0805/Y5V
.1U/50V 1992DL
+ + *2.2 PQ42 18
PR155 Ra 4
DL
GND
25
SSM34PT L-F
PR67 PC142
2
2
20
PGND
*1000P
*7.15K/F 845/F IR7832 L-F 8
N.C2
11
CSP
PC50
1
2
3
PR161
PC124 PR156 12 *0
CSN 1992TON
1
TON
0.22U/10V/0603/X7R 1992CSP 10
Rb OUT
*100P
*10K/F 6 1992REF
1992CSN REF
9
SKIP
ILIM
FB
N.C
1
PR69 845/F PR61 PC125
13
5
PU9 121K/F 1U/10V/0603/X5R
2
PR154 0 1992OUT MAX1992ETG L-F
1992ILIM
C 1992FB C
PR158
Vout=0.7V(1+Ra/Rb)
1
PC130 DB2 stage 7/25
49.9K 1%
PR58 470P/50V/0402/X7R
2
0
Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10
1992VCC
Fix 1.8V Output
B
5VSUS B
1.8VSUS PC78 2.2U/10V/X5R
1.8VSUS (9,10,13,30,31) 2 1
PC77
SMDDR_VTERM
1
22U/6.3V/X5R PU6
PR109
0.9V (1.5A)
2
1 VDDSSNS VIN 10
SMDDR_VTERM 2 9 51100_S5 0
VLDOIN S5
(13,32) SMDDR_VTERM
S0 3 VTT GND 8
4 7 51100_S3 PR110 0
PGND S3 MAINON (23,30,32,36)
1
PC79 PC81 5 6
GND
VTTSNS VTTREF SMDDR_VREF (9,13)

150U/2V/ESR-18
PC80
2
10U TPS51100DGQR .1U/50V

0.9V (10mA)
11
A A
S3
PROJECT : OT1
Custom MAX1992(1.8VSUS/DDR_VTERM) 1A

5 4 3 2 1
A B C D E
4 4
2
VIN_1544_1.05V PD12
VIN VIN_1544_1.5V VIN

PL11 CHP202UPT L-F
PC128 PC129 PC133 PC47 PC46 PL12
5VPCU PC41 PC44 PC45 PC126 PC131 PC123
10U/10V/0805/Y5V
1540_BST2_1
DB2 stage 7/25 HI0805R800R-00/5A L-F PR42
1540_VCC HI0805R800R-00/5A L-F
4.7U/25V/1210/X7R
.1U/50V
2200P/50V/0402/X7R
2200P/50V/0402/X7R
.1U/50V
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
VIN_1544_1.5V
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
PC38 20
1
1U/10V/0603/X5R
.1U/50V
1
1.05V
S2
G2
PR56
D1
PC43
1540_BST1_1
1.5V
8
7
6
5
1
PR59 DB2 stage 7/25
0/0603/5%
S0
20
19
5
2
PC40 PQ38
PQ40 1K
4.5A
VCC
V+
LDOOUT
S1D2
2
2
4 PC42 1 SI4814DY L-F
11A
G1
1
OVP/UVP
+1.5V (6,11,15,17,19,31)
PR60 22 16 1540_BST2 .1U/50V
8
IR7821 L-F LDOON BST2
+1.05V .1U/50V 1540_BST1 23 14 1540_DH2
DCR 13m OHM +1.5V S5
DCR 8.1m OHM BST1 DH2 PL14
0/0603/5% 1540_DH1 25 15 1540_LX2 PC150 PC52 PC51
1
2
3
PL15 DH1 LX2
PC147 PC151 PC146 PC145 1540_LX1 24 3.8UH/6A L-F
LX1 PC137 PR162 RC
8
7
6
5
1
330U/6.3V/ESR-25
2.2U/25V/0805/Y5V
.1U/50V
1.5uH/10A L-F DB2 stage 7/25 PR64
PR163 PQ39 18 1540_DL2
DL2
1
1
470U/2.5V/ESR-25
470U/2.5V/ESR-25
2.2U/25V/0805/Y5V
.1U/50V
3
PD18 PC161 *4.7n/50V/X7R 1.33K/F PR53 3
+ + PR66 4 1540_DL1 21 9 1540_CSP2 *1000P *2.2
2
*2.2 DL1 CSP2 PC48
IR7832 L-F 10 1540_CSN2 *16.2K/F
2
CSN2
SSM34PT L-F
845/F PC138 1540_CSP1 30

2
CSP1 1540_OUT2 0.22U/10V/0603/X7R

12
1540_CSN1 OUT2
29
*1000P CSN1 1540_FB2 PR65
11
1
2
3
PR54 1540_OUT1 FB2

27
RC PC49 OUT1
5.11K/F 0.22U/10V/0603/X7R 1540_FB1 28 31 1540_ON2 1.33K/F
FB1 ON2 PR49
PR47 0 1540_ON1 32
PR68 ON1
PGOOD1
26 RD
PC37 PR148 *0 1540_TON 4 *10K/F
845/F TON PR52 0
13
1540REF PGOOD2
2 1 8
REF
17
RD PR51 1U/10V/0603/X5R 1540_ILIM1 6
ILIM1
GND
PR55 0
EXP_PAD
EXP_PAD
EXP_PAD
EXP_PAD
EXP_PAD
10K/F PR149 1540_ILIM2 7 PR50 0 PR48
ILIM2 MAINON (23,30,32,35) Vout=0.7V(1+RC/RD)
SKIP#
LSAT
PU3
121K/F 0
1540_PG1 PR152 0
33
37
36
35
34
MAX1540 HWPG (34,35)
(23,30,32,35) MAINON
PR43 PR46 1540_PG2 PR153 0 1540_VCC
Vout=0.7V(1+RC/RD) PR150 PR151
PC39 121K/F
1
49.9K 1% 10K 10K

Fix 1.5V Output
470P/50V/X7R
2
2 PR41 2
PC36
1
49.9K 1%
2
470P/50V/X7R
DB2 stage 7/25
Vcs=I_L(A)*L_DCR(mOHM)=V_ILIM(mV)/10
1 1
PROJECT : OT1
Custom MAX1540 (+1.05V/+1.5V) 1A
A B C D E
A B C D E F G H
DPRSLPVR DPRSTP# PSI# State CPU Current

1 0 0 Deeper Sleep < 3A
1 0 1 Deeper Sleep > 3A
0 1 0 Active Mode < 18A
1
0 1 1 Active Mode > 15A 1
dV_Target/dt=12.5mV/us*71.5kohm/R_TIME VIN_8736_1
CH501H-40PT L-F
VIN
8736VCC 5VPCU
R_ILIM(PK)=8V*R_TRC/I(PK)LIMIT*Rsense DPRSLPVR PSI#
PR97 PC66 PL17
PC157 PC156 PC70 PC73 PC71 PC155 PC154 PC153 PC152
10U/10V/0805/Y5V 1 X 1-phase pulse-skipping mode(low power)
2
PC67 10 HI0805R800R-00/5A L-F
PD13 0 0 1-phase forced-PWM mode(inteermediate power)
2200P/50V/0402/X7R
.1U/50V
2.2U/25V/1206/X7R
2.2U/25V/1206/X7R
2.2U/25V/1206/X7R
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
4.7U/25V/1210/X7R
fsw=300kHZ*143kohm/Rosc 1U/10V/0603/X5R
21
30
1
1
0 1 All phase active,forced-PWM mode(full powr)
VCC
VDD
1
PR88 143K PR103 8736BST1
8736OSC 14 25 8736BST
OSC BST1
PR87 1% 0/0603/5%
5
6
7
8
5
6
7
8
8736TIME 15 PC68
TIME 0.22U DB2 stage 7/25
71.5K 1% PC63 10
8736CCV 17 27 4 4
CCV DH1 PQ22 PQ44
PR90 470P VCC_CORE
8736ILIM 16 PR167
ILIM
PC64 1M 1% PL18 0.001
8736REF 19 IR7821 L-F IR7821 L-F
3
2
1
3
2
1
REF PC160 PC159 PC72 PC74 PC158 PC82 PC76
26 1 2 2 1 VCC_CORE (6,32)
0.22U PR92 LX1 2 1
8736TRC 18 0.47uH L-F 2P 1P
TRC PR108 2P 1P
5
6
7
8
5
6
7
8
1
2.2U/25V/0805/Y5V
.1U/50V
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
330U/2.5V/ESR-9/POS
3K 1%
1
2 PR94 0 34 DB2 stage 7/25 PQ23 PQ45 PD20 + + + + + 2
(6) H_VID0 D0 *2.2
PR93 0 35 32 4 4
2
(6) H_VID1 D1 DL1
SSM34PT L-F
PC75
PR91 0 36
2
(6) H_VID2 D2 PC162 IR7832 L-F IR7832 L-F
PR89 0 37 *1000P
(6) H_VID3 D3 *4.7n/50V/X7R
PR86 0 38
3
2
1
3
2
1
(6) H_VID4 D4
31
PGND
(6) H_VID5
PR85 0 39 Vo VID6 VID5 VID4 VID3 VID2 VID1 VID0
D5
----------------------------------------------
PR83 0 40 PR72
(6) H_VID6 D6 8736CSP1 8736CSP1_1
1.5000 0 0 0 0 0 0 0
6 10
CSP1 PR106 PR107 ----------------------------------------------
PR78 0 8736SHDN# 4 PC60 10nF/16V/X7R/0402 1.4375 0 0 0 0 1 0 1
(25,30,32) VRON SHDN 8736CSN1 8736CSN1_1
5 0 ----------------------------------------------
CSN1 0 1.4000 0 0 0 1 0 0 0
PC59 PR71 0
----------------------------------------------
4700P 1.3000 0 0 1 0 0 0 0
DB2 stage 33 8736VCC ----------------------------------------------
DRSKP
PWM2
28 1.2875 0 0 1 0 0 0 1
----------------------------------------------
PR77 499/F
1.2000 0 0 1 1 0 0 0
(9,16) PM_DPRSLPVR 3 8
DPRSLPVR CSP2 ----------------------------------------------
Intel Recommendation Option 1 :
1.1500 0 0 1 1 1 0 0
7 250KHZ<= Fs <= 300K HZ ----------------------------------------------
PR76 *100K CSN2
0.351uH<= Lo <=0.500uH +-20% 1.1000 0 1 0 0 0 0 0
(5) PSI# 2
PSI Low-Freq. Decoupling : ESR 1.5m Ohms ; ESL 1.8nH/6 ----------------------------------------------
PR75 0 SPCAP EEFSX0D331R * 6 or 1.0000 0 1 0 1 0 0 0
8736VCC ----------------------------------------------
29 POSCAP 2R5TPE330M9 * 6 0.9625 0 1 0 1 0 1 1
PWM3
3 Mid-Freq. Decoupling : 3m Ohms/32 ---------------------------------------------- 3
10 MLCC 22uF_0805_X5R * 32 PCS. 0.9000 0 1 1 0 0 0 0

+3V CSP3 ----------------------------------------------
PR101 10K 0.8375 0 1 1 0 1 0 1
PR98 0 24 9 ----------------------------------------------
(9,16) DELAY_VR_PWRGOOD IMVPOK CSN3
Intel Recommendation Option 2 : 0.8000 0 1 1 1 0 0 0
250KHZ<= Fs <= 300K HZ ----------------------------------------------
PR73 10K PR80 10 0.351uH<= Lo <=0.500uH +-20% 0.7625 0 1 1 1 0 1 1
PR74 0 1 11 8736GNDS ----------------------------------------------
(4) VR_PWRGD_CK410# CLKEN GNDS Low-Freq. Decoupling : ESR 1.5m Ohms ; ESL 0.8nH/6 0.7500 0 1 1 1 1 0 0
PC69 POSCAP 2R5TPL330MF9 * 6
PC61
----------------------------------------------
+3V 1000P Mid-Freq. Decoupling : 3m Ohms/24 0.7000 1 0 0 0 0 0 0
PR102 10K 20 MLCC 22uF_0805_X5R * 24 PCS. ----------------------------------------------
*100P GND
(5) H_PROCHOT# 22 0.6000 1 0 0 1 0 0 0
PR99 VR_HOT
13 ----------------------------------------------
0 VPS
PR96 PR84 10.5K 1% PR82 10
0.5000 1 0 1 0 0 0 0
23 12 ----------------------------------------------
THRM FBS 0.3000 1 1 0 0 0 0 0
1K 1% PC62 ----------------------------------------------
PC65 MAX8736ETL+
PR166 PR95 41 49 1000P
NTC_10K 100P *0 GND GND
42 50
GND GND
43 48
GND
GND
GND
GND
GND GND
44
45
46
47
PU5 <Pin Numbers Visible>

VR_HOT#-Active Low when THRM Voltage
PR105 0
level below 1.5V VSSSENSE_1
(6) VSSSENSE
4 4
VCCSENSE_1
(6) VCCSENSE
PR104 0
Parallel Parallel
PROJECT : OT1
Custom MAX8736ETL+(CPU) 1A

A B C D E F G H
5 4 3 2 1
Model OT1 MB BOARD

MODEL CHANGE LIST
DB1 --->DB2 Page FROM TO
1. modify Crystal C-load C105,C106,C78,C79,C450,C451,C49,C50 (Per vender test report)
2.change SES_INT pin. Remove U15 pin 16 and 25, and connect to INTH# (pin G7) of ICH7(U10) 1 1A
OT1 MB
3.Delete R36,R28 to avoid BATLOW# double pull-high 2 1A
31OT1MBXXXX 4. R26,R37 change pull hi to 3V_S5 to avoid leakage current issue
5.Delete Pin17,RP38 ,add R460 for Debug card 3 1A
D D
6.delete CN5,U25 4 1A
7.modify CN2,CN24,CN33 footprint
8.Modify CN13#71 5 1A
9.Delete R358 to avoid leakage current 6 1A
10.add NIC power down circuitry (LAN)
11.change U16 power source to 3V_S5 to avoid leakage current 7 1A
12.Delete R358 to avoid leakage current 8 1A
13.delete R417,C535 ,Add R461
14.R400,R401 change vaule to 34.8k,R399 change to 16.2K to adjust Amplifer GAIN 9 1A
15.modify CRT circuit(CRT_HSYNC,CRT_VSYNC) 10 1A
16.modify R253,CN29,U9,U4,U30 footprint
17.change TPM addres (R71 add,R74 not mount) 11 1A
18.add CN10 add Pin28,29,30 , CN8 addadd Pin6,8 for T/P buttom 12 1A
19.add Q38 ,Q39 for Battery LED change to common cathode
20.Del R11,R12,R13,R14.due to U4 change 13 1A
21.add H20,H21 14 1A
22.For KBC code, add 499K_1%(0603) on PR134 location
C 23. change R58,R53 to 2.2K for SMBUS modify 15 1A C
24.For KBC code, add 499K_1%(0603) on PR134 location 16 1A

25. change RP7,RP11,RP22,RP14,RP12 ,RP8 to 22 ohm,add mount R357 to modify system clock signal
26. change PC22 to 1U,L48 change to 0 ohm,R421 to 4.7K ohm 17 1A
18 1A
1. Delete U42 temporary
2. Change CN10,CN11 PIN Define , for CN10 (Keyboard connector) rotate 180 degree 19 1A
7/18-7/22
3. update NIC power down circuitry (LAN) 20 1A
4. Change CN11 footprint
5. Change PC36,PR41,PR134 footprint 21 1A
22 1A
1. Change PR77 to 499_1%_0603 p/n:CS14993F939,PR76, change to no install ,R336 change to 0 ohm for INTEL MOW
23 1A
7/25-7/27 2. R7 change to 3.9k/1%/0402 p/n:CS23902FB14 According to HP request for adapter ID pin
24 1A
3. PC22 change footprint to 0805,PR41 change to 30.1K
25 1A
4. R196 install to 51 ohm for Yonah B-0 step processor
26 1A
B 5. Change CN8 PIN DEFINE B
27 1A
6. Change C81,C255,C8,C551 footprint
28 1A
7. add C577,C578,C579 footprint
29 1A
30 1A
31 1A
32 1A
33 1A
34 1A
35 1A
36 1A
37 1A
A
38 1A A
PROJECT : OT1
Custom ->DB** Change history 1A

5 4 3 2 1

Ot1 Block Diagram: Intel ULV Peutium-M / ULV Celeron-M

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Ot1 Block Diagram: Intel ULV Peutium-M / ULV Celeron-M

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5 4 3 2 1

OT1 BLOCK DIAGRAM 14.318MHz

CPU CORE CPU Thermal

HyperThansport I/O BUS

PATA PCI BUS

USB PORT 1(POWER SPI SYSTEM

Bluetooth Module P28

Date: Friday, July 29, 2005 Sheet 1 of 38

INDEX Power & Ground

37 CPU POWER T-GND AUDIO JACK GND

PCI DEVICES IRQ ROUTING PCB STACK UP SM BUS

Date: Friday, July 29, 2005 Sheet 2 of 38

S.W SC4215 +2.5V

5VPCU S.W +5V

S.W 1.5V_A S.W

KBC_PW_ON S5_ON S5_OND

HWPG MAX1907 CPU_CORE SLP_S3# MAINON MAIND

Date: Friday, July 29, 2005 Sheet 3 of 38

Date: Friday, July 29, 2005 Sheet 4 of 38

(7) H_D#[63:0] H_D#[63:0] (7)

H_A20M# A6 A25 H_THERMDC 1K/F H_DINV#1 M26 AC20 H_DINV#3

(14) H_INTR LINT0 TEST1 COMP[3]

T33 RSVD[04]# (4) CPU_BSEL2 BSEL[2] PSI# PSI# (37)

+1.05V R420 R429

Date: Friday, July 29, 2005 Sheet 5 of 38

Date: Friday, July 29, 2005 Sheet 6 of 38

Date: Friday, July 29, 2005 Sheet 7 of 38

M_A_DQ45 AN9 AH11 AR23

Date: Friday, July 29, 2005 Sheet 8 of 38

PM_EXTTS#1 H26 J40

T29 H28 R379 150/F B16 T40

T97 TP_MCH_NC5 BA39 AG37 DMI_RXN2 CRT_G C22 G36

T120 NC7 (26) CRT_R CRT_RED EXP_A_TXP_4

1.8VSUS L_CLKCTLA R145 10K/F

R155 10K/F PM_EXTTS#0

MCH_CFG_6 R179 *10K/F

+V1.5_PCIE +V1.5_PCIE (11)

Date: Friday, July 29, 2005 Sheet 9 of 38

U35G C267 U35F

+V3.3_TVDAC 80mils +2.5V +1.05V

Date: Friday, July 29, 2005 Sheet 11 of 38

Date: Friday, July 29, 2005 Sheet 12 of 38

VCCRTC C389 1U +3V

Date: Friday, July 29, 2005 Sheet 14 of 38

Direct Media Interface

R43 8.2K USB_OC1# USB_OC1# (28)

T21 TP_ICH_RSVD3 AG4 AH8 TP_ICH_RSVD8 7/15/2005

Date: Friday, July 29, 2005 Sheet 15 of 38

U10C RSMRST# R282 10K

SB_GPIO12 R37 10K 3V_S5 CLKUSB_48 14M_ICH

DB2 stage:R37 pull hi to 3V_S5 R50 R283

Date: Friday, July 29, 2005 Sheet 16 of 38

U10E +5V +3V +1.05V

Date: Friday, July 29, 2005 Sheet 17 of 38

PANEL VCC CONTROL

Date: Friday, July 29, 2005 Sheet 18 of 38

C409 C407 C411 C406

C396 C413 C400

3VSUS FOR DEBUG PORT(LPC) 15 GND Reserved 16 RP37 3 4 0X2 LAD0/FWH0

Date: Wednesday, August 03, 2005 Sheet 19 of 38

DB2 stage: C450 18P

Date: Friday, July 29, 2005 Sheet 20 of 38

A_CD2# A_A2 SKTAAD23/A3 SKTA/VPP1 MS_CLK/SD_CLK/SM_EL_WP#

7/11/2005 33P 33P 33P 33P