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Prof. Guang-Zhong Yang

Imperial College London Prof. Guang-


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Professor Yang

Prof. Guang-Zhong YangDr. Surapa Thiemjarus


Dr. Ching-Mei Chen

Prof. Guang-Zhong Yang

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Deep N-well
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Case 2 IC 2 VDD Fig. 3(a)
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Case 3Fig.4(a)PMOSbodysource
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03-5773693 ext.155
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Asus ZenFone 5 1

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C001 Circuit Simulation and Analysis with HSPICE 1400 3600 150
C002 Analog IC Design using ADP and Laker 2100 5400 450
C003 Physical Verification with Calibre 1400 3600 270
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C004 Full-Custom IC Design Concepts / 2800 7200 500

Mixed-Signal IC Implementation and Verifica-
C005 tion 2100 5400 200
C010 IC 0 150
C101 Cell-based IC Implementation and Verification 1400 3600 250
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C102 Verilog 2100 300
C104 Logic Synthesis with Design Compiler 2100 2 250
C105 HDL Debugging with Verdi / 1400 3600 150

Cell-Based IC Physical Design and Verifica-
C106 tion with SOC Encounter 2100 2 200

H'? 12
Post-Layout Simulation Verification with
C109 1400 3600 180
Nanosim
Cell-Based IC Physical Design and Verifica-
C111 tion with IC Compiler 2100 2 250
C115 PrimeTime Signoff 700 1800 150
C201 RF Measurement 700 1800 180
C203 Design of RF CMOS IC 1400 3600 250
C204 Spectre RF 700 1800 150
C205 ADS Circuit 1400 3600 180
C207 ADS Momentum 1400 3600 180
/
C209 CMOS/IPD 700 1800 150

High-Frequency Communication System
C210 Measurement 700 1800 150
C211 PCBPADS Logic 700 150
C212 PCBPADS Layout 1400 150
C213 3DEMPro 700 200
C303 FPGA Design Fundamentals(for Xilinx) 1400 2 450
C304 FPGA Design Fundamentals(for Altera ) 1400 3600 450
Design for Testability with DFT Compiler and
C401 TetraMAX 1400 3600 200
C404 Analog Measurement 700 1800 180

C509 Hardware/Software
Co-Design in ESL / 0 150
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C512 System Verilog 1400 3600 200
C514 700 1800 350
C601 CMOS MEMS Design and Simulation 1400 3600 300
C606 Sensor Readout Circuit Technology 700 1800 180
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C609 CIC MEMS measurement tool introduction 700 1800 150

C701 T25HV 350 900 150
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C801 (3D ICs) 700 1800 150

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103E002-C Full-Custom IC Design Concept
103E003-C RF CMOS IC Design
103E004-C Verdi fundamental and Siloti full-chip-simulation training
103E005-C LakerADP+LakerL3 SDL flow training

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103E006-C Advanced Design System - Fundamentals
103E007-C CMOS BioMEMS Sensing Technology
103E008-C Sensor Readout Circuit Technology
103E009-C RF
103E010-C Advanced Design System - Momentum
103E011-C Digital IC Testing Step-by-Step with Verigy 93000
103E012-C Step Into Electronic System Level Design
103E013-C FPGA Design Fundamentals for Altera
103E014-C Logic Synthesis (Synopsys)
103E015-C Cell-Based IC Physical Design and Verification with IC Compiler
103E016-C Brief Introduction of Cell-based Design
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Set Up the Environment
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Import Design
Debug in Source Code View
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T18-103B-A0019 O 'Y5/60GHz 2.037*1.250

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T18-103B-A0021 O gLTE0.7~2.7GHz 0.570*0.570

T18-103B-A0022 OA wr} 0.949*1.011

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H'? 29
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T18-103B-E0032 O g 1.003*0.668

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T18-103B-E0034 O ]D 1.148*1.148

T18-103B-E0036 OO 360gK-band( 0.555*0.655

T18-103B-E0037 O Nano-f 0.618*0.618

T18-103B-E0040 O 1.8GHz CMOSU 0.570*0.739

T18-103B-E0041 O DC-DCg 1.086*1.018

T18-103B-E0042 O gLTE1.8GHz 90 0.551*0.906

T18-103B-E0043 Ob  0.628*0.628

T18-103B-E0044 O 0.7~2.7GHz  0.572*0.570

T18-103B-E0046 O MU'B 0.841*0.905

T18-103B-E0047 O 0.978*0.959

T18-103B-E0048 O MOS2 0.771*0.685

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T18-103B-E0053 O 0.940*0.940

T18-103B-E0055 O 0.640*0.829

T18-103B-E0056 O w52.4GHz95GHzEU 0.950*0.630

T18-103B-E0057 O 5.8GHzU 1.166*0.597

T18-103B-E0058 O XU 0.895*0.595

T18-103B-E0059 O 3-D 0.625*1.084

T18-103B-E0060 O Q 0.953*0.952

H'? 31
T18-103B-E0061 O g(1VM- 0.725*0.906

T18-103B-E0062 O gWSN( 1.080*1.026

T18-103B-E0063 O 5.2GHzUnmos128 1.200*0.600

T18-103B-E0065 O C 0.816*0.821

T18-103B-E0066 IO 5GHz CMOS 0.842*0.612

T18-103B-E0067 O 24GHz 25dBm (U 1.035*0.940

T18-103B-E0068 OA g15/(3 0.888*0.811

T18-103B-E0069 O X-Band 0.880*0.810

T18-103B-E0070 O XU 1.030*1.050

T18-103B-E0071 O Y4z(/f 0.567*0.530

T18-103B-E0072 O 2.4GHz 0.669*0.974

T18-103B-E0073 BO \ 0.796*1.017

1/R-
T18-103B-E0074 O 0.816*0.847
2R>G
T18-103B-E0075 OO U 1.000*1.000

T18-103B-E0076 O 5.2GHz UNMOS128 1.200*1.150

T18-103B-E0077 IO ( 1.155*1.197

T18-103B-E0078 O  0.628*0.628

}4L
T18-103B-E0079 O 1.016*0.949

T18-103B-E0080 OO  0.888*0.758

T18-103B-E0081 O CMOS 0.18um]t9 1.178*1.192

T18-103B-E0082 O J( 1.190*1.195

T18-103B-E0083 O U 1.000*0.900

T18-103B-E0084 O U( 0.930*1.000

T18-103B-E0086 O MOS3 1.079*1.132

T18-103B-E0088 O \( 1.009*1.022

T18-103B-E0089 O gISMUNII(U 0.709*0.912

H'? 32
T18-103B-E0090 O ( 0.724*0.943

T18-103B-E0091 O C 1.126*1.109

T18-103B-E0093 O 1.132*1.022

gLbalun(24GHzg0.18um
T18-103B-E0094 O 0.750*0.505
CMOS
T18-103B-E0095 O (w 0.780*0.680

T18-103B-E0096 O g(U 1.200*1.200

T18-103B-E0097 O 24 GHz ACMOSU 0.910*1.195

T18-103B-E0098a O ISPU8051(VLSI 1.108*1.101

T18-103B-E0099 O 5.2GHzUNMOS64 1.200*1.150

T18-103B-E0100 O 2.4GHz( 0.726*0.663

T18-103B-E0101 O 24GHz CMOSL 0.480*0.510

GFO(G!
T18-103B-E0102 O 0.888*0.888
H
10/24 GHzgyg(}U
T18-103B-E0103 O 0.957*0.918

T18-103B-E0104 O 24GHzCMOSL 0.450*0.450

fM9g(
T18-103B-E0106 O 1.200*0.904
(g
T18-103B-E0107 O 2.4GHz 0.396*0.425

T18-103B-E0108 O 0.18um CMOS L 0.940*0.940

T18-103B-E0109 O g02.4 GHz 0.878*0.814

g(5.6
T18-103B-E0111 O 0.763*0.770
GHzgWiMAX (
T18-103B-E0112 O \S 1.133*1.180

T18-103B-E0114 O /G 0.732*0.724

T18-103B-E0115a O }/( 1.198*1.191

T18-103B-E0116 O 0.742*0.794

T18-103B-E0117 O g0.18 um CMOS  0.838*0.997

T18-103B-E0118 O U 1.195*1.199

T18-103B-E0119 Or g5~12GHz UCMOS8 1.189*1.002

T18-103B-E0120 O g5G/11GU 0.751*0.800

H'? 33
Wafer Mapping (IC)

H'? 34
D35-103BH

H
IC ('A)/('A) 

D35-103B-A0005  g(b 3.059*2.787

gt(tH
D35-103B-A0006  1.096*1.005

fHJc(
D35-103B-A0010m  1.905*1.927

D35-103B-A0011  (CMOS-MEMSx 1.181*1.075

gCMOS MEMS 9 1.500*1.500


D35-103B-A0012m 

D35-103B-A0013 A g(_Hb[ 2.879*2.879

D35-103B-A0014  2.500*2.500

CMOSz??
D35-103B-A0015  5.200*1.520
gb[
D35-103B-A0016  gCMOS 1.928*1.920

D35-103B-A0017   1.926*1.810

D35-103B-A0018  gCMOSY( 2.080*2.080

D35-103B-A0019  2.470*1.953

5(M9(:
D35-103B-P0001  1.505*1.646
8
D35-103B-P0002  YS8DC-DC 1.513*1.513

D35-103B-P0003m  e(H 1.797*2.352

g9
D35-103B-P0004  1.539*2.174
(
(wCMOS j
D35-103B-I0001  0.979*1.999
H
g(
D35-103B-I0002  0.876*0.908
/8
(wCMOS 5
D35-103B-I0003 I 0.979*1.999
H
T(U
D35-103B-I0004  2.447*2.490

D35-103B-I0005 ,A eo` 2.349*2.349

D35-103B-I0007a  ( 0.865*0.904

H'? 35
D35-103B-E0002 , VLSI(null) 1.056*1.056

D35-103B-E0004  I(null) 0.834*0.721

D35-103B-E0005 , VLSI(null) 1.056*1.056

D35-103B-E0006+m  9(null) 1.494*1.489

D35-103B-E0007 ,, VLSI(null) 1.056*1.056

D35-103B-E0008  (Special Projects) 1.348*1.259

D35-103B-E0009 I (null) 1.314*1.307

D35-103B-E0010m  t(null) 1.419*1.439

D35-103B-E0011  G(Advanced Analog IC Design) 1.461*1.461

D35-103B-E0012  II(thematic production II) 1.461*1.350

D35-103B-E0013  (null) 1.314*1.307

D35-103B-E0014  (null) 1.314*1.307

D35-103B-E0015  (null) 1.314*1.307

D35-103B-E0016 b 3(null) 0.995*0.948

D35-103B-E0017  3(null) 0.995*0.948

D35-103B-E0018  VLSI(null) 0.906*0.906

D35-103B-E0019  VLSI(null) 0.906*0.906

D35-103B-E0020  VLSI(null) 0.906*0.906

D35-103B-E0021+m  9(null) 1.494*1.496

D35-103B-E0022m  t(null) 1.497*1.460

D35-103B-E0023  (null) 1.350*1.350

D35-103B-E0024  t(null) 1.500*1.500

D35-103B-E0026  G(null) 1.500*1.500

,,
D35-103B-E0027 (null) 1.489*1.489
/
(INDEPENDENT STUDIES IN ELEC-
D35-103B-E0028 , TROMAGNETIC COMPATIBILITY) 1.000*1.000

H'? 36
,,
D35-103B-E0029 (Special Project) 1.430*1.402

D35-103B-E0030  (null) 1.444*1.500

Wafer Mapping (IC)

H'? 37

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