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Mosfet Doble Superficial Canal N 30V 8amp AO4854 PDF
Mosfet Doble Superficial Canal N 30V 8amp AO4854 PDF
ESD Protected
100% UIS Tested
100% Rg Tested
SOIC-8
D D
Top View Bottom View
Top View
S2 1 8 D2
G2 2 7 D2 G G
S1 3 6 D1
G1 4 5 D1
S S
Pin1
Thermal Characteristics
Parameter Symbol Typ Max Units
Maximum Junction-to-Ambient A t 10s 48 62.5 C/W
RJA
Maximum Junction-to-Ambient A D Steady-State 74 90 C/W
Maximum Junction-to-Lead Steady-State RJL 32 40 C/W
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING
OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,
FUNCTIONS AND RELIABILITY WITHOUT NOTICE.
30 30
10V 4V
VDS=5V
25 25
3.5V
20 20
ID (A)
ID(A)
15 15
3V 125C
10 10
5 5 25C
VGS=2.5V
0 0
0 1 2 3 4 5 1 1.5 2 2.5 3 3.5 4
VDS (Volts) VGS(Volts)
Fig 1: On-Region Characteristics (Note E) Figure 2: Transfer Characteristics (Note E)
30 1.6
Normalized On-Resistance
VGS=10V
25 1.4
ID=8A
RDS(ON) (m )
VGS=4.5V 17
VGS=4V
20 1.2 5
ID=4A
2
15 1
VGS=4.5V 10
ID=4A
VGS=10V
10 0.8
0 5 10 15 20 0 25 50 75 100 125 150 175
ID (A)
Figure 3: On-Resistance vs. Drain Current and Gate Temperature (C) 0
Voltage (Note E) 18
Figure 4: On-Resistance vs. Junction Temperature
(Note E)
40 1.0E+02
ID=8A
35 1.0E+01
40
30 1.0E+00
RDS(ON) (m )
1.0E-01 125C
IS (A)
25 125C
1.0E-02
20 25C
1.0E-03
15
25C 1.0E-04
10
2 4 6 8 10 1.0E-05
VGS (Volts) 0.0 0.2 0.4 0.6 0.8 1.0 1.2
Figure 5: On-Resistance vs. Gate-Source Voltage VSD (Volts)
(Note E) Figure 6: Body-Diode Characteristics (Note E)
10 1200
VDS=15V 1000
8 ID=30A
Ciss
Capacitance (pF)
800
VGS (Volts)
6
600
4
400 Coss
2
200
Crss
0 0
0 5 10 15 0 5 10 15 20 25 30
Qg (nC) VDS (Volts)
Figure 7: Gate-Charge Characteristics Figure 8: Capacitance Characteristics
1000.0
100
IAR (A) Peak Avalanche Current
TA=25C
100.0
RDS(ON)
ID (Amps)
TA=100C 10.0
limited 100s
10
1.0 1ms
10ms
0.1 TJ(Max)=150C 10s
TA=150C TA=125C DC
TA=25C
0.0
1 0.01 0.1 1 10 100
0.000001 0.00001 0.0001 0.001 VDS (Volts)
Time in avalanche, tA (s) Figure 10: Maximum Forward Biased Safe
Figure 9: Single Pulse Avalanche capability (Note Operating Area (Note F)
C)
10000
TA=25C
1000
Power (W)
100
10
1
0.00001 0.001 0.1 10 1000
Pulse Width (s)
Figure 11: Single Pulse Power Rating Junction-to-Ambient (Note F)
10
D=Ton/T In descending order
TJ,PK=TA+PDM.ZJA.RJA D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
Z JA Normalized Transient
RJA=90C/W
Thermal Resistance
0.1
PD
0.01 Single Pulse
Ton
T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 12: Normalized Maximum Transient Thermal Impedance (Note F)
DUT -
Vgs
Ig
Charge
Resistive Switching Test Circuit & Waveforms
RL
Vds
Vds
90%
DUT
+ Vdd
Vgs VDC
Rg - 10%
t on toff
Id Vds
Vgs + Vdd I AR
Vgs VDC
Rg - Id
DUT
Vgs Vgs
Vds + Q rr = - Idt
DUT
Vgs
t rr
Vds - L Isd IF
Isd dI/dt
+ Vdd I RM
Vgs VDC
Vdd
Ig
- Vds