Download as pdf or txt
Download as pdf or txt
You are on page 1of 4

1 Convolutional codes

1.1 Example
Binary convolutional codes are similar to parity check codes in some ways, and
different in others. They are similar, because they are linear and the codewords
can be thought of as a sequence of parity bits, and they can be useful for
detecting and correcting errors. But they are different, because convolutional
codes are not block codes.
The message appropriate for a convolutional code is a sequence m of bits (a
bitstream) that you can imagine arriving one bit at a time, first m0 , then m1 ,
then . . ..
The codeword is another bitstream c that is created one bit at a time, first
c0 then c1 , then . . .. When mk arrives, ck can be computed from mk and a finite
number r of preceding message bits mk1 , mk2 , . . ., mkr .
We explain binary convolutional codes with the standard ubiquitous begin-
ning example. Since its binary, we always add bits mod 2: 1+ 1=0.
Example Code 1 Message stream m produces code stream c.

m = m0 , m1 , m2 , m3 , m4 , . . .
c1 = m0 , m1 , m2 + m0 , m3 + m1 , m4 + m2 , . . . , mk + mk2 .

For example, if
m = 1101001
then
c1 = 111001101.
We can express the encoder as a polynomial multiplication.
Writing m1 = m2 = 0, define

X
m(x) = m0 + m1 x + m2 x2 + = mj xj
j=0

X
c1(x) = m0 + m1 x + (m2 + m0 )x2 + = (mj + mj2 )xj
j=0

It is easy to check that


c(x) = (1 + x2 )m(x).
We call g1 (x) = 1 + x2 the generator polynomial for code C1.
You can think of the code as generated by an encoding device that produces
one code bit at a time. The message stream passes throughout the encoder.
When ready to compute the kth code element, the encoder holds mk in its
current register and mk1 and mk2 in its two memory registers. It outputs
the binary sum of mk and mk2 , then shifts the whole message stream one unit

1
to the right and all memory of mk2 is lost. We start the process off with 0s
in the memory registers and m0 in the current register.
Waiting current Memory1 Memory2
mk+3 , mk+2 , mk+1 mk mk1 mk2
after shifting
mk+4 , mk+3 , mk+2 mk+1 mk mk1
Example Code 2
Message stream m produces code stream c.

m = m0 , m1 , m2 , m3 , m4 , . . .
c2 = m0 , m1 + m0 , m2 + m1 + m0 , . . . , mk + mk1 + mk2 .

We can express the encoder as a polynomial multiplication.


Writing m1 = m2 = 0, we define

X
m(x) = mj xj
j=0

X
c2(x) = (mj + mj2 )xj
j=0

It is easy to check that

c(x) = (1 + x + x2 )m(x).

We call g2 (x) = 1 + x + x2 the generator polynomial for code C2.


The computer for Code 2, just as for Code 1, has two memory registers. It
computes ck as the binary sum of the elements in all three registers, the current
register and the two memory registers.
Example Code 3 We simply interleave the codes C1 and C2 to produce
the code better code C. Neither of the first two codes can provide redundancy
required to protect agains terrors in transmission, because a the coder produces
just one bit of code per bit of message.
We can use the same coding device with two memory registers as before. We
just ask it to output two bits each time the message shifts.
We can put code bits from C1 in the even positions, using polynomial mul-
tiplication g1 (x2 )m(x2 ) and place the code from C2 in the odd positions via
xg2 (x2 )m(x2 ). So

X
c(x) = cj x j
j=0

= (g1 (x2 ) + xg2 (x2 ))m(x2 )


= (1 + x + x3 + x4 + x5 )m(x2 )
= g(x)m2(x)

2
where we have defined

g(x) = 1 + x + x3 + x4 + x5
m2(x) = m(x2 ).

The power series m2 is appropriate for a code created by a computer with 2


memory registers.
For example, with m = (1, 1, 0, 1, 0, 0, 1) we have

m 1 1 0 1 0 0 1 0 0
c1 1 1 1 0 0 1 1 0 1
.
c2 1 0 0 0 1 1 1 1 1
c 1 1 1 0 1 0 0 0 0 1 1 1 1 1 0 1 1 1

We say that the code C has rate 1/2 because 1 message bit converts to 2 code
bits. We say that the depth of the code is 2 because it can be implemented with
just 2 memory registers.

1.2 State diagram


There is a graphical way to represent the encoder as a finite state automaton.
We continue with the code C.

1/01

11

1/10 0/10
0/01

10 01

1/00
1/11 0/11

start 00

0/00

In the diagram, the four circles represent the four memory states of the
encoder, defined by the values in its memory register. When bit a is in the
current register, the encoder creates two code bits bc indicated by an arrow
labeled a/bc leaving the current memory state and going to the new memory
state after the shift. For example, the step described by the next picture of
the encoder is represented by the arrow 0/10 from state 11 to state 01. The

3
process of encoding a string m0 m1 . . . is represented by beginning at state 00
and then following arrows dictated by the mi as you jump from state to state
in the automaton, with each jump emitting two code bits.

One Arrow in the Encoder Automaton


Waiting current Memory1 Memory2
mk+3 , mk+2 , mk+1 0 1 1
emit 10, shift
mk+4 , mk+3 , mk+2 mk+1 0 1

You might also like