CALIFORNIA STATE UNIVERSITY, NORTHRIDGE

DESIGN OF AN OPTIMAL KU-BAND OSCILLATOR

FOR SATELLITE UPLINK MODULES

A graduate project submitted in partial fulfillment of the requirements

For the degree of Master of Science

in Electrical Engineering

By

John Lasantha Perera Jayasinghe

December 2013
The graduate project of John Lasantha Perera Jayasinghe is approved:

_____________________________________________ __________________

Professor Somnath Chattopadhyay Date

_____________________________________________ __________________

Professor Ali Amini Date

_____________________________________________ __________________

Professor Mathew M. Radmanesh, Chair Date

California State University, Northridge

ii
 Dedication

Dedicated to All Individuals Contributing to the Betterment of Society

With Their Brilliant Knowledge in Science & Engineering

iii
 Table of Contents

Signature Page ii

Dedication iii

List of Figures vi

Abstract viii

Chapter 1: Introduction 1

1.1 Problem Definition 1

Chapter 2: Design Theory and Analysis 3

2.1 Review of the Literature 3

2.2 Theory of Negative Resistance Oscillating Conditions 5

2.3 Common Source to Common Gate S-parameter Conversion 8

Chapter 3: Design Procedure 11

3.1 Stability Check 11

3.2 Output Stability Circle Characterization 12

3.3 Input Stability Circle Characterization 13

3.4 Negative Resistance Oscillator Design 14

3.5 Terminating Network Matching Circuit Design 16

3.6 Generator Tuning Network Matching Circuit Design 18

Chapter 4: Simulation Results 20

4.1 MATLAB Results 20

4.1.1 S-Parameter Conversion: Common Source to Common Gate 20

iv
 4.1.2 Linear Analysis Calculations 21

4.2 ADS results 22

4.2.1 ADS Transistor Model 22

4.2.2 Bias Conditions and Common Source Configuration S- 23

parameter Behavior

4.2.3 Common Gate Configuration S-parameter Behavior 27

4.2.4 ADS Terminating Network Circuit 30

4.2.5 ADS Generator Network Circuit 31

4.2.6 Overall ADS Oscillator Circuit and Results 32

Summary of Analysis 37

Conclusions 38

References 39

Appendix A: MATLAB Common Source to Common Gate S-parameter Conversion 40

Appendix B: MATLAB Oscillator Parameters Calculation 45

Appendix C: ADS Oscillator Negative Resistance/Reactance Measurement 51

Appendix D: MESFET Transistor NE72218 Data Sheet 52

Appendix E: MESFET Transconductance Measurement Circuit 57

v
 List of Figures

Figure 1.1 Transmitter module at ground base. 1

Figure 2.1 The cross section of an N-Type GaAs MESFET with a recessed gate and 4

three epitaxial layers

Figure 2.2 Two-port transistor oscillator block diagram. 5

Figure 3.1 Output stability circle (for terminating network). 12

Figure 3.2 Input stability circle (for generator tuning network). 13

Figure 3.3 |in| (z-axis) vs. |T| (x-axis) vs. T (y-axis). 14

Figure 3.4 Smith chart for terminating network with load. 16

Figure 3.5 Circuit for terminating network with load. 17

Figure 3.6 Smith chart for generator network. 18

Figure 3.7 Circuit for generator network. 19

Figure 4.1 MATLAB I/O screen. 21

Figure 4.2 NE72218 MESFET non-linear transistor model for ADS. 22

Figure 4.3 Common source configuration S-parameter test bench. 23

Figure 4.4 Actual (dashed) vs. ADS model (solid) common source S-parameters. 24

Figure 4.5 ADS model ID vs. VDS plot. 25

Figure 4.6 ADS model ID vs. VGS plot for fixed VDS=3V. 26

Figure 4.7 ADS model Transconductance plot based on Figure 4.6. 27

Figure 4.8 Common gate circuit with series feedback. 28

Figure 4.9 Actual (dashed) vs. ADS model (solid) common gate S-parameters. 29

Figure 4.10 Impedance measurement setup for the terminating network with load. 30

vi
Figure 4.11 Smith chart for terminating network with load. 30

Figure 4.12 Impedance measurement setup for the generator tuning network. 31

Figure 4.13 Smith chart for generator tuning network. 31

Figure 4.14 Overall ADS oscillator circuit. 32

Figure 4.15 Oscillator frequency spectrum. 33

Figure 4.16 Oscillator time domain signal (steady state). 33

Figure 4.17 Oscillator absolute noise voltage spectrum (around the fundamental). 34

Figure 4.18 Oscillator single side-band phase noise (around the fundamental) 35

behavior.

Figure 4.19 Oscillator open loop response measurement setup. 35

Figure 4.20 Oscillator open loop response. 36

vii
 ABSTRACT

DESIGN OF AN OPTIMAL KU-BAND OSCILLATOR

FOR SATELLITE UPLINK MODULES

By

John Lasantha Perera Jayasinghe

Master of Science in Electrical Engineering

The following thesis project is based on designing a Ku-Band Oscillator operating at 14

GHz for satellite communication applications. A suitable MESFET transistor in the

common gate configuration was employed to achieve a negative resistance (energy

gathering) circuit for the core oscillator. The project was segregated into 2 parts: Linear

Analysis and Harmonic Balance Simulation. In the former phase, the respective

generator-tuning and terminating (for negative resistance) matching networks were

designed based on input and output stability circles generated from suitable small signal

S-parameters. Initially the required calculations were done manually and MATLAB

software was used to further confirm and refine the solutions obtained. Next in the

Harmonic Balance Simulation phase, the Agilent simulation software - Advance Design

System (ADS) was utilized to implement the overall oscillator circuit and evaluate its

main performance parameters such as gain, harmonics and phase noise.

viii
 Chapter 1: Introduction

An electronic oscillator is a device that produces a desired alternating current/voltage

[3]
wave form using a DC power source . Depending on the wave form created, such

oscillators typically fall into 2 groups: Harmonic (Linear) - such as sinusoidal wave form

oscillators and Relaxation (Non-linear) - such as saw tooth wave form oscillators.

Oscillators are generally used in almost all modern day electronic devices such electronic

watches, television sets, radios, modems, cell phones and most notably in computers.

Specifically, they are used for frequency conversion in RF transmitter/receiver modules,

in digital clocks and other synchronizing devices such as PLL circuits and as basic sound

sources in electronic warning systems etc.

1.1 Problem Definition

Recently, there is an overwhelming need for robust, low phase-noise local oscillators

(LO) primarily used in Fixed Service Satellite (FSS) networks where the uplink

frequency is usually allocated to be in the range of 13.6 to 14.5 GHz.

Figure 1.1 Transmitter module at ground base.

1
Hence this report is based on designing an optimal Ku-Band local oscillator (microwave

generator) for the above mentioned FSS uplink (ground base) transmitter modules as

further illustrated in Figure 1.1. In addition, the core objectives of this project are

summarized beneath.

Goals:

Oscillating Frequency: 14.0 0.4 GHz

Output Power: > 25 dBm

Phase Noise (Single Side-Band): < -90 dBc/Hz at 100 kHz Offset

Absolute Noise (at Fundamental): < 0.1 V

2
 Chapter 2: Design Theory and Analysis

2.1 Review of the Literature

Oscillators can be designed in either of two different methods: One using Positive

Feedback and the other using Negative Resistance. Since a 14 GHz transistor oscillator is

preferred, in this report the latter method is used due to the simplicity and robustness of

its design for higher frequencies. In a 2-port design using a transistor, the objective is to

add a network to one of the ports to make it a single port unstable device with negative

resistance. However in the event that the transistor circuit is not sufficiently unstable

enough, it is first considered as a 3 port device and an appropriate external feedback

element (series/parallel inductor or capacitor) is added to one of the ports to attain desired

instability.

Besides three possible transistor configurations can be utilized to design 2-port

oscillators: common gate (base), common source (emitter) and common drain (collector).

Since common drain high frequency oscillators are difficult to implement, common gate
[2]
and source arrangements are usually favored . In this thesis, the common gate

arrangement is exclusively chosen since it provides the best tuning capability along with

the fact that it is the most effective of the three [2].

Furthermore in the following project, an N-Type GaAs MESFET will be utilized in

realizing the KU-Band oscillator. Specifically, the NE72218 MESFET transistor has a

recessed gate and 3 epitaxial layers: n-type layer, n+ epitaxial layer and a p-type buffer

layer. These layers are then followed by a semi-insulating GaAs layer doped with

Chromium. Figure 2.1 further elaborates the different regions in the MESFET.

3
Figure 2.1 The cross section of an N-Type GaAs MESFET with a recessed gate and three
epitaxial layers.

GaAs transistors are usually preferred over Si-based transistors especially in high

frequency applications since the GaAs carrier mobility is much higher. Moreover, the

electron saturation velocity for GaAs is much larger than that of Si, resulting in a wider

operating frequency range.

4
2.2 Theory of Negative Resistance Oscillating Conditions

In general, a 2-port
port negative re
resistance,
sistance, transistor oscillator can be summarized into an

equivalent block diagram shown below. Typically, the

he Terminating Network consists of

the oscillator load; and together with the transistor

transistor, provides the necessary
nece negative

resistance (for power coll

collection) to the overall circuit. On the other hand, the Generator

Tuning Network determines the frequency of oscillation via a resonator or similar

impedance matched circuit.

[S]

Figure 2.
2.2 Two-port
port transistor oscillator block diagram.

Where:

ZG & G Generator tuning network impedance and reflection coefficient

Zin & in Input port impedance and reflection coefficient

Zout & out Output port impedance and reflection coefficient

ZT & T Terminating network impedance and reflection coeffic

coefficient

[S] Transistor S-parameter

parameter matrix

L Inductance of inductor

5
In order for the above 2-port device to oscillate, all of the fundamental conditions (shown

below) must be met without any exceptions:

1. Unstable transistor behavior:

1     +  

= < 1,   =        
2   

OR

1   
 = <1
 

 +    

2. Oscillating input port:

     Z 
 .  =  + .  1(= 1steadystate)
1    + Z

3. Oscillating output port:

    * Z 
'() .  =  + .  1(= 1steadystate)
1   * + Z

Conditions 2 & 3 are mutually inclusive and hence if one is attained the other is achieved

automatically which implies that both ports concurrently undergo oscillations.

Furthermore, since the matching circuits on either side of the transistor are also passive

circuits, the below conditions become evident [4].

4. | G| < 1 & | T| < 1 (passive circuits)

5. Therefore |in| > 1 & |out| > 1 (leads to negative resistance)

6
Alternatively, considering the above device as a one-port device, conditions interrelated

to the above requirements must also be satisfied for oscillation startup & steady state:-

Z  +  Z  < 0(= 0steadystate)

R   +  R   < 0(= 0steadystate)andX +  X  = 0

Thus an extensively used method when designing oscillators is choosing the generator

tuning resistance (RG) to be 1/3rd of the absolute value of the input port resistance

(|Rin|/3); and then choosing the respective phase components to cancel each other out

(XG = -Xin).

023
 = 0 +  1 =   123
3

7
2.3 Common Source to Common Gate S-parameter Conversion

In most cases, device data sheets only provide common source S-parameters for a given

range of frequencies. Hence if design requirements point to other configurations, a need

arises for them to be converted to their respective common gate or common source

counterparts. Typically software programs (MATLAB etc.) are used for such conversions

especially when a large range of frequencies is involved.

At the outset of such a conversion, the common source S-parameters should be

transformed to the corresponding admittance values as below:-

5 = (1 + 65 )(1 + 6 5 ) 6 5 6 5

(1 65 )(1 + 6 5 )+6 5 6 5

75 = 
5

26 5 26 5
7 5 =  , 7 5 = 
5 5

(1 + 65 )(1 6 5 )+6 5 6 5

7 5 = 
5

These admittance values are then converted to the relevant common gate admittances:-

78 =  75 +  7 5 + 7 5 + 7 5

7 8 =  (7 5 + 7 5 )

7 8 = (7 5 + 7 5 )

7 8 = 7 5

8
The common gate admittances are then converted back to the equivalent S-parameters:-

8 = 91 + 78 :91 + 7 8 : 7 8 7 8

91 78 :91 + 7 8 :+7 8 7 8

68 = 
8

27 8 27 8
6 8 =  , 6 8 = 
8 8

91 + 78 :91 7 8 :+7 8 7 8

6 8 = 
8

Furthermore, if for example an inductor was added in series to make the said transistor

unstable, next the above parameters need to be converted to impedance values. The

impedance of the inductor is then added to each of the above mentioned values to get the

resultant impedances.

Common gate impedance values without inductor:-

; = 91 68 :91 6 8 : 6 8 6 8

91 + 68 :91 6 8 :+6 8 6 8

8 =  
;

26 8 26 8
 8 =   ,  8 =  
; ;

91 + 6 8 :91 68 :+6 8 6 8

 8 =  
;

9
Common gate impedance values with inductor:-

23< = =2>?@

82 =  8 + 23< ,  82 =   8 +  23<

 82 =   8 +  23< ,  82 =   8 +  23<

Normalized common gate impedance values with inductor:-

A82 =  82 / ,A 82 =   82 /

A 82 =   82 / , A 82 =   82 /

Therefore the final common gate S-parameters would be:-

82 = 9A82 + 1:9A 82 + 1: A 82 A 82

9A82 1:9A 82 + 1:A 82 A 82

682 = 
82

2A 82 2A 82
6 82 =  , 6 82 = 
82 82

9A82 + 1:9A 82 1:A 82 A 82

6 82 =
82

10
 Chapter 3: Design Procedure

3.1 Stability Check

The generated common gate S-parameters (with a series inductor) at 14 GHz were:

 = 0.31480524.3494,  = 0.603478 18.4199

  = 0.7178359.01633,  = 0.56068447.5123

Using the above S parameters, stability checks were performed manually using

theoretical equations as below.

K-Parameter Test for instability:

1     +  

= = 0.903 < 1(KL6MNOPQ)
2   

RQTQ  =         = 0.442

-parameter test for instability:

1   
 = = 0.923 < 1(KL6MNOPQ)
 

 +    

Since the transistor was confirmed to be unstable, subsequently the output and input

stability chart parameters were generated to ultimately determine the respective matching

circuits for the overall oscillator.

11
3.2 Output Stability Circle Characterization

The Output Stability Circle (Terminating Network) parameters are summarized beneath:

   
U* =    = 0.119, 0* =  = 3.647
U*

(  ) 
V* = = 4.570 33.13
U*

Since |S11| = 0.315 < 1, the unstable region is inside the intersection between the output

stability circle and the smith chart as depicted below.

Output Stability Circle, |in| = 1

Smith Chart (unit radius)

Unstable Region
C T=4.57 -33.1

RT = 3.65

Figure 3.1 Output stability circle (for terminating network).

12
3.3 Input Stability Circle Characterization

Input Stability Circle (Generator Tuning Network):

   
U =    =  0.096, 0 =  = 4.490
U

(  ) 
V = = 3.613 160.82
U

Since |S22| = 0.561 < 1, the unstable region is inside the intersection of the input stability

circle with the smith chart as depicted below (includes center of smith chart).

Smith Chart
Unstable Region

CG =3.61 -160.8
RG = 4.49

Input Stability Circle, |out| = 1

Figure 3.2 Input stability circle (for generator tuning network).

13
3.4 Negative Resistance Oscillator Design

In light of the above theory, first and foremost a T was chosen from the unstable region

portrayed in the output stability circle plot; such that it maximized the |in| value (see

figure below). This made it possible to get a sufficiently large negative resistance at the

input port.

 = 0.999 36.00,    < 1

   
 =   + = 1.138 18.26,   > 1(LQXNMYZQTQ6Y6MNL[Q)
1  

Figure 3.3 |in| (z-axis) vs. |T| (x-axis) vs. T (y-axis).

14
Input port Impedance:

1 +  
Z =  Z =  023 + 123 = 110.47 266.78=
1  

Hence:

023
 = 0 +  1 =   123 = 36.823 + 266.78=
3

Finally:

1 +  
* =   = 0.26193 153.88=
1  

From the above obtained values, the corresponding G and out values were obtained as

below.

 Z 
 = = 0.95220.85,    < 1
 + Z

   
'() =   + = 1.04837.58, '()  > 1
1  

Given that G falls inside the unstable region in the input stability circle plot and since

|G| < 1 and |out|>1, the conditions for oscillation in the input and out ports were met

automatically on the generator end as well.

15
3.5 Terminating Network Matching Circuit Design

From the previous section T was found to be 0.999 -36.00 and hence ZT to be 0.262 -

153.88j . As a result the equivalent normalized impedance is:

1 +  
A* = =  T* +  ]*  = 0.00524 3.078=
1  

Figure 3.4 Smith chart for terminating network with load.

16
Referring to the above smith chart, an open shunt stub can be used to move from the

resistive load of 50 (point L) to point A. The electrical distance from the said load to

point A, in terms of wavelengths and degrees are:

^_` = (0.25 + 0.004)^ = 0.254^

a_` = 0.254 360 = 91.4

On the other hand, to move from point A to point B in the smith chart, a normal

transmission line can be utilized. The electrical length of this transmission line, in

wavelengths and degrees are:

^`c = (0.300 0.004)^ = 0.296^

a`c = 0.296 360 = 106.6

AB = 106.6

B Z0 =50 A L

LA = 91.4 Z0 =50 RL =50

T = 0.999 -36.00

Figure 3.5 Circuit for terminating network with load.

17
3.6 Generator Tuning Network Matching Circuit Design

Similar to the earlier design, for the generator tuning network G was found to be 0.952

20.85 and hence ZG to be 36.82 + 266.78j . As a result the analogous normalized

impedance is:

1 +  
A = =  T +  ]  = 0.736 + 5.336=
1  

Figure 3.6 Smith chart for generator network.

18
A resistor with resistance 36.8 can be used at point G to achieve the resistive

component of the generator network impedance. To move this resistive point to point A,

an open shunt stub can be utilized of which the electrical length would be:

^` = (0.479 0.250)^ = 0.229^

a` = 0.229 360 = 82.4

On the other hand, to move from point A to point B in the smith chart, a normal

transmission line can be utilized. The electrical length of this transmission line, in

wavelengths and degrees are:

^`c = (0.500 0.479 + 0.220)^ = 0.241^

a`c = 0.241 360 = 86.8

AB = 86.8

G A Z0 =50 B

RG =36.8 GA = 82.4 Z0 =50

G = 0.952 20.85

Figure 3.7 Circuit for generator network.

19
 Chapter 4: Simulation Results

4.1 MATLAB Results

4.1.1 S-Parameter Conversion: Common Source to Common Gate

The data sheet of the chosen MESFET only provided the common source S-parameters

for a range of frequencies between 2 to 18 GHz. Hence they had to be converted to the

respective common gate parameters as reference for the equivalent ADS circuit

measurement. Moreover, since the ADS simulation required S-parameters for a range of

frequencies, MATLAB software was used to perform the functions provided in Section

2.4. The software was coded such that it read an s2p file of the original common source

parameters and created a new s2p file with the final common gate S-parameters. Please

refer to the appendix for the flow chart, code and output data of this program, the latter

which was used in the figure under Chapter 4.2.3, as reference data.

20
4.1.2 Linear Analysis Calculations

The Linear analysis calculations were covered earlier in Chapter 3 however MATLAB

was used to confirm these results. The program created was especially useful to swiftly

check for transistor instability which was a crucial part in the design of the oscillator. The

input and output data screen of the program is revealed beneath. Please refer to the

appendix for the flow chart, surface plots (one plot used in fig. 3.3) and source code.

Figure 4.1 MATLAB I/O screen.

21
4.2 ADS results

4.2.1 ADS Transistor Model

Since an operating frequency of 14 GHz is required, choosing a MESFET with instability

at this frequency was essential. Hence the NEC device NE72218 was chosen with

common source S parameters leading to K<1. The first step was to model this transistor

in ADS however the nonlinear model given in its data sheet was for the Libra IV

simulation software (please refer to Appendix D). Therefore first and foremost, minor

adjustments were made to the given model to match the same common source S-

parameter performance (See Fig. 4.2 below).

Figure 4.2 NE72218 MESFET non-linear transistor model for ADS.

22
4.2.2 Bias Conditions and Common Source Configuration S-parameter Behavior

The above model was then added to the core of the below test bench (Fig. 4.3) to measure

the common source S parameters. The gate to source DC voltage (VGS) was set to 0 V (or

grounded) and drain to source voltage (VDS) to 3 V in order to draw a drain current (ID) of

30mA. The series capacitors connected to the gate, source and drain port, each act as DC

voltage blocks preventing DC signals from entering the terminating and generator tuning

networks respectively. Likewise, the series inductors at the drain and gate block AC

current from entering the DC power supply and ground.

Figure 4.3 Common source configuration S-parameter test bench.

23
Fig. 4.4 below reveals the actual measured common source S parameters (at VDS 3 V &

ID = 30 mA, dashed line) with the above ADS test bench S-parameters (solid line) and

demonstrates adequate agreement between the two.

Actual data
ADS data

Figure 4.4 Actual (dashed) vs. ADS model (solid) common source S-parameters.

24
Furthermore, Figure 4.5 given beneath shows the simulation of the drain current (ID)

versus drain-to-source voltage (VDS) curves of the ADS model transistor, for different

gate-to-source voltages VGS = 0 V, -0.5 V, -1 V, -1.5 V and -2.0 V. The device evidently

shows a linearly increasing current between VDS = 0 V to 1.0 V and is in saturation (non-

linear) beyond VDS = 1.5V.

Pinch-off
Gate Length: 0.8um
Linear Gate Width: 400um
Saturation region Vp = 1.25 V
region

Figure 4.5 ADS model ID vs. VDS plot.

Figure 4.6 and 4.7 exhibit the transfer characteristics of the MESFET transistor. The

former plot indicates that the drain current increases exponentially with VGS in the range

of -0.5 V to -1.41 V. The same property is exhibited in the transconductance plot in

Figure 4.7. In addition, the exponential regime of the drain current demonstrates evidence

of a sub-threshold voltage (leakage current). Conversely, the intersection point in the VGS

25
axis gives the threshold voltage to be approximately -1.41 V. Altogether, these plots

present clear indication of a depletion device (normally-ON device).

Additionally, the cut-off frequency (FT) can be obtained from the transconductance

extracted from Figure 4.7 along with the gate to source capacitance (CGS) acquired from

the ADS simulation.

Xe 0.064
d* =  = = 14hiA
2>Vf 2> 0.75 10g

Hence the above cut-off frequency value agrees well with the simulation result.

Figure 4.6 ADS model ID vs. VGS plot for fixed VDS=3V.

26
 Figure 4.7 ADS model Transconductance plot based on Figure 4.6.

4.2.3 Common Gate Configuration S-parameter Behavior

Since the above non-linear model was established to have nearly equivalent behavioral

characteristics of the actual transistor, it was then connected in the preferred common

gate configuration as in Fig. 4.8. Although the DC biasing circuit was untouched, the S

parameter measuring termination at the gate port was removed and connected to the

source port instead.

27
 Figure 4.8 Common gate circuit with series feedback.

However, unlike the common source S parameters earlier, the common gate S-parameters

did not lead to an unstable system at 14 GHz. Hence a positive feedback inductor of 1.26

nH was added in series with the gate port (Fig. 4.8) to shift the transistor to an unstable

state. Figure 4.7 shows the matrix converted actual common gate S-parameters (dashed

line) derived from the respective measured common source parameters, against the S

parameters obtained (solid line) from the above circuit. The slight difference is due to the

small parity observed in fig 4.4 between the measured common source S-parameters and

the ADS common source circuit S-parameters. However the S-parameters near the

desired frequency are matched sufficiently well.

28
 Actual data
ADS data

Figure 4.9 Actual (dashed) vs. ADS model (solid) common gate S-parameters.

29
4.2.4 ADS Terminating Network Circuit

Assuming the terminating circuit is to be matched to a 50 load, a circuit with an ideal

open shunt transmission line followed by a normal transmission line was designed as in

fig 4.10. The transmission line characteristic impedances were assumed to be 50 and

the electrical lengths used were in degrees.

B A L

Figure 4.10 Impedance measurement setup for the terminating network with load.

L
A

Figure 4.11 Smith chart for terminating network with load.

30
4.2.5 ADS Generator Network Circuit

As per fig. 4.12, an open shunt transmission line was added alongside a resistor with

resistance of 39 followed by a normal transmission line to achieve the above desired

reactance. Fig 4.13 shows the corresponding impedance trail of the alleged circuit on a

smith chart.

G A B

Figure 4.12 Impedance measurement setup for the generator tuning network.

Figure 4.13 Smith chart for generator tuning network.

31
4.2.6 Overall ADS Oscillator Circuit and Results

The Oscillator circuit below is simulated with the ADS Harmonic Balance Simulator

together with a probe component called OscPort (Grounded Oscillator Port). The

harmonic balance simulator is generally used to analyze non-linear circuits in the

frequency domain based on Fourier analysis. Alongside OscPort, it is used to accurately

predict the relevant frequency spectrum and time domain wave form of oscillator circuits
[1]
.

Figure 4.14 Overall ADS oscillator circuit.

Figure 4.15 below shows the power relationships of the first 8 harmonics for the above

setup. As the spectrum undoubtedly shows, the fundamental spectral line at 14.02 GHz is

the only harmonic with a positive output power of 28.8 dBm and the rest have negative

values. This confirms that the device is producing oscillating power at only one

frequency and that there is no power distortion from other harmonics. Furthermore the 2nd

harmonic power level is roughly 45 dBm below the fundamental (or the oscillating

32
waveform power) that implies good isolation. As a result, the envelope of the time

domain signal at steady state in Fig. 4.16 is sinusoidal as expected.

Figure 4.15 Oscillator frequency spectrum.

Figure 4.16 Oscillator time domain signal (steady state).

33
The subsequent absolute noise spectrum (Fig. 4.17) obtained from Fourier analysis of the

steady state signal (carrier mixing) shows that the wave form is affected with very little

phase noise distortion with noise voltage at the center frequency being roughly 0.098 V.

Figure 4.17 Oscillator absolute noise voltage spectrum (around the fundamental).

Likewise, fig. 4.18 depicts the single sideband phase noise below the carrier frequency in

dBc (decibels below carrier per 1 Hz of bandwidth). Hence for example at 10 kHz offset

from the oscillation frequency of 14 GHz, the noise output is below -79.5 dBc and at 100

kHz offset it is below -97.5 dBc which is more than acceptable for high speed satellite

data transfer applications. The NE72218 MESFET is a device with low flicker noise

hence the oscillator also has good noise performance. The noise produced by an oscillator

operating as a signal source should never be overlooked since it can severely downgrade

the receiver selectivity and thus limit the overall channel allocation budget [3].

34
Figure 4.18 Oscillator single side-band phase noise (around the fundamental) behavior.

In addition, the circuit shown beneath depicts the corresponding open loop response

measurement setup using the ADS OscTest (Grounded Oscillator Test) probe. As the

ADS software manual states, it enables the measurement of the open loop gain or S(1,1)

and phase of a closed loop system [1].

Figure 4.19 Oscillator open loop response measurement setup.

35
 Figure 4.20 Oscillator open loop response.

From the above graph it is evident that at the desired frequency of 14 GHz, the phase

shift (dashed line) is zero and the respective open loop gain (S(1,1)) magnitude (solid

line) is greater than one which is crucial for oscillation start-up. Likewise since the gain

magnitude is greater than one only for a small range of frequencies; this ensures that out

of band oscillations (beyond 13.6 to 14.3 GHz) will not occur. The slope of the phase

shift graph is negative and significantly steep that translates to good frequency stability

with respect to phase shift. Additionally, since the open loop gain peaks at the phase zero

crossing, optimal output power is achieved for the preferred frequency. Please refer to

Appendix C for the oscillator negative resistance simulation result.

36
 Summary of Analysis

Below table summarizes all the key parameters used in this project obtained from 3

different methods namely; by hand calculation, MATLAB programming and ADS

simulation. The error margins between the hand-calculated values to the other 2

simulation values are overall extremely small and thus show perfect agreement between

theory and simulation.

Parameter Hand Calculations MATLAB results ADS Simulation

T 0.999 -36.00 0.9990 -36.00 0.99900 -35.99872

in 1.138 -18.26 1.1381 -18.2558 1.1041 -15.7669

G 0.952 20.85 0.95207 20.8548 0.96409 17.53768

out 1.048 37.58 1.0478 37.5824 1.0365 37.0714

RT 0.262 0.26193 0.26193

XT -153.88j -153.8838j -153.8838j

LA (Terminating ntwk TL) 91.4 NA 91.28

AB (Terminating ntwk TL) 106.6 NA 106.72

Rin -110.47 -110.4689 -115.727

Xin -266.78j -266.7843j -321.816j

RG 36.82 36.82296 38.8775

XG 266.78j 266.7843j 319.4125j

GA(Generator ntwk TL) 82.4 NA 83.06

AB(Generator ntwk TL) 86.8 NA 88.01

Table 4.21 Summary Table.

37
 Conclusions

A negative resistance oscillator in the common gate configuration was successfully

implemented to oscillate at 14 GHz with an output power of 28.8 dBm. The 2nd highest

power spectral line or the 2nd harmonic is 45 dBm below the fundamental and hence there

is no observable harmonic distortion in the time domain output waveform. In addition,

the open loop response S(1,1), depicts the oscillator to have a narrow bandwidth between

13.6 to 14.3 GHz which is stricter than the current satellite uplink requirements.

Moreover, the phase noise performance is such that at 100 kHz offset from the oscillation

frequency, it is below -97.6 dBc which is more than adequate for high speed

extraterrestrial data transfer applications.

Parameter Design Simulation Goal

Oscillator Frequency 14.00 GHz 14.02 GHz 14.000.4 GHz

Output Power NA 28.8 dBm > 25 dBm

Phase Noise (Single Side-Band) NA -97.6 dBc/Hz at < -90 dBc/Hz at

100 kHz offset 100 kHz offset

Absolute Noise (at Fundamental) NA 0.098 V < 0.1 V

Table 4.22 Conclusion Table.

38
 References

[1] Agilent Technologies (2011). Advanced Design System 2011 (ver. 10) Manual. Santa

Clara, CA: Agilent Technologies.

[2] Gonzalez, G. (1984). Microwave Transistor Amplifiers Analysis and Design.

Englewood Cliffs, NJ: Prentice-Hall Inc.

[3] Pozar, M. D. (2011). Microwave Engineering (4th ed.). Hoboken, NJ: John Wiley &

Sons, Inc.

[4] Radmanesh, M. M. (2009). Advanced RF & Microwave Circuit Design: The Ultimate
Guide to Superior Design. Bloomington, IN: AuthorHouse.

39
Appendix A: MATLAB Common source to common gate S-parameter conversion

Flow Chart
Start

Prompt for Input Parameters:

Input file name, inductance L
of series inductor

No
Input file found?

Yes
Open input file, read
frequencies & common source
(cs) S-parameters

Convert to cs admittances (Y)

Convert to common gate (cg) admittances (Y)

Convert to cg S-parameters

Convert to cg impedances (Z)

& add inductance L

Convert back to cg S-parameters

Output: Create new s2p file and write the

new cg S-parameters for each frequency

End

40
MATLAB Input Screen

MATLAB Input File (s2p)

Frequency Re S(1,1), Im S(1,1), Re S(2,1), Im S(2,1), Re S(1,2), Im S(1,2), Re S(2,2), Im S(2,2)

41
MATLAB Output File (Touchstone File Format .s2p)

Equivalent ADS Common Gate S-parameters

42
MATLAB Source Code

43
44
Appendix B: MATLAB Oscillator Parameters Calculation

Flow Chart

Start

Prompt for input parameters: Enter the 4 common gate S-parameters

(Magnitude<Angle) for a certain set of bias conditions & frequency

Perform K and stability checks

Output: Display K, &

Calculate input & output stability stability circle parameters
circle parameters D, C, R D, C, R

Output: Surface plot Gin vs

Calculate max possible Gin & GT, display maximum
corresponding GT possible Gin &
corresponding GT

Calculate input & generator impedances Zin, Zg

Output: Display Gg & Gout,

Calculate corresponding Gg & Gout
surface plot Gout vs Gg

No Output: Display error

K or < 1 message

Yes

Output: Display Zin, Zg & ZT

End

45
Surface Plot of |Gin| Vs |GT| Vs GT (to obtain maximum Gin)

Surface Plot of |Gout| Vs |Gg| & |Gout| Vs |Gg| Vs Gg

46
MATLAB Source Code

47
48
49
50
Appendix C: ADS Oscillator Negative Resistance/Reactance Measurement

ADS Layout

ADS Resistance/ Reactance Plot

51
Appendix D: MESFET Transistor NE72218 Data Sheet

52
53
54
55
56
Appendix E: MESFET Transconductance Measurement Circuit.

57