Philips Semiconductors UM10139

Volume 1 Chapter 1: Introductory information

1.9 Block diagram

TMS(1) TDI(1) XTAL2

TRST(1) TCK(1) TDO(1) XTAL1 RST

LPC2141/42/44/46/48

EMULATION TRACE
TEST/DEBUG PLL0
INTERFACE

MODULE
P0[31:28] and system SYSTEM
P0[25:0] FAST GENERAL clock FUNCTIONS
PURPOSE I/O
ARM7TDMI-S
P1[31:16]
PLL1
AHB BRIDGE
VECTORED
USB
INTERRUPT
ARM7 local bus clock
CONTROLLER
AMBA AHB
(Advanced High-performance Bus)
INTERNAL INTERNAL
SRAM FLASH
CONTROLLER CONTROLLER

8 kB RAM AHB
8/16/32 kB 32/64/128/256/512 kB AHB TO VPB VPB SHARED WITH DECODER
SRAM FLASH BRIDGE DIVIDER USB DMA(3)

VPB (VLSI D+
peripheral bus) D
USB 2.0 FULL-SPEED
EXTERNAL
EINT3 to EINT0 DEVICE CONTROLLER UP_LED
INTERRUPTS
WITH DMA(3) CONNECT
VBUS

4 CAP0 SCL0, SCL1

4 CAP1 CAPTURE/COMPARE
(W/EXTERNAL CLOCK) I2C-BUS SERIAL
8 MAT0 INTERFACES 0 AND 1
TIMER 0/TIMER 1 SDA0, SDA1
8 MAT1

AD0[7:6] and SCK0, SCK1

AD0[4:1] A/D CONVERTERS SPI AND SSP MOSI0, MOSI1
AD1[7:0](2) 0 AND 1(2) SERIAL INTERFACES MISO0, MISO1
SSEL0, SSEL1

TXD0, TXD1
RXD0, RXD1
AOUT(4) D/A CONVERTER UART0/UART1
DSR1(2),CTS1(2),
RTS1(2), DTR1(2)
DCD1(2),RI1(2)
P0[31:28] and
GENERAL RTXC1
P0[25:0] REAL-TIME CLOCK
PURPOSE I/O RTXC2
P1[31:16] VBAT

WATCHDOG
PWM6 to PWM0 PWM0
TIMER

SYSTEM
CONTROL

002aab560

(1) Pins shared with GPIO.

(2) LPCC2144/6/8 only.
(3) USB DMA controller with 8 kB of RAM accessible as general purpose RAM and/or DMA is available in LPC2146/8 only.
(4) LPC2142/4/6/8 only.
Fig 1. LPC2141/2/4/6/8 block diagram

Koninklijke Philips Electronics N.V. 2005. All rights reserved.

User manual Rev. 01 15 August 2005 7