@ ELL 735 - Analog Integrated Circuits - Minor 1 - Indian Institute of Technology Delhi ‘Time: 1 hour; Total marks: 20 Instructions « Read the questions carefully. If the question is wrong state what is wrong and if any circuit parameter or device state is not mentioned, assume as per your convenience. Don’t ask for any clarification, there is nothing to clarifyll * Be concise, write no more than couple of sentences for every question. Ql. (a) Determine the fall. signal voltage gaim}.output impedané® and the maximum output voltage swing for the circuit shown in figure 1 (a) and (b). (5 marks) UY Determine the, ‘of feedbacemployed in the circuit shown in figure 2 (a) and (b) and explain your Sonne . (c) For a simple common source amplifier with an ideal current source load, plot the... variation of small signel voltage gain (Av) with changes in the gate length (L) of the MOSFET. (2 marks) c i. Ve Me ~ ez coe ead oe po tee Hehe Gumnlor aig ade aa Figure 1: amplifier Figure 2: amplifier ant? Q2. (a) Comment on the stability of the circuit shown in figure 3. (2 mark) For the circuit shown in figure 4, raw the Bode plots) Determine the voltage gain , for the amplifier to be stable in unity feedl }) Calenlate the ontput impedance of the surrent mirror cirenitshown in figure 5, (2 marks) > . s feirt f — “ te 4 of each wurrent mirror Figure 3: amplifier Figure 4: amplifier Figure b righ 44; 13. (a) Frame your own questiaw worth 3 marks, justify why it should be graded for 3 rarks and write the answer. Direct example questions from any textbook and multiple choice At2g + questions will not be evaluated. Numerical based questions will not get you good marks.(3 marks) a. (Ge x, Fao te ow eee 0 Gon Oh) So, Yost SoSoz|my jks 2hMino EEL 735 - Analog Integrated Circui Indian Institute of Technology Delhi Time: 1 hour; Total marks: 20 Instructions + Read the questions carefully. If the question is wrong state what is wrong and if any circuit parameter or device state is not mentioned, assume as per your convenience. Don’t ask for any clarification, there is uothing to clarify!!. ‘+ Be concise, write no more than couple of sentences for every question. Qu LS Determine the total output noise for the circuit shown in figure Ha) and (b) re eae aoe : Figure 1: amplifier SScRigure 2: amplifier fa) For the circu shown in igure 4 Adotermine the small signal current flowing in M3 4 anc and M@ and the voltage gain. Explain the role of Rg. (5 marks) oe Determine the linear range of operation of a differential amplifier if (i) the width of the input transistors are doubled (i) the tail current is doubled. (2 marks) fe} Frame your own question worth 3 marks, justify why it should be graded for 3 marks and write the answer. Direct example questions from any textbook and multiple choice ‘Questions will not be evaluated. Numerical based questions will not get you good marks. (3 marks) Figure 3: amplifier Figure 4: amplifierEEL 782 - Analog Integrated Circuits - Minor 1 Indian Institute of Technology Delhi Time: 1 hour; Total marks: 15 Instructions * Read the questions carefully. If the question is wrong state what is wrong and if any circuit parameter or device state is not mentioned, assume as per your convenience. Don't ask for any clarification, there is nothing to clarify!) * Be concise, write no more than couple of sentences for every question. QL. (a) Determine the small signal voltage gain and output impedance of the circuit shown in figure |_and 2 respectively. (2 marks) Is the following statement true, explain ygyr answer. “To minimize the vir 5 ate 9) nate, refatively large gate area is choosen”. (1 AVA M2 * SS Te Y 7 wo i Va MI X ie Figure 1: amplifier Figure 2: amplifier Q2. For the circuit shown in figure 3. (i) Find the relationsh he quieacent current (Iq) and the reference eyetent ~~) I. [Hint: 1:h means transistor \ ings larger than transstay Ma] (1.5 marks) 77 Gi) Find the system transconductance Gm- ged 7 Figure 3: amplifier Figure 4: amplifier ah Q3. (a) Plot the drain-to-source voltage (Vg) vers output current (Igy) and’out pat \Yvoltage (Voyp) versus input voltage (Vyy) feta single MOSFET and aycascode ampliiPr. ‘two plots Explain in brief the differences observed between single MOSFET atid cascade. (1.5 marks) : (Dyin a lab a student is given twe resistor of value R each, two identical NMOS MOS. ao FET andthe required power supply. However for an experiment, the student realizes he w ry x : to wae & a aeat ne place of the circuit au impedaner of 10 times larger than the resistor given and other place of the circuit an impedance 10 times lower than the resistor given, Help the stncen. ‘to achieve the impedances without using any other component than given to him. (1.5 marks) Q4. (a) Determine the output impedance of the circuit shown in figure 4.446 marks) (>) Explain why (i) in a multistage amplifier design, the emphasis is on low noise in NS the first stage and high gain in the subsequent stages (i) A cascode amplifier should always . hhave a cascode load. (1.5 marks) Q8. (a) Frame your own question worth $ marks, justify why it should be graded for 3 marks and write ‘the answer, Sand w Direct example questions from any textbook and multipleychoice: resrions will not be evaluated. Numerical based questions will not get you fark (3 Ynf marks)EEL 782 - Analog Integfated Circuits - Minor 2 | / Indian Institute of Technology Delhi Time: 1 hour; Total marks: 15. Instructions « Read the questions carefully. If the questton is wrong state what is wrong and if any circuit parameter or device state is not mentioned, assume as per your convenience. Don’t ask for any clarification, there is nathing to clarify!! ‘+ Be concise, write no more than couble of sentences for every question. Q1.-(a) Determine the small signal voltage gain and output impedance of the circuit shown in figuré 1 and(2) (4 marks) (b) Is the following statement true, explain your answer. “Cascoding enhances the DC gain of an amplifier without degrading the high frequency performance’. (1 marks) _- - 4 oy) et fibeean aes a sok : J Figute 1: aluplifier Figure: amplifier Q2. (a) For the circuit shown in figure 3, calulate the total output and input referred noise. Further explain in brief the dominating noise sources in the circuit. (1.5 marks) (b) For the circuit shown in figure 4} plot the currents I ang Ig for varying Vg. Given the transistor My is 8x larger than trangistor Mg. (2 marks) (c) For the circuit shown in figure 5, ictermine the output current (igyt), maximum Vout and the node voltages if the Veg and Vijg sat are given to ber0.8 V and. ev respec tively. (1.5 marke) Vos 77 Yas x xe Sows amplifier Figure 4: amplifier Figure 5: amplifier ’ ao” *&* Q3. (a) Between the current mirrors (a) and (b) shown in figure 6, which one will you will N prefer in terms of (i) outgut impedance ey ‘pliance voltage (c) accuracy (d) high frequency os ( ~— qo : a” & < oy Sato Ssey e rel o =v 0) 6 wey 2 I Figure 6: current mirror(Vede are + aa Ae >

Aya > Aygy comment onthe location of the poles. (1 mark) ee Q2. (a) The circuit, shown in figure 2 is a positive feedback enclosed within a negative feedback. Comment about the stability and settling time in comparison to standard negative feedback amplifier. (gm, go and C are the amplifier transconductance, output conductance and load capacitance respectively). (3 marks) (b) Given for an integeator the unity gain frequency (f,) is 1 MHz and the closed loop p is 10. Draw the frequency response of the bey ee if the feedback loop delay is 0.05 ys, Su 3. 1s respectifely. (marks) — We BRE mae de? Se am QA. (a) A atutent wants to design a wid6 cntput Beg emplie ye L implement it and also. explain the consequence of each choice on the amplifier design (2 marks) y (b) For the circuit shown in figure 3, determine the small signal voltage gain. (2 marks) Vv (c) For the transistor shown in figure 4, explain how will the transconductance gm and ee yo teshold voltage Vip, changes for varying input. (2 marks) | Ly Figure 2: amplifier wd —. SF oe id Xd { AM \ . i Za Wye) eet | | ‘ | Figo: amplifier 7 | Fignre amplifier ) QA. Frame sop own question worth 3 marks, justify why it should be graded for B marks, > and write the ect example questious from any textbook ant nultiple choice qs ions will a questions will not get you good m 3atarks)