Course-Plan (DLD, CO 202)

Schoolof...Engineering
DepartmentCSE
Course CodeCO 202
Course NameDigital Logic Design
InstructorSanghamitra Nath

1.Abstract:
This course is designed to provide knowledge and understanding to sophomores in electrical and computer
engineering of Boolean algebra and digital concepts, with concentration on the analysis and design of
combinational and sequential logic networks. Furthermore, it provides a foundation for subsequent study in
computer organization, architecture, and VLSI design.

2. Objective:
1. Demonstrate knowledge of fundamental Boolean principles and manipulation and their application to
digital design.
2. Provide in-depth understanding of combinational and sequential digital/logic circuits, and modular
design techniques.

3. Prerequisites of the course: None

4. Course outline+ suggested reading:

History & overview : Reasons for studying digital logic, people who influenced/contributed to the area of
digital logic.

Switching theory: Number systems and codes, Binary arithmetic, Complements, Boolean and switching
algebra, Representation and manipulation of switching functions, Minimization of switching functions using
algebraic method, K-map(2-,3-,4-,5-variable), Quine McCluskey method.

Combinational logic circuits: Basic logic gates (AND,OR,NOT,NAND,NOR,XOR), Realization of switching

functions with networks of logic gates, 2-level networks: AND-OR,OR-AND,NAND-NAND, NOR-NOR,
Multi-level networks, Physical properties of logic gates (technology, fan-in, fan-out, propagation delay),
Elimination of timing hazards/glitches.

Modular design of combinational circuits: Design of medium scale combinational logic modules -
Multiplexers, demultiplexers, decoders, encoders, comparators, Arithmetic functions (adders, subtracter, carry
look ahead), Multipliers, dividers, Arithmetic and logic units (ALUs), Hierarchical design of combinational
circuits using logic modules.

Memory elements: Unclocked and clocked memory devices (latches, flip flops), Level vs. edge-sensitive, and
master-slave devices, Basic flip flops (SR, D, JK, T), Asynchronous flip flop inputs (preset, clear), Timing
constraints (setup time, hold time) and propagation delays, Data registers (selection, clocking, timing),
Random-access memory (RAM).

Sequential logic circuits : Finite state machines (FSMs), clocked and unclocked, Mealy vs. Moore models of
FSMs, Modelling FSM behaviour: State diagrams and state tables, timing diagrams, algorithmic state machine
charts, Analysis of synchronous and asynchronous circuits, Design of synchronous sequential circuits: State
minimization, state assignment, next state and output equation realization, Sequential functional units: Data
registers, shift registers, counters, sequence detectors, synchronizers, debouncers, controllers.

Laboratory experiments:
(1) Study of TTL gate characteristics.
(2) Synthesis of combinational circuits using NAND, NOR and Multiplexers, Decoder and driver circuits
for 7-segment LED displays, D/A converter and 4-bit ALU realization.
(3) Synthesis of sequential circuits study of various types of flip-flops, realization of counters, shift
registers and sequence generators.

Books:
(i) M.M.Mano : Digital Logic and Computer Design, PHI (EEE)
(ii) Floyd and Jain : Digital Fundamentals, Pearson Education
(iii) R.P.Jain : Modern Digital Electronics, Tata McGraw-Hill Education
(iv) J.F.Wakerly : Digital Design Principles and Practices, Pearson Education, 2001,3/e
5. (a)Time-Plan
Chapter Topic Time(in hours)
1 Introduction to Digital Logic Design 2
Number Systems: Binary, Octal, Hexadecimal and base conversion
Complements, positive and negative numbers 2
Character codes: BCD, Reflected (Gray) codes, 5421/2421 codes, 1
Hamming code
Alphanumeric codes: ASCII, EBCDIC
Binary Arithmetic : Addition and subtraction using rs and (r-1)s 2
complements, multiplication and division
Boolean Algebra: Basic theorem and properties, Boolean functions and 2
truth tables, algebraic manipulation
Minimization of functions using K-map & Quine-McClusky method 4
2 Combinational Logic Circuits: Basic logic gates(AND, OR, NOT, NAND, 1
NOR, EXOR, EXNOR)
Realization of switching functions with networks of logic gates 2
2-level networks: AND-OR, OR-AND, NAND-NAND, NOR-NOR(sop &
pos)
Physical properties of logic gates (technology, fan-in, fan-out, propagation 1
delay etc)
Elimination of timing hazards/glitches 1
3 Modular design of combinational circuits: Implementation of Boolean 2
functions using logic gates: adders, subtractors, code converters
Combinational logic implementation of decoders, demultiplexers, 3
encoders, multiplexers and Boolean function implementation using them.
Hierarchical design of combinational circuits using logic modules. ALUs, 3
PLAs etc
4 Memory Elements: Basic flip flops(S-R, J-K, D, T), flip flop conversion 3
logic
Unclocked and clocked memory devices (latches, flip flops), Level vs 2
Edge sensitive, and Master- Slave devices
Asynchronous flip flop inputs (preset, clear), Timing Constraints (setup 1
time, hold time) and propagation delays
Data Registers (selection, clocking, timing), Random Access Memory 1
(RAM)
5 Sequential Logic Circuits: state diagrams and state tables, timing 3
diagrams, ASM charts
Design of synchronous sequential circuits: state minimization, state 2
assignment, next state and output equation realization
Sequential functional units: data registers, shift registers, counters 4
(synchronous and asynchronous), sequence detectors
TOTAL 42

(b) Evaluation plan :

Test/Quiz (Type A) 3x25 = 75
Assignment/Seminar/Practical (Type B) 25
Mid Term 40
End Term 60
TOTAL : 200

6. Pedagogy :
(i) Lecture and Discussion (ii)Quizzes (iii)Mini projects

2. Expected outcome: Towards the end of the course the student would
(i) be able to design, analyze and synthesize logic circuits(combinational & sequential)
(ii) be able to design a computer, starting from basic gates and elementary Boolean algebra
(iii)be able to build complex digital systems, such as memories, PLA, PALs and programmable
logic devices