Technology of Silicon Reach Through Avalanche Photo Diode (RAPD)

for 1.06 m Laser Radiation

RS Anand*, Asha Awasthi & J.Narain

Department of Electrical Engineering,
Indian Institute of Technology, Kanpur 208016 INDIA

*e-mail: rsanand@iitk.ac.in phone: +91-512-597102, 597832, fax: +91-512-590063

Abstract: Various issues in the technology of silicon reach-through avalanche photodiode (RAPD) are
discussed and methods of solving these have been described in this work. The starting FZ silicon possesses
some grown-in defects and method of dealing with these defects is given. Doping considerations to obtain a
correct doping profile for the high field avalanche multiplication region have been simulated and achieved
by low pressure doped oxide method. The surface contouring method to enhance the absorption of near-IR
radiation is demonstrated. Avalanche gain characteristics of a fabricated RAPD diode are shown.

Introduction: The silicon detectors are widely used for detection of visible and near-IR radiation in many
laser based systems like laser range finders, laser based switches etc. In a laser range finder, the incoming
radiation is quite weak and a device with internal gain is required. The silicon reach-through avalanche
photodiode (RAPD) in fully depleted mode provides such a gain. The gain is obtained by multiplication of
charge carriers in a high field region created by a carefully controlled boron diffusion profile. The
information about the exact nature of the doping profile is a closely guarded secret by the manufacturing
companies. Theoretical and simulation work is needed to find the exact nature of the doping profile.
Regarding the detection of weak signals in near-IR, the energy at 1.06 m wavelength is close to the silicon
band edge and the attenuation coefficient is quite small (13 cm -1). To fully absorb the radiation, a depletion
width of about 800 m is required, causing a very high operating voltage and slow response time. P.P.
Webb1 proposed a surface contouring method to fully absorb the near-IR radiation within a wafer of 120-
130 m thickness, to keep the operating voltage low and obtain a fast response time. In the fabrication of
RAPDs, there are other issues like removal of intrinsic defects from starting material, defect free
lapping/polishing of silicon, increasing the path length of radiation within the device and precise control of
the doping/diffusion process. In the present work, the design of a suitable structure is discussed, numerical
analysis and simulation studies about the nature of the doping profile are described, various processes and
technologies are developed and silicon RAPDs with good gain have been demonstrated.

Design considerations and simulation of RAPD:

In the avalanche photodiode a gain is obtained by the
multiplication of electrons and holes in a region of high
electric field. This multiplication process is exponentially Va
dependent on the electric field and is highly non-linear.
In order to minimize the variation of the multiplication
factor with diode voltage, it is therefore necessary to p+
minimize the variation of electric field intensity in the n+ p
multiplication region with the diode voltage. In other
words, a structure must be chosen for which the field in
the multiplication region changes very little over the 125 m
operating range in spite of the large changes in the diode Fig.1
voltage. A n+-p--p+ Reach Through Avalanche Photo-
diode2 (RAPD) as shown in Fig.1 meets these criteria. In this n +-p--p+ diode, the high electric field region
is at the n+-p junction. The magnitude of the electric field in the p-region is given by Gausss law2-
q Na
E .
s
From the above expression, to obtain the electrical breakdown (3x10 5 V/cm) the number of boron atoms
needed in the p-region is Na = 2x1012 cm-2. In addition, the multiplication phenomena depend not only on
the total number of boron atoms but also upon the distribution of boron atoms within the p-region. The
distribution of boron atoms is controlled by a control of diffusion temperature, time and ambient.
Numerical analysis was done to understand the role of the doping profile on the multiplication/gain
mechanism. In our analysis we have considered a gaussian doping profile, determined by the surface
concentration and junction depth. The results of our analysis are summarized in fig 2 and 3. In Fig.2, at a
constant surface concentration 4x1015 cm-3 and the junction depth changing from 15 to 30 m, we see that
the multiplication gain increases as the junction depth is increased. It seems necessary, to obtain a
reasonable multiplication, a diffusion depth of 25 30 m is required. In Fig.3, we see the role of surface
concentration, while keeping the p-junction depth fixed. It is seen that a lower surface concentration gives
rise to a high gain. It has to be kept in view that the total number of boron atoms must be more than N a =
2x1012 cm-2 for a maximum electric field of 3x105 V/cm.

Junction depth 25 m

Fig.3
Fig.2
Device Technology: In the fabrication of this device, the starting material is about 10,000 -cm -type
FZ silicon that also constitutes the -region of the device. During the technology development of these
devices, we realized, that besides developing a process sequence for making this device, we also need a
proper pre-treatment procedure to deal with the grown-in defects present in FZ silicon. Our device
fabrication section is divided in two parts, one dealing with the pre-treatment of the grown-in defects of the
FZ silicon and other with the device fabrication details.

Pre-treatment of FZ silicon: During the growth of single crystal FZ silicon, the main consideration for
the manufacturer is the target doping, least amount of impurities, freedom from dislocations and good
growth rate. Single crystals grown by either CZ or FZ method invariably contain some impurities and also
grown-indefects3-5. In modern FZ crystal pulling system, the seed and the pedestal are rotated around their
vertical axis for reducing the thermal asymmetries in the system. This rotation reduces the thermal
asymmetries, but asymmetries are not completely eliminated. Due to the thermal asymmetries and the
rotary motion at crystal melt interface, point defects tend to get incorporated in the growing crystal. On
cooling of the crystal, these point defects agglomerate into defects known as A and B-defects in a striated
pattern. A-defects are larger in size and generally tend to occur in regions removed from the outer periphery
of the crystal. The B-defects, which are considered more fundamental in nature, occur close to the
periphery of the crystal as well as throughout the rest of the crystal. At higher growth rate, another type of
defect called D-defect is formed6. The D-defects, unlike A and B-defects, are not formed in a striated
pattern. These defects are uniformly distributed across the crystal. The D-defects are agglomerates or
sponge of vacancies. The D-defects do not consist of dislocation loops and there are probably no dangling
bonds in these defects.

2
 In high temperature processing of silicon wafer with D-defects, a drastic reduction in lifetime has
been observed. It has also been observed, that a D-type defect, which was initially not decorated with
metallic impurity, becomes decorated with metallic impurity after high temperature processing. To avoid
the degradation of wafer by D-defects, it is necessary to eliminate it from the wafer. Since the D-defects are
supposed to be vacancy agglomerate, effort is to inject excess silicon interstitial. A very strong injection of
interstitial in silicon wafer can be realized by POCl 3 diffusion. A preprocessing treatment of POCl3 at
1150oC for 3 hrs has been found adequate to remove D-defects. Wafers with POCl 3 treatment did not show
any degradation behavior during further high temperature processing. As the concentration of D-defects is a
function of the various parameters during the crystal growth, the POCl 3 preprocessing temperature and time
may need to be adjusted for each batch of wafer.
The A and B-defects consist of features that involve excess interstitial. Also during the removal of
D defect, excess interstitial are injected by POCl 3 diffusion. This POCl3 diffusion is likely to make A and B
defects further grow in size. To remove the A and B-defects, we have to incorporate a pre-treatment that
removes the excess interstitial and also the metallic impurity, decorating these defects. This has been well
known, that HCl + O2, TCA + O2 and CCl4 + O2 treatments at high temperature (1000 1200oC) inject
vacancies (or removes interstitial) by creating a source of vacancies at the silicon surface 7-9. In our process,
we have utilized the TCA + O2 treatment to create a source of vacancies. We found, that by a suitable
optimization of temperature, time and TCA concentration the A and B defects can be successfully
eliminated. A typical process of a TCA treatment is, time 6 hrs, temperature 1170 oC, oxygen 1-1.2 LPM,
TCA (N2) 50 cc/min.

Device Fabrication: In the fabrication of this device, there were several processes involved, some
standard silicon processes and some new processes required just for this device. In the following we discuss
the new processes developed specifically for this device.

P-region diffusion: To meet the requirement of precision doping in

the p-region, the boron deposition was done using Low-pressure
chemical vapor deposition (LP-CVD). In this method, the vapors of
Tetra Ethyl Ortho Silicate (TEOS) were transported to the reactor
from a bubbler by nitrogen gas. For boron doping, vapors of Tri
Propyl Borate (TPB) were also transported to the reactor. At 660C,
the vapors of TEOS and TPB decomposed forming B 2O3 doped SiO2
layer on the silicon wafer. The transfer of boron atoms from the
boron doped oxide layer to the silicon wafer is done by a
deposition/soak-in in N2 at 900-950oC for 10-20 min. We obtained
deposition of about 2x1012 boron atoms/cm2 and sheet resistivity of
3000-5000 /sq. After a 1200oC, 48 hr drive-in in TCA + O2 ambient
a 22 m junction depth was obtained. The doping profile obtained by
the spreading resistance measurement of a completed device is shown
in Fig.4. Fig.4 Doping Profile
N+ Diffusion: After P-diffusion the next is phosphorous diffusion for N+ region. In most of the references2,
10
, the N+ diffusion has been just described as a N+ diffusion. In our device, we did the N+ diffusion as seen
in Fig. 4, surface concentration 1x1020 cm-3, junction depth 4.5 m and sheet resistivity 4.7 /sq. However,
a doping profile with small surface concentration (5x10 16) and longer junction depth would give wider high
field region and consequently, multiplication gain could be increased.

Dimpled Surface: About 800 m depletion width is required to completely absorb the radiation at 1.06 m
wavelength. This large depletion width besides increasing the operating voltage also increases the response
time. To meet the challenge of conflicting requirement of high operating voltage, response time and
complete absorption of radiation a surface contouring technique has been proposed by Webb 1, Fig. 5. In this
technique the effective path length of radiation is significantly increased with the help of total internal
reflections. The appropriate mask and isotropic etching process has been developed using HNO 3:HF:Acetic
Acid in 5:3:3 proportion for etching dimples to a 25 m depth. A microscope photograph of a wafer with
dimples is shown in Fig. 6.

3
Characteristics: With analysis, understanding and development of the various processes of the avalanche
photodiode, a large number of wafers were processed. The uniformity in the boron doping posed quite a
serious yield problem. In these devices the final drive-in of the N + diffusion is adjusted in a manner so that
the remaining number of the boron atoms is about 2x10 12 cm-2. If the boron doping across the sample is
varying, then this condition will not be satisfied across the wafer. At a particular N + diffusion, the situation
can be any of the three types, as shown in Fig.7, that the N + diffusion is inadequate (a), the diffusion is
correct (b) or the diffusion is more than the required (c). The devices achieving the correct avalanche gain
have been fabricated; Fig. 8, the device breakdown is 225 250 V and leakage current in the order of a few
nA.

Fig.7 Gain vs voltage; under diffused (a), Fig.8 Gain vs voltage of the
correctly diffused (b) and over diffused (c) fabricated device.

Conclusion: The silicon RAPD structure suitable for 1.06 m wavelength has been developed. The
process for pretreatment of wafer for obtaining low leakage and high breakdown has been developed. The
p-type doping profile critical for obtaining the multiplication gain has been achieved. The technique has
been developed to enhance responsivity and fast response simultaneously. The devices with significant
gain have been demonstrated.
Acknowledgement: The financial support for this work was provided by DRDO. We also acknowledge
the technical support given by Dr AK Gupta, Joint Director & other scientists of IRDE, Dehra Dun during
this work.
References:

[1] P.P. Webb et.al., CLEOS/ICF Conference, San Diego Feb 26-28, (1980).
[2] H.W.Ruegg, IEEE Trans ED-14, 239-251(1967).
[3] J.Chikawa et. al., Solid State Technology, January, 65-70(1980).
[4] A.J.R. De Kock, Philips Res Re. Suppl; 1, 1-105(1973).
[5] R.A. Levy, Microelectronic Materials and Processes, Kluwer, 679-773(1989).
[6] HJ Schulze et al, Solid State Electronics, 42, (1998) pg 2187-2197.
[7] N.A. Sobolev et al, Proceedings of 2nd GADEST87, 179-184 (1987).
[8] N.A. Sobolev et.al Solid State Phenomenon , 6 &7, 181-186 (1989).
[9] K.Nauka et.al. JAP, 60(2), 615-21 (1986).
[10] P.P. Web et. al., RCA Rev 35, 234-278 (1974).