VAAGEDEVI ENGINEERING COLLEGE

Bollikunta(v), Warangal-506005

Date: 15-09-2017
Department of ECE
All the Final Year B.Tech students are informed that the following format/rules should be
followed for the preparation of project report.
I) The project Report should contain 50-60 pages including (For mini project 25-40
pages)
1) Project Title page
2) Certificate from college
3) Certificate from company (optional)
4) Acknowledgement
5) Declaration
6) Abstract
7) Contents
8) List of Figures
9) List of Tables
10) List of Acronyms
Note : All the above papers are numbered in roman letters except title page and certificate.
11) Bibliography/References (At the End)
The above order should be maintained in the project report.
II) The Font style-Times New Roman
Font size-16-Chapter Name Heading---Bold
14-SubHeading---Bold
12-SubsubHeading---Bold
12-Text
The papers size A4 Executive Bond
III) Paper, Typing and Format:-
Bond paper, 12 font size, Times of New Roman.
Layout should provide 1.5 inches(1 inch for mini project) on left side, 1 inch on top and bottom,
1 inch on the right side.
1. Fresh paragraph should commence after 1 tab space and 1.5 spacing shall be provided.
2. Page number shall be indicated at the bottom right of each page.(Ex Page No 1)
3. The title of the project must be placed at top left corner of each page.( Ex.Power
Reduction)
IV) All the reports should be Hard core binded
1. Binding: - Thesis shall be properly bounded, using soft cover of Black color for B.Tech.
The bound front cover should indicate in Gold Embossed letter.(Spiral Binding for mini
project)
2. On side fold of the report title of the project and batch should be included.
3. With the above mentioned norms two copies of project reports should be submitted.
1) Department copy along with DVD containing the total project Documentation,
source code and project ppt 2) Internal guide copy.
Personal Project reports should be Depending on the number of candidates in the team

V) Arrangement of paragraph in a chapter:-

Title in the chapter, Ex: 2.1, 2.2 (Bold & Uppercase, Times new roman, Font size 16)

Sub-topic titles 2.1.2, 2.1.3(Bold & lower Case, Times new roman, Font size 14)

VI) Figures and Tables:-

Figures and Tables in the chapter may be serially numbered as Fig 1.1, Fig1.2..........
and Table 1.1, Table 1.2........ And should be in the middle of the paper.
Graphs:- Graphs should be clearly captioned and numbered.

(xxxxxxxxxxxxxTITLExxxxxxxxxxxxxxxx)
 A Project report submitted to JNTUH
In partial fulfillment of the requirements
For the award of the degree of

BACHELOR OF TECHNOLOGY
In

ELECTRONICS & COMMUNICATION ENGINEERING

Submitted By

Name1 14UK1A04XX

Name2 14UK1A04XX

Name3 14UK1A04XX

Name4 14UK1A04XX

Under the esteemed guidance of

Guide Name
Assistant Professor

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

VAAGDEVI ENGINEERING COLLEGE
(Affiliated to JNTU HYDERABAD)
2014-2018

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

 VAAGDEVI ENGINEERING COLLEGE
WARANGAL 506 005

CERTIFICATE

This is to certify that the project report entitled TITLE OF THE PROJECT is being
submitted by Name1, Name2, Name3, Name4 in partial fulfillment of the requirements for the award of
the degree of Bachelor of Technology in Electronics & Communication Engineering to Jawaharlal
Nehru Technological University Hyderabad during the academic year 2017-2018, is a record of
bonafide work carried out by them under my guidance and supervision. The results embodied in this
project report have not been submitted to any other university or the institute for the award of any degree.

Guide Name Asst.Prof or Assoc.Prof M. SANJAY

Head of ECE

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

 VAAGDEVI ENGINEERING COLLEGE
WARANGAL 506 005

CERTIFICATE

This is to certify that the project report entitled TITLE OF THE PROJECT is being
submitted by (individual Name) bearing HT.No 14UK1A04xx in partial fulfillment of the requirements
for the award of the degree of Bachelor of Technology in Electronics & Communication Engineering
to Jawaharlal Nehru Technological University Hyderabad during the academic year 2017-2018, is a
record of bonafide work carried out by them under my guidance and supervision. The results embodied in
this project report have not been submitted to any other university or the institute for the award of any
degree.

Guide Name M. SANJAY

Assistant Professor Head of ECE
 ACKNOWLEDGEMENT
We wish to take this opportunity to express our sincere gratitude and deep sense of
respect to our beloved Dr. P. Prasad Rao, Principal, Vaagdevi Engineering College for making
us available all the required assistance and for his support and inspiration to carry out this project
in the institute.

We extend our heartfelt thanks to Mr. M. Sanjay, Head, department of ECE, Vaagdevi
Engineering College for providing us necessary infrastructure and thereby giving us freedom to
carry out the project.

We express heartfelt thanks to the guide, Mr./Ms. Guide Name, Assistant/ Associate
Professor, Department of ECE for his/her constant support and giving necessary guidance for
completion of this project.

Finally, we express our sincere thanks and gratitude to my family members, friends for
their encouragement and outpouring their knowledge and experiencing throughout thesis.

Name1 (Roll number)

Name2 (Roll number)

Name3 (Roll number)

Name4 (Roll number)

 DECLARATION

We declare that the project entitled PROJECT TITLE submitted in partial fulfillment of

the requirements for the award of the degree of Bachelor of Technology in Electronics &

Communication Engineering to Jawaharlal Nehru Technological University Hyderabad is the work

carried out by us.

Name1 (Roll number)

Name2 (Roll number)

Name3 (Roll number)

Name4 (Roll number)

 CONTENTS

Acknowledgement ii

Abstract iii

List of contents v

List of Figures ix

List of Tables xi

List of Abbreviations xii

CHAPTER 1: INTRODUCTION 1-8

1.1 xxxxxxxxxxxxxxx 1

1.2 xxxxxxxxxxxxxxx 1

1.2.1 xxxxxxxxxx 8

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CHAPTER 6: CONCLUSIONS AND FUTURE SCOPE 77-80

6.1 Conclusions 77

6.2 Future scope 80

REFERENCES

Appendix-A

Appendix-B
NOTE:

1. The first chapter shall be introduction which includes objective of the project, literature
survey and thesis outline.
2. Second chapter includes theoretical background, existing and proposed methods.
3. Third chapter is implementation of the proposed method.
4. Fourth chapter deals with software and hardware description of the project.
5. Fifth chapter deals with the results and, each and every output waveform must be
explained in few sentences ,comparison table if any.
6. Sixth chapter deals with conclusion and future scope.
7. Conclusion and future scope must be the last chapter.

LIST OF FIGURES
Fig 1.1: x x x x x x x x x x x x 2

Fig 1.2: x x x x x x x x x 4

Fig 1.3: x x x x x x x x x x x x x x x x 5

Fig 1.4: x x x x x x x x x x x x 7

Fig 2.1: x x x x x x x x x x x x x x x x x x x x x x x x x x x 11
Fig 2.2: x x x x x x x x x x x x x x x x x x x x x x x x x x x 12
Fig 2.3: x x x x x x x x x x x x x x x x x x x x x x x 13
Fig 3.1: x x x x x x x x x x x x x x x x x x x 13
Fig 3.2: x x x x x x x x x x x x x x x x x x x x x x x x 15
Fig 3.3: x x x x x x x x x x x x x x x x x x x x x x 17
Fig 4.1: x x x x x x x x x x x x x x x x x x x x x x x x x x x 19
Fig 4.2: x x x x x x x x x x x x x x x x x x x x x x x x x x x 19
Fig 4.3: x x x x x x x x x x x x x x x x x x x x x x x x x x x 20

NOTE: The name of the figure should be mentioned below the figure with description.

LIST OF TABLES
Table 3.1: x x x x x x x x x x x x x x x x x x x x x x x x x x x 22
Table 3.2: x x x x x x x x x x x x x x x x x x x x x x x x x x x 24
Table 4.1: x x x x x x x x x x x x x x x x x x x x x x x x x 30
Table 4.2: x x x x x x x x x x x x x x x x x x x x x x x x x x x 34
Table 4.3 x x x x x x x x x x x x x x 34
Table 5.1: x x x x x x x x x x x x x x 51
Table 5.2: x x x x x x x x x x x x x x 52

NOTE: The name of the table should be mentioned above the table with description.

ABBREVIATIONS (Example)
APC : Anti Symmetrical product code
OMS : Odd multiple Storage
LUT : Look Up Table
DSP : Digital signal Processing
VLSI : Very Large Scale Integration
RTL : Register Transfer Level
FPGA : Field Programmable Gate Array
ISE : Integrated Software Environment
XST : Xilinx Synthesis Technology
CSD : Canonical Signed Digit