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Boolean Algebra: - The Mathematical Foundation of Digital
Boolean Algebra: - The Mathematical Foundation of Digital
Boolean Algebra: - The Mathematical Foundation of Digital
x y xy x+y x x
0 0 0 0 0 1
0 1 0 1 1 0
1 0 0 1
1 1 1 1
Theorems
One can prove many interesting theorems
x+x=x
xx=x
x+1=1
x0=0
We only need the axioms to prove them
Theorems
There are some useful theorems
DeMorgans theorem
Absorption theorem
There is also the duality principle
DeMorgans Theorem
(x+y) = x y
(xy) = x +y
Using DeMorgan
(A+B+C)=A(B+C)=ABC
(A+BC)=A(BC)=A(B+C)
Absorption Theorem
x+xy = x
x(x+y)=x
Proofs
Proofs can be done symbolically
Can also be done by exhaustive enumeration
This is because we have small number of cases
(usually)
An Example
xyz F1
000 0
001 1
010 0
011 0
100 1
101 1
110 1
111 1
xyz F1
000 0
001 1
010 0
011 0
100 1
101 1
110 1
111 1
A Trickier Example
xyz F2
000 0
001 1
010 0
011 1
100 1
101 1
110 0
111 0
A Trickier Example
F2 = xyz + xyz +xy
But:
xyz+xyz+xy=xz(y+y)+xy=xz+xy
More Examples
x(x+y)=xx+xy=0+xy=xy
x+xy=(x+x)(x+y)=1(x+y)=x+y
(x+y)(x+y)=xx+xy+yx+yy=x+x(y+y)=x
Systematic Conversion
It is easy to go from a boolean expression to
a gate schematic
It is easy to extract the truth table from a
schematic or a boolean expression
How about starting from a truth table?
For Example
xyz F
000 0
001 1 x y z
010 0
011 0
100 1 x y z
101 1 x y z
110 1 x y z
111 1 xyz
For Example
Using Brute Force
F = xyz + xyz + xyz + xyz + xyz
And simplifying
F = xyz + xy(z+z) + xy(z+z)
And simplifying some more
F = xyz + x(y+y)=xyz+x=yz+x
Give them a Name
xyz F minterm
000 0 m0
001 1 x y z m1
010 0 m2
011 0 m3
100 1 x y z m4
101 1 x y z m5
110 1 x y z m6
111 1 xyz m7
Use the Names
F = m1 + m4 + m5 + m6 + m7
F = SIGMA(1,4,5,6,7)
F= SIGMA(0,2,3)
This is the one of the two canonical forms
Usually canonical forms are not optimal
Duality
This is a SumOfProducts implementation
We have duality, dont we?
There should be a ProductOfSums
implementation too, shouldnt there?
The SumOfProducts and the ProductOfSums
are called standard forms
DeMorgan to the Rescue
F = SIGMA(0,2,3)=xyz+xyz+xyz
F = (x+y+z)(x+y+z)(x+y+z)
These Factors are called Terms
ABC F Maxterms
000 0 x+y +x M0
001 1 x y z M1
010 0 x+y +z M2
011 0 x+y +z M3
100 1 x y z M4
101 1 x y z M5
110 1 x y z M6
111 1 xyz M7
So we can write it....
F = Prod(0,2,3)
F = (x+y+z)(x+y+z)(x+y+z)
F = M0 M2 M3
How many gates are there?
We know a few of them
There should be only a finite number of
gates with 2 inputs
To find out we have to enumerate all the
truth tables
Shall We Start?
xy F0 F4 F8 F12
00 0000 0000 1111 1111
01 0000 1111 0000 1111
10 0011 0011 0011 0011
11 0101 0101 0101 0101
There are many
There are 16 gates with 2 inputs
There are 256 gates with 3 inputs
Most of the 16 possible gates with 2 inputs
are useful as components of bigger systems
Many have counterparts with 3 and more
input gates
Extending from 2 to 3 inputs
It is easy to extend the 2 input gates to 3
inputs if they are commutative and
associative
AND and OR are both commutative
associative
NAND and NOR are not associative
Extending NAND-NOR
Confusing to mathematicians
The solution is obvious to everybody else
Just extend the AND or OR part of the gate
Cascading NANDs-NORs
The result is kind of unexpected
Gives a hint about a neat trick
We will come back to this shortly.
Extending XOR-XNOR
That was easy!
In fact XOR is modulo-2 addition
and with some extra circuitry it is also regular
addition.
Positive and Negative Logic
Negative logic is not an attribute of someone
that disagrees with us!
The assignment of zero and one to the higher
or lower voltage is a matter of convention.
The duality principle assures us.
We could have...
We could have used H and L instead of true
and false.
But then we would not have used
mathematical logic
And nobody would have taken us seriously
And there would be no web!
Levels of Integration
The ICs are classified according to their
integration (number of components on a
single chip)
This has its roots in history
These are:
SSI: Small Scale Integration
MSI: Medium Scale Integration
LSI: Large Scale Integration
VLSI: Very Large Scale Integration
The idea was....
The idea was that at some point new scales
of integration would be introduced:
ULSI (Ultra Large Scale Integration)
WSI (Wafer Scale Integration; bound to fail, the
wafers now are more like french crepes)
So we still have VLSI
Digital Logic Families
TTL (Transistor-Transistor Logic)
ECL (Emitter-Coupled Logic)
MOS (Metal-Oxide-Semiconductor)
CMOS (Complementary-MOS)