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ESE 2018 : Prelims Exam E&T


CLASSROOM TEST SERIES ENGINEERING
Answer Key & Solutions of Section A : Control Systems + Microprocessors and Microcontroller
Section B : Network Theory - 1
Test No. 3 Section C : Digital Circuits - 1

1. (c) 16. (d) 31. (d) 46. (a) 61. (a)

2. (b) 17. (d) 32. (c) 47. (d) 62. (a)

3. (d) 18. (b) 33. (c) 48. (a) 63. (a)

4. (c) 19. (c) 34. (c) 49. (c) 64. (b)

5. (c) 20. (b) 35. (b) 50. (c) 65. (c)

6. (c) 21. (d) 36. (d) 51. (a) 66. (b)

7. (c) 22. (b) 37. (a) 52. (c) 67. (d)

8. (b) 23. (a) 38. (b) 53. (b) 68. (b)

9. (b) 24. (c) 39. (b) 54. (b) 69. (d)

10. (c) 25. (c) 40. (b) 55. (a) 70. (b)

11. (c) 26. (c) 41. (d) 56. (b) 71. (b)

12. (d) 27. (b) 42. (a) 57. (b) 72. (c)

13. (d) 28. (d) 43. (b) 58. (d) 73. (c)

14. (d) 29. (c) 44. (d) 59. (d) 74. (b)

15. (a) 30. (b) 45. (a) 60. (c) 75. (a)
E & T Engineering | Test 3 13

Section A : Control Systems + Microprocessors and Microcontroller

1. (c)
For the given system, characteristic equation is
16
1 + s ( s + 1.4) + 16sT = 0
d

or, s2 + 1.4s + 16s Td + 16 = 0


or, s2 + (1.4 + 16Td) s + 16 = 0
Comparing with s2 + 2 ns + n2 = 0, we have:

n = 16 rad/s = 4 rad/sec
and 2 n = (1.4 + 16Td)
or, 2 0.7 4 = 1.4 + 16Td ( = 0.7, given)
or, 5.6 1.4 = 16Td
4.2
or, Td = = 0.2625
16
2. (b)
Transfer function is given by,
Y (s)
1
U(s) = C[sI A] B
1 0 2
Given, A = ,B = 1
1 2
and C = [3 2]
s + 1 0
Now, (sI A) =
1 s + 2
1 s + 2 0
(sI A)1 =
(s + 1)(s + 2) 1 s + 1

Transfer function = C[sI A]1B


1 s + 2 0
C[sI A]1 = 3 2
( s + 1)( s + 2) 1 s + 1
1
So, C[sI A]1 = 3( s + 2) + 2 2( s + 1)
( s + 1)( s + 2)
1 2
C[sI A]1 B = (3s + 8) 2s + 2

(s + 1)(s + 2) 1
1
=
(s + 1)(s + 2)
[ 2(3s + 8) + 2s + 2 ]
1 8s + 18 2(4s + 9)
=
(s + 1)(s + 2)
[ 6s + 16 + 2s + 2 ] =
(s + 1)(s + 2)
= 2
s + 3s + 2

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14 ESE 2018 Prelims Exam Classroom Test Series

3. (d)
PD controller increases the value of . As a result, peak overshoot will decrease
PD controller does not change ess
P, I, PI, D controllers change ess

4. (c)
C ( s) 16 n2
Given, = 2 = 2
R(s ) s + 4.8s + 16 s + 2 n s + n2
Here, n = 4 rad/s, 2n = 4.8
4.8
or, = = 0.6
24
n n
Peak time, tp = =
d 1 2
n
For overshoots, n = 1, 3, 5, ...
For undershoots, n = 2, 6, 8, ...
For 3rd peak, n=5 (3rd overshoot is the third peak)
5 5 25
So, tp = = = = 1.56
4 1 0.6 2 4 4 /5 16

5. (c)
Since, the system is of minimum phase system, it has no poles or zeros in the right hand side of
s-plane.
There are four corner frequencies for the transfer function G(s).
(i) Two poles at 1 = 5 rad/sec as slope changes by 40 dB/dec.
(ii) Two zeros at 2 = 20 rad/sec as slope changes by +40 dB/dec.
(iii)Two poles at 3 = 40 rad/sec as slope changes by 40 dB/dec.
(iv)A pole at 4 = 100 rad/sec as slope changes here by 20 dB/dec.
Therefore open loop transfer function in time constant form;
2
s
K1 +
20
G(s) = 2 2
s s s
1 + 1 + 1 +
5 40 100
Initial slope = 0 dB
then, 20 log K = 40 dB
or K = 100
Now open loop transfer function,
100 25 402 100(s + 20)2 106 (s + 20)2
G(s) = 2 2 2 =
20 ( s + 5) (s + 40) (s + 100) ( s + 5)2 ( s + 40)2 ( s + 100)

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E & T Engineering | Test 3 15

6. (c)
The characteristic equation of the given closed loop system is
16
1+ = 0 or s2 + 2.4s + 16 = 0
s (s + 2.4)

Comparing above equation with s 2 + 2 ns + n2 = 0 , we have


n = 4 rad/s
and 2 n = 2.4
or n = 1.2
Thus, settling time for 2% tolerance band is
4
t s = 4T =
n
4
or, ts = = 3.33 sec.
1.2

7. (c)
Using Routh-Hurwitz criterion

s4 1 13 K
s3 4 36 0
2
s 4 K 0
144 4 K
s1 0 0
4
s0 K 0 0

For oscillation to occur


144 4 K
= 0
4
or K = 36
Auxiliary equation, 4s2 + 36 = 0
or, s = 3j
n = 3 rad/sec.

8. (b)
Response due to unit step input,
1 1
c(t) = tu(t ) u(t ) + e 2 t u(t )
4 8
1 1 1
C(s) = 2
+
s 4s 8( s + 2)
1 1 1
2
+
C ( s) s 4s 8(s + 2)
Impulse response = =
1 /s 1 /s

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16 ESE 2018 Prelims Exam Classroom Test Series

1 1 s 1 1 1 2
= + = + 1
s 4 8( s + 2) s 4 8 s + 2
1 1 1
Impulse response = s 8 4(s + 2)
Taking Laplace inverse, we get,
1 1 2 t
Impulse response = (t ) + u(t ) e u(t )
8 4

9. (b)
The state equations from the given signal flow graph can be written as:
x 1 = x2 ... (i)
and x 2 = 4x1 5x2 + 3u(t) ... (ii)
In matrix form,
x 1 0 1 x1 0
x = 4 5 x + 3 u(t )
2 2
Also, output is
y(t) = 8x1 + 3x2 + 6u(t) ... (iii)
In matrix form
x1
y(t) = 8 3 + 6u(t )
x2
10. (c)
The introduction of a time delay element decreases both phase margin and gain margin.

11. (c)
On combining the blocks G2 and G3 which are in parallel, the given block diagram will be reduced
as shown below.

R(s ) + G1(G2 G3) C(s )


C ( s) G1 (G2 G3 )
Transfer function, =
R(s ) 1 + G1 H (G2 G3 )
G1 G2 G1 G3
=
1 + G1 G2 H G1 G3 H

12. (d)
4 (s 1)
The open loop transfer function G(s)H(s) =
2
(s + 2s + 2) ( s + 1)
No poles at RHS of s-plane thus stable
G( s )
The closed loop transfer function T (s ) =
1 + G( s ) H ( s)

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E & T Engineering | Test 3 17

4
2
(s + 2s + 2) 4( s + 1)
T (s) = =
4( s 1) 2
(s + 1) (s + 2s + 2) + 4(s 1)
1+
(s + 1)(s 2 + 2s + 2)
4( s + 1)
=
s + 2 s + 2 s + s 2 + 2 s + 2 + 4s 4
3 2

4( s + 1)
T (s) =
s 3 + 3s 2 + 8s 2
Using Rouths tabular form
s3 1 8
2
s 3 2
24 + 2
s1 0
3
s0 2
As the number of sign changes in the first column of Rouths form is 1, the closed loop system is
unstable.

13. (d)
Characteristic equation is
3K
1+ = 0 or s2 + 6s + 3K = 0
s ( s + 6)

Here, n = 3K rad/s
and 2 n = 6
3 3
or, = =
n 3K

3
= 0.866 =
2

3 3
=
2 3K
or, K =2K=4

14. (d)
Steady state error for unit step input is given by
1
ess =
1 + Kp

where Kp = lim G( s )
s0

ess = 0.2 [for unit step]

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18 ESE 2018 Prelims Exam Classroom Test Series

1
0.2 =
1 + Kp
Kp = 4
lim G(s ) = 4
s0
Now for modified system
1
G( s)
G (s) =
s
Steady state error for unit ramp input is given by
1
ess =
Kv
where Kv = lim sG(s)
s0

1
= lim s G(s) = 4
s0 s
1
ess = = 0.25
4

15. (a)

K
G(s) =
(s + 2) (0.3s + 3)
Since input is unit step, therefore steady state error is
1
ess = lim = 0.2 (Given)
s 0 1 + K p

Here, Kp = lim [G(s)]


s0

K K
= lim =
s0 ( s + 2)(0.3s + 3) 6

1
0.2 =
1 + K /6
K
or, 1+ =5
6
or, K = 24

16. (d)
Lag compensator shifts the gain cross over frequency point to a lower value hence improvement
in steady state is noted. Whereas in lag-lead compensator, both compensators are connected in
cascade.

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E & T Engineering | Test 3 19

17. (d)
From the polar plot, we can observe;
1
Gain margin = = 1.5
0.667
Phase margin = 90 20 = 70

18. (b)
Resonant frequency
2
r = n 1 2
1
= 2 1 2(0.5)2 = 2 = 1 rad/sec
2

19. (c)

K (s + 2)
Given, G(s)H(s) =
s( s 2 + 4)

Here, P = 3, Z = 1, P Z = 2
No. of branches of RL terminating at zero = 1.
No. of branches of RL terminating at infinity = 2.

j
j2

45 90

2 RL

90
j2

Here, two branches of RL has to terminate at infinity.


Thus, the two imaginary poles will terminate at infinity.
Hence, we need to find angle of departure for which we join all poles and zeros with the imaginary
pole at s = j2.
Now, = (z P)
Here, z = 45
and P = 90 + 90 = 180
Thus, = 45 180 = 135
Angle of departure is,
D = 180 +
= 180 135 = 45

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20 ESE 2018 Prelims Exam Classroom Test Series

20. (b)
The closed loop transfer function is given by
C ( s) aG( s )
R(s ) = M(s) = 1 + abG(s )
a M ( s )
Sensitivity w.r. to a: SaM ( s ) =
M ( s ) a
a [1 + abG(s )]
Now, = G(s )
M( s )
M ( s ) aG( s)
and = a + abG s
a 1 ( )
G(s )[1 + abG(s )] aG(s )[bG(s )]
=
[1 + abG( s)]2
G( s )
=
[1 + abG( s)]2

1 + abG( s) G( s)
SaM ( s ) = 2
G ( s ) [1 + abG(s )]
1
= + ab G s
1 ( )

21. (d)
Taking Laplace transform on both sides of the given differential equation, we get
(s2 + 3s + 3) Y(s) = 6 X(s)
Y (s) 6
= 2
X(s) (s + 3s + 3)
Characteristic equation is
s2 + 3s + 3 = 0
Also, s2 + 2ns + n2 = 0
Here, n = 3 rad/sec
and 2 n = 3
3 3
or, = =
= 0.866
2 3 2
Since, < 1, therefore the solution of differential equation is underdamped.

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E & T Engineering | Test 3 21

22. (b)
Pole-zero plot at K = 0
j

j1


2 1 0

j 1

all the open loop poles are symmetric about s = 1.


so, only one breakaway point exists, that too at centroid.
centroid, BA point exists at s = 1
so, S1 and S2 are correct.

23. (a)
1 x = x
So, to complement the higher significant nibble of the accumulator, we can use XRI F0H.

24. (c)
MVI B, 10H 2 Byte instruction (1000H, 1001H)
DCR B 1 Byte instruction (1002H)
JNZ 1000H 3 Byte instruction (1003H, 1004H, 1005H)
RET 1 Byte instruction (1006H)
So, the machine code of RET will be stored at 1006H.

25. (c)
STAX Rp, LDAX Rp instructions should be used only with BC and DE register pairs.
In option (c), LDAX is used with HL pair, which is invalid.

26. (c)
MVI H, 5DH ; H = 5DH
MVI L, 6BH ; L = 6BH
MOV A, H ; A = 5DH
ADD L ; A = 0101 1101
L = 0110 1011
1111 111
A = 1100 1000 AC = 1 and CY = 0

27. (b)
TRAP Both Level and Edge - sensitive
RST 7.5 Edge - sensitive
RST 6.5 Level - sensitive
RST 5.5 Level - sensitive

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22 ESE 2018 Prelims Exam Classroom Test Series

28. (d)
XTHL is used to exchange the contents of HL pair with Top of stack, it needs 16 T-states.

29. (c)
ORI 00H does not alter the content of accumulator.
After execution of ORA, ORI instructions, CY and AC flags will be cleared automatically.

30. (b)
The maximum capacity of a memory segment in an 8086 microprocessor = 216 Bytes = 64 kB

31. (d)
MOV AX, BX Register addressing mode
MOV AX, [BX] Register indirect addressing mode
MOV AX, [SI] Indexed addressing mode
MOV AX, [BX] [SI] Based indexed addressing mode

32. (c)
For 8086 microprocessor in maximum mode,

S2 S1 S0 Indication
0 0 0 Interrupt acknowledge
0 0 1 Read I/O port
0 1 0 Write I/O port
0 1 1 Halt
1 0 0 Code access
1 0 1 Read memory
1 1 0 Write memory
1 1 1 Passive

33. (c)
Physical address = 23450H + 1000H = 24450H

34. (c)
There is no register control block in 8237 DMA controller.

35. (b)
Multiprocessing is the use of two or more processors working within a system.
Multitasking refers to a systems ability to execute more than one process at a time.

37. (a)
In memory-to-memory transfer mode of 8237 DMA controller, source memory address is specified
by the channel-0 address register and destination memory address is specified by the channel-1
address register.

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E & T Engineering | Test 3 23

38. (b)
There are 4 modes,
mode - 0 Half duplex synchronous
modes - 1, 2, 3 Full duplex asynchronous

39. (b)
Real time clock (RTC) is a clock that causes occurrence of regular interval interrupts on its each
tick. This timing device once started never resets or is never reloaded with another value.

41. (d)
Gain margin alone is inadequate to indicate relative stability when system parameters other than
the loop gain are subject to variation. Due to variation in some parameters, phase shift of the
system can vary which may results instability. Hence, we must also consider the concept of phase
margin for determining the relative stability of the system.

42. (a)
The bandwidth in phase lead compensation is increased, thus improving the speed of response.

43. (b)
Both statements are independently correct but has no relationship together.

44. (d)
For RLC and RRC instructions, final result does not depend on initial state of CY.
For RAL and RAR instructions, final result depends on initial state of CY.
RLC, RRC, RAL, RAR all these instructions will affect CY.

45. (a)
While serving to an interrupt, the sequence of execution will alter, then processor has to store
current value of the program counter and it will respond to the interrupt after completion of
current instruction cycle only. So that the processor can start next instruction, using the pre-stored
value of PC, after returning from ISR. This process is feasible, when and only processor responds
after completion of current instruction cycle otherwise processor may loss some machine cycles.

Section B : Network Theory - 1

46. (a)
The power delivered by a voltage source is given by
V2
P =
Req

Req = 3R + [3R||(3R + 3R)] = 3R + [3R||6 R] = 3R + 2R = 5R

(60)2
1200 =
5R
3600
5R = =3
1200
3
R = = 0.6
5

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24 ESE 2018 Prelims Exam Classroom Test Series

47. (d)

V2
As we know, P = V= PR
R

For RL = R1 = 40 k , V1 = P1 R1 = 0.25 40 10 3 = 100 V

For RL = R2 = 90 k, V2 = P2 R2 = 0.36 90 10 3 = 180 V


From equivalent circuit, using the voltage division rule, we get,

R1 40
where, V1 = VTh = VTh = 100 V ...(i)
R1 + RTh 40 + RTh

R2 90
and V2 = VTh = VTh = 180 V ...(ii)
R2 + RTh 90 + RTh
On dividing (i) by (ii), we get,
40 90 + RTh 100
=
90 40 + RTh 180
90 + RTh
= 1.25
40 + RTh
90 + RTh = 50 + 1.25RTh
or 40 = 0.25RTh
40
or RTh = = 160 k
0.25

48. (a)
Using KCL at node, we get,
5 + (iy) + 2 + (ix) 3 = 0
73 = ix + iy
4 = 2ix
or ix = 2A

49. (c)
Reducing the given circuit, we get
10 F

A B
6F 12 F
10 F

A B

4F
or CAB = 14 F

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E & T Engineering | Test 3 25

50. (c)
Let us first calculate the Thevenins equivalent voltage.
Here, by open circuited the terminal A and B, we get
2V1
5 A
+ +
V +
1

10 V + 3A VTh


B
10 V1 2V1 + VTh = 0
or VTh = (3V1 + 10) ...(i)
but, V1 = 3 5 = 15 V
VTh = (3 15 + 10) = 55 V
now to find RTh, all independent sources will be replaced by their internal impedances.
2V1
5 I
+
V +
1

+ V

By KCL,
V 2V1 V1 = 0
or V = 3V1
also, V1 = 5I
V = 3 5I
V
or = RTh = 15
I
The Thevenins equivalent circuit,
15 A

55 V
+ 2

51. (a)
The given circuit has no resistance. Hence its power factor will be 0 for any value of .

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26 ESE 2018 Prelims Exam Classroom Test Series

52. (c)
For series RL circuit, the impedance angle () is given by
L
tan =
R
where, = 2f, = 60, L = 50 mH and R = 30
50 10 3
tan60 =
30
50 10 3
or 3 = 30
3 3
or =
5 103
3 3
f = = kHz
2 10

53. (b)
For parallel resonant circuit,

1
0 = and Q0 = 0RC
LC

Q0 80 160
R = = 6
= 4 = 1.6 M
0 C 100 0.5 10 10
1 1
and L = = = 200 H
02 C (100) 0.5 106
2

54. (b)
At t = 0, the switch was closed. The inductor act as a short circuit,

6 4
2 0A
2A
+
0V

i(0 )

24
Here, i(0 ) = i(0 +) = = 0.8 A
6+4
For t > 0, switch get opened.

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E & T Engineering | Test 3 27

The circuit act as a source free RL circuit as

6 4
2
iL(t )

1H

where, i L(t) = i(0 +)e t/


diL (t ) L i (0 + )e t /
and v L(t) = L =
dt
L 1
Here, = = = 0.6
R 2 10
0.8 0.6t
v L(t) = e V
0.6
= 1.33 e0.6t V

56. (b)
The given series RLC circuit can be redrawn in the Laplace domain as
1/Cs Ls

Vi (s ) + V0(s) R=1


Using voltage division rule,
1 Vi ( s ) Cs
V0(s) = = Vi ( s)
1 Cs + LCs 2 + 1
1 + Ls +
Cs

V0 (s ) 1 Cs s/L
= = ...(i)
Vi ( s) CL s 2 + s + 1 s 2 + s + 1
L LC L LC
On comparing the given transfer function with equation (i), we get,
1 1
= 2 L=
L 2
1 C 1
= 10 =
LC 2 10
1 1
or C = 2 = = 0.2 F
10 5

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28 ESE 2018 Prelims Exam Classroom Test Series

57. (b)
For series RLC circuit,
R L

+
vs 1
C Z = R + j L
C

At resonance Z would be minimum and therefore Y is maximum.


Similarly in parallel RLC circuit,

if R L C

1 1
Y = + j C
R L
At resonance, Y is minimum.

58. (d)
For t < 0, source 2u(t) = 0
Therefore, iL (0 ) = iL (0 +) = 0 A
vC (0 ) = vC (0 +) = 0 V
For t > 0 iC(0 +) = 2 mA
dvC (0 + )
iC(0 +) = C
dt
dvC (0 + ) ic (0+ ) 2 103
= = = 0.5 V/sec
dt C 4 10 3
59. (d)
Super position theorem does not follow the power response.
When P1 = 36 W and P2 = 49 W
Then, the total power consumed by R is,

( ) ( )
2 2
P = P1 P1 = 36 49

= (6 7)2 = 169 W or 1 W

60. (c)
At resonance, the current circulates around the loop formed by L and C.

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E & T Engineering | Test 3 29

Section C : Digital Circuits - 1

61. (a)
A Y A
B Y
B

A A
Y Y
B B

62. (a)
X

Z=X + Y

63. (a)
A0 B0 A1 B1 A2 B2 A3 B3

20 ns 20 ns 20 ns
Cin FA - 1 FA - 2 FA - 3 FA - 4 C3

S0 S1 S2 S3
(40 ns) (60 ns) (80 ns) (100 ns)

1 1
Maximum rate = = 109
100 ns 100
= 10 106/sec

64. (b)
(26)8 = (00010110)2
and (75)8 = (00111101)2
In 2s complement form, (75)8 = (11000011)2
00010110
11000011
Result in 2s complement form ( 1 1 0 1 1 0 0 1) 2

65. (c)
A + B
A Sout

H.S H.A

AB
B Cout

Sout = ( A B) AB
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30 ESE 2018 Prelims Exam Classroom Test Series

Cout = (A B) AB

Sout = (AB + AB)(AB) + (AB + AB)(AB)

= (AB + AB) (A + B)

= AB

Cout = (AB + AB) (AB)

= AB

66. (b)
Excess - 3
(09)10 1100
BCD
(09)10 1001
Gray Code
(10)10 1111
Binary Code
(10)10
1010
67. (d)
For both AND and OR gates output will be 0, when all its inputs are 0.

69. (d)
(7)10 = (0111)2
In 2s complement form, (7)10 = (1001)2 = (11001)2 = (111001)2

70. (b)
B I1 A I1

21 21
Y Y f
MUX MUX
0 I0 S0 1 I0 S0

BC
C

f = BC + ABC
= ( BC + A) ( BC + BC )
= BC + A = ABC
71. (b)
f = m (0, 3, 6) = m(1, 2, 4, 5, 7)

72. (c)
XY + ( X + Y )Z = XY + XYZ
= ( XY + XY )( XY + Z )
= XY + Z
= (X + Z ) (Y + Z )

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E & T Engineering | Test 3 31

73. (c)
As Y = 1 each bit will be complimented.

74. (b)
A A+ B
Y = (A + B ) C
B
C

Y = ( A B)C = ( A B) + C

= AB +C
= AB + AB + C

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