Features of 8086 Microprocessor

Intel 8086 was launched in 1978.

It was the first 16-bit microprocessor.
This microprocessor had major improvement over the execution speed of 8085.
It is available as 40-pin Dual-Inline-Package (DIP).
It is available in three versions:
o 8086 (5 MHz)
o 8086-2 (8 MHz)
o 8086-1 (10 MHz)
It consists of 29,000 transistors.

The Bus Interface Unit (BIU)

The Bus Interface Unit consists of segment registers, adder to generate 20 bit physical address
and instruction prefetch queue.
The complete physical address which is 20 bits long is generated using 16 bit segment and
offset registers using adder.
In other words this unit is responsible for establishing communication with external devices
and peripherals including memory via the bus.
Once the physical address is sent out of BIU, the instruction and data bytes are fetched from
memory and they stored into a First In First Out (FIFO) 6 byte queue.
This Queue is 6 byte long used to store the op-codes fetched from memory in advance.
In short the function of BIU is to
Fetch the instruction or data from memory.
Write the data to memory.
Write the data to the port.
Read data from the port.

To increase the execution speed, BIU fetches as many as six instruction bytes ahead to time from
memory.
2. All six bytes are then held in first in first out 6 byte register called instruction queue.
3. Then all bytes have to be given to EU one by one.
4. This pre fetching operation of BIU may be in parallel with execution operation of EU, which improves
the speed execution of the instruction. Pipelining:

There are four different 64 KB segments for instructions (code), stack, data and extra data. To
specify where in 1 MB of memory these 4 segments are located the processor uses four segment
registers:
1. CS register: -
Code segment (CS) is a 16-bit register containing address of 64 KB segment with processor
instructions. The processor uses CS segment for all accesses to instructions referenced by
instruction pointer (IP) register.
2. SS Register: -
Stack segment (SS) is a 16-bit register containing address of 64KB segment with program stack.
By default, the processor assumes that all data referenced by the stack pointer (SP) and base
pointer (BP) registers are located in the stack segment.
3. DS register: -
Data segment (DS) is a 16-bit register containing address of 64KB segment with program data.
By default, the processor assumes that all data referenced by general registers (AX, BX, CX, and
DX) and index register (SI, DI) is located in the data segment.
4. ES register: -
Extra segment (ES) is a 16-bit register containing address of 64KB segment, usually with
program data. By default, the processor assumes that the DI register references the ES segment
in string manipulation instructions.

Instruction Pointer:
The Instruction Pointer or IP (also called the program counter in 8085) is a processor register that
indicates where the computer is in its instruction sequence. In 8086 instruction pointer holds the
address of the next instruction to be executed. In most processors, the instruction pointer is
incremented automatically after fetching a program instruction, so that instructions are normally
retrieved sequentially from memory, with certain instructions, such as branches, jumps and
subroutine calls and returns, interrupting the sequence by placing a new value in the program
counter.

Execution Unit (EU):

The execution unit consists of registers such as 16-bit AX, BX, CX and DX and pointers like
SP (Stack Pointer), BP (Base Pointer) and index registers such as SI (source index) and DI
(destination index) registers.
The 16-bit registers can be split into two 8-bit registers. For example, AX can be split into AH
and AL registers.
It has a 16 bit ALU (Arithmetic and Logical Unit), able to perform arithmetic and logical
operations.
It has a 16 bit flag register to reflect the results of execution by the ALU.
The control system which is decoding section and timing and control unit decodes the op-codes
and derives the necessary control signals to execute the instructions.
In short the functions of execution unit are
To tell BIU where to fetch the instructions or data from.
To decode the instructions.
To execute the instructions.

Arithmetic Logic Unit (ALU):

Arithmetic logic unit (ALU) is a digital circuit that performs arithmetic and logical operations.
The ALU is a fundamental building block of the central processing unit (CPU) of a computer,
and even the simplest microprocessors contain one for purposes such as maintaining timers.
General Purpose Registers of 8086
These registers can be used as 8-bit registers individually or can be used as 16-bit in pair to have
AX, BX, CX, and DX.
1. AX Register: AX register is also known as accumulator register that stores operands for
arithmetic operation like divided, rotate.
2. BX Register: This register is mainly used as a base register. It holds the starting base location
of a memory region within a data segment.
3. CX Register: It is defined as a counter. It is primarily used in loop instruction to store loop
counter.
4. DX Register: DX register is used to contain I/O port address for I/O instruction

Flags Register determines the current state of the processor. They are modified automatically by
CPU after mathematical operations, this allows to determine the type of the result, and to
determine conditions to transfer control to other parts of the program. 8086 has 9 flags and they
are divided into two categories: 1. Conditional Flags
2. Control Flags
Conditional Flags: -
Conditional flags represent result of last arithmetic or logical instruction executed.
Conditional flags are as follows:
Carry Flag (CF): This flag indicates an overflow condition for unsigned integer arithmetic. It
is also used in multiple-precision arithmetic.
Auxiliary Flag (AF): If an operation performed in ALU generates a carry/barrow from lower
nibble (i.e. D0 D3) to upper nibble (i.e. D4 D7), the AF flag is set i.e. carry given by D3 bit
to D4 is AF flag. This is not a general-purpose flag; it is used internally by the processor to
perform Binary to BCD conversion.
Parity Flag (PF): This flag is used to indicate the parity of result. If lower order 8-bits of the
result contains even number of 1s, the Parity Flag is set and for odd number of 1s, the Parity
Flag is reset.
Zero Flag (ZF): It is set; if the result of arithmetic or logical operation is zero else it is reset.
Sign Flag (SF): In sign magnitude format the sign of number is indicated by MSB bit. If the
result of operation is negative, sign flag is set.
Overflow Flag (OF): It occurs when signed numbers are added or subtracted. An OF indicates
that the result has exceeded the capacity of machine.
Control Flags: -
Control flags are set or reset intentionally to control the operations of the execution unit. Control
flags are as follows:
1. Trap Flag (TP):
a. It is used for single step control.
b. It allows user to execute one instruction of a program at a time for debugging.
c. When trap flag is set, program can be run in single step mode.
2. Interrupt Flag (IF):
a. It is an interrupt enable/disable flag.
b. If it is set, the maskable interrupt of 8086 is enabled and if it is reset, the interrupt is disabled.
c. It can be set by executing instruction sit and can be cleared by executing CLI instruction.
3. Direction Flag (DF):
a. It is used in string operation.
b. If it is set, string bytes are accessed from higher memory address to lower memory address.
c. When it is reset, the string bytes are accessed from lower memory address to higher memory
address.

Base Pointer (BP):

Base Pointer is a 16-bit register pointing to data in stack segment. BP register is usually used for
based, based indexed or register indirect addressing.
Source Index (SI):
Source Index is a 16-bit register. SI is used for indexed, based indexed and register indirect
addressing, as well as a source data address in string manipulation instructions.
Destination Index (DI):
Destination Index is a 16-bit register. DI is used for indexed, based indexed and register indirect
addressing, as well as a destination data address in string manipulation instructions.
Segmentation and Segment Registers:
8086 Address Space
The 8086 processor has a 20-bit physical address to directly address 1M byte of memory.
Word size is only 16 bits.
20-bit address is splitted in 16-bit segment address and 16-bit offset address.
Segment address shifted four bits to the left and added to the offset value to generate a 20-bit
effective address. Effective address is expressed as a 5 digit hex value (00000h to FFFFFh)
Memory Segments
A segment is a block of 64Kb consecutive memory bytes.
Segments are identified by segment numbers 0 - FFFFh.
A 16 byte block makes up a paragraph.
Segments always start on paragraph boundaries.
Least significant nibble of segment address will always be 0.
Segment Registers
CS, DS, SS, and ES always point to low address end of segment.
CS - Code Segment register - points to a segment containing code.
DS - Data Segment register - points to a segment containing data.
SS - Stack Segment Register - points to a segment containing stack.
ES - Extra Segment register - points to a segment containing data Address.
Program memory
Program can be located anywhere in memory. Jump and call instructions can be used for short
jumps within currently selected 64 KB code segment, as well as for far jumps anywhere within 1
MB of memory. All conditional jump instructions can be used to jump within approximately
+127 - -127 bytes from current instruction.
Data memory
The processor can access data in any one out of 4 available segments, which limits the size of
accessible memory to 256 KB (if all four segments point to different 64 KB blocks). Accessing
data from the Data, Code, Stack or Extra segments can be usually done by prefixing instructions
with the DS:, CS:, SS: or ES: (some registers and instructions by default may use the ES or SS
segments instead of DS segment). Word data can be located at odd or even byte boundaries. The
processor uses two memory accesses to read 16-bit word located at odd byte boundaries.
Reading word data from even byte boundaries requires only one memory access.
Stack memory can be placed anywhere in memory. The stack can be located at odd memory
addresses, but it is not recommended for performance reasons (see "Data Memory" above).

In personal computers

The 80186 would have been a natural successor to the 8086 in personal computers. However,
because its integrated hardware was incompatible with the hardware used in the original IBM
PC, the 80286 was used as the successor instead in the IBM PC/AT.

Few personal computers used the 80186, with some notable exceptions: the Australian Dulmont
Magnum laptop, one of the first laptops; the Wang Office Assistant, marketed as a PC-like stand-
alone word processor; the Mindset; the Siemens PC-D (de) (not 100% IBM PC-compatible but
using MS-DOS 2.11); the Compis (a Swedish school computer); the French SMT-Goupil G4; the
RM Nimbus (a British school computer); the Unisys ICON (a Canadian school computer); ORB
Computer by ABS; the HP 100LX, HP 200LX, HP 1000CX, and HP OmniGo 700LX; the Tandy
2000 desktop (a somewhat PC-compatible workstation with sharp graphics for its day); the Telex
1260 (a desktop PC-XT compatible); the Philips :YES; the Nokia MikroMikko 2. Acorn created
a plug-in for the BBC Master range of computers containing an 80186-10 with 512 KB of RAM,
the BBC Master 512 system.

In addition to the above examples of stand-alone implementations of the 80186 for personal
computers, there was at least one example of an "add-in" accelerator card implementation: the
Orchid Technology PC Turbo 186,[3] released in 1985. It was intended for use with the original
8088-based IBM PC (Model 5150).

Other devices

The Intel 80186 is intended to be embedded in electronic devices that are not primarily
computers. For example, its offshoot, Intel 80188 was embedded inside the Intel 14.4EX modem
released in 1991. The 16 MHz processor was used to perform complex algorithms needed for
forward error correction, Trellis coded modulation, and echo cancellation in the modem.

In May 2006, Intel announced that production of the 186 would cease at the end of September
2007.[4] Pin- and instruction-compatible replacements might still be manufactured by various
third party sources.

800286

1. It is 16 bit processor.
2. It has 24 bit address lines.
3. It can access 16 MB of physical memory.
4. It is available in various versions that run on 12.5 MHz, 10 MHz and 8 MHz clock frequencies.
5. 80286 is upwardly compatible with 8086 in terms of instruction set.
6. Memory management and concepts of virtual memory is introduced in 80286.
7. Intels 80286 is the first CPU to incorporate the integrated memory management unit.
8. The 80286 works in two operating modes, viz. real address mode and protected virtual address mode.
In real address mode, the 80286 just acts as a fast 8086. All the memory management and protection
mechanisms are disabled in this mode.
9. In the protected virtual address mode, the 80286 works with all of its memory management and
protection capabilities with the advanced instruction in both the modes.