ASSIGNMENT

MODULE 5
Embedded Microcontrollers

ANAN S/O A SETHU

 Fine Arts Lifelong Learning Resources Sdn Bhd
Asia e University

15th February 2015

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2.

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3. The term "CISC" (complex instruction set computer or computing) refers to
computers designed with a full set of computer instructions that were intended to
provide needed capabilities in the most efficient way. It was discovered that, by
reducing the full set to only the most frequently used instructions, the computer would
get more work done in a shorter amount of time for most applications. Since this was
called reduced instruction set computing "RISC", there was now a need to have
something to call full-set instruction computers - thus, the term CISC.
The power pc microprocessor, used in IBM's RISC System/6000 workstation and
Macintosh computers, is a RISC microprocessor. Intel's pentium microprocessors are
CISC microprocessors. RISC takes each of the longer, more complex instructions
from a CISC design and reduces it to multiple instructions that are shorter and faster
to process and has therefore become something of an umbrella term for everything
that is not RISC, i.e. everything from large and complex mainframes to simplistic
microcontrollers where memory load and store operations are not separated from
arithmetic instructions.

A modern RISC processor can therefore be much more complex than, say, a modern
microcontroller using a CISC-labeled instruction set, especially in terms of
implementation (electronic circuit complexity), but also in terms of the number of
instructions or the complexity of their encoding patterns. The only differentiating
characteristic (nearly) "guaranteed" is the fact that most RISC designs uses uniform

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instruction length for (almost) all instructions and employs s trictly separate
load/store-instructions.

Examples of instruction set architectures that have been retroactively labeled CISC
are system 360 through z architecture, the pdp 11 and vax architectures,data general
nova and many others. Well known microprocessors and microcontrollers that have
also been labeled CISC in many academic publications include the motorola
6800,6809and 68000-families, the Intel 8080,iPAX302and x86-family, the Zilog
Z80and Z8000-families, the National Semiconductor 32016 and NS3200xx-line, the
MOS Technology 6502-family, the Intel 8051-family, and others.

Some designs have been regarded as borderline cases by some writers. For instance,
the Microchip Technology PIC has been labeled RISC in some circles and CISC in
others and the 6502 and 6809 have both been described as "RISC-like", although they
have complex addressing modes as well as arithmetic instructions that access
memory, contrary to the RISC-principles.

The decision of CISC processor designers to provide a variety of addressing

modes leads to variable-length instructions. For example, instruction length
increases if an operand is in memory as opposed to in a register.

This is because we have to specify the memory address as part of

instruction encoding, which takes many more bits.
This complicates instruction decoding and scheduling. The side effect
of providing a wide range of instruction types is that the number of
clocks required to execute instructions varies widely. This again leads to
problems in instruction scheduling and pipelining.

For these and other reasons, in the early 1980s designers started looking at
simple ISAs. Because these ISAs tend to produce instruction sets with far fewer
instructions of the Reduced Instruction Set Computer (RISC). Even
though the main goal was not to reduce the number of instructions, but the
complexity, the term has stuck.

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There is no precise definition of what constitutes a RISC design. However, we can
identify certain characteristics that are present in most RISC systems.

We identify these RISC design principles after looking at why the

designers took the route of CISC in the first place.
Because CISC and RISC have their advantages and disadvantages,
modern processors take features from both classes. For example, the
PowerPC, which follows the RISC philosophy, has quite a few complex
instructions.

Advanced RISC Machine (ARM). The ARM is a 32-bit reduced instruction

set computer (RISC) instruction set architecture (ISA) developed by ARM Holdings.
It was known as the Advanced RISC Machine, and before that as the Acorn RISC
Machine.
The ARM architecture is the most widely used 32-bit ISA in terms of
numbers produced.
They were originally conceived as a processor for desktop personal
computers by Acorn Computers, a market now dominated by the x86
family used by IBM PC compatible computers.
The relative simplicity of ARM processors made them suitable for low
power applications.

The Performance Equation. The following equation is commonly used for

expressing a computer's performance ability:

CISC Approach. The CISC approach attempts to minimize the number

of instructions per program, sacrificing the number of cycles per
instruction.
RISC Approach. RISC does the opposite, reducing the cycles per
instruction at the cost of the number of instructions per program.

Below is the comparison between CISC and RISC processor.

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 CISC RISC

Emphasis on hardware Emphasis on software

Includes multi-clock complex Single-clock, reduced instruction only

instructions
Memory-to-memory: Register to register:
"LOAD" and "STORE" incorporated in "LOAD" and "STORE" are
instructions independent instructions
Small code sizes, high cycles per Low cycles per second large code
second sizes
Transistors used for storing complex Spends more transistors on memory
instructions registers

Table 1 Comparison of CISC and RISC

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5. Originally, Apple provided no information regarding the processor and other
internal components of the originally iPhone, the iPhone 3g, or the iPhone 3gs simply
stating that the iPhone is a "closed platform."

For the iPhone4, Apple originally mentioned that the device was powered by its own
A4 processor of an unspecified clock speed, and still does in some marketing
materials, but the company later apparently scrubbed the processor information
altogether from official technical specs. For the iPhone 4s, Apple mentions that it is a
"dual core" A5 processor of unspecified speed in the press release but not elsewhere
in technical information. For the iPhone 5, the company press release heralds a
"blazing fast A6 chip," but little more. Finally, for the iPhone 5c and the iPhone 5s,
Apple's dual press release reveal "blazing fast performance of the A6 chip" and an all
new 64-bit "A7 chip" as well as a new "M7 motion coprocessor," for the two devices
respectively, but no other details are provided.

However, for each iPhone model, the curious have used hardware disassemble,
software probing, and technical analysis to determine or at least speculate regarding
the processor that each device uses. When the original iPhone shipped on June 29,
2007 iFixit disassembled it and learned that the primary processor is an Apple branded
Samsung ARM 11 processor running at 412 MHz. Although there was some later
speculation that the primary processor might have been provided by Marvell instead
of Samsung, Marvell made the chip for 802.11b/g wireless networking, but not the
primary processor.

For the iPhone 3G, iFixit and Tech-online collaborated to not only disassemble the
device and confirm that like the original it also is powered by an Apple branded

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Samsung ARM 11 processor running at 412 MHz, but to go a step further and identify
and label an exhaustive number of chips used in the iPhone.Third-party teardowns
from iFixit and Rapirepair as well as an analysis from AnandTech revealed that the
iPhone 3GS has a significantly faster 600 MHz Samsung ARM Cortex A8 processor
and a PowerVR SGX graphics processor.For the iPhone 4 models, disassemble did
not provide any precise details regarding the clockspeed of the Apple-branded "A4"
processor and initial software probing with the Geekbench benchmark only spit out an
unhelpful and obviously untrue "0.00 Hz."

However, based on in-depth analysis from both ArsTechnica and AnandTech, two
highly reliable sources, and speed test, it was determined that the iPhone 4 is powered
by a 1 GHz A4 processor (S5L8930) of variable clockspeed that typically runs around
750 MHz to 800 MHz. The always excellent Geekbench benchmarking tool also was
updated to report a particular processor's variable clockspeed at the time of testing.

The Geekbench benchmark pinpoints that the iPhone 4s uses the "Apple A5"
processor like the iPad 2 models, but more specifically it uses a 1 GHz dual-core
Apple A5 (S5L8940) processor of variable clockspeed, commonly "downclocked" to
800 MHz to conserve battery life. For the iPhone 5 models, AnanTech determined that
it has a custom dual core processor and a three core graphics processor, most likely a
266 MHz PowerVR SGX 543MP3. Early Geekbench software analysis indicated that
it had a 1 GHz processor, but a subsequent version of the software more accurately
determined that it has a variable speed processor that commonly runs around 1 GHz
with a top speed of 1.3 GHz. The Geekbench benchmark confirmed that the iPhone 5c
uses the exact same processor as the iPhone 5.

Finally, AnandTech was first to determine that the Apple A7 processor in the iphone
5s is a ARMv8 derivative of Apple's "Swift" dual core architecture called "Cyclone"
and it runs at 1.3 GHz. It also is 28 nm, has a 64k/64k level 1 (instruction/data) cache
and a 1 MB level 2 cache.

Ultimately, most users probably don't need to know or even care to know about
processor details for the iPhone models, but for those who do, this variety of methods
to evaluate clockspeeds and internal components is interesting nevertheless

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REFERENCES

http://arxiv.org/ftp/arxiv/papers/1101/1101.5364.pdf

http://en.wikipedia.org/wiki/Complex_instruction_set_computing

http://whatis.techtarget.com/definition/CISC-complex-instruction-set-computer-or-
computing
http://www.everymac.com/systems/apple/iphone/iphone-faq/iphone-processor-
types.html

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