EDC PUT Paper 2017-18

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IIMT College of Engineering, Greater Noida (216)

Course: B.Tech/MBA/MCA
Pre-University Test, ODD Semester, 2017-18
Time: 3Hrs Total Marks: 70
Subject with Paper Code: Electronic Devices & Circuits/ REC-302 D.O.E: 30th-Nov-2017
Branch: Electronics & Communication Engineering Semester:3rd

Note: Attempt Questions from each section as per Instructions. Be precise in your answer
assume data wherever not given for numerical.

Section-A

Q.1 Attempt all parts (2x7=14)

1. What is Fermi level? How does it depend on temperature?


2. What is Indirect-gap semi-conductors?
3. Explain the effect of doping & temperature on mobility.
4. What is contact potential? How does it vary with biasing?
5. Draw Hybrid model and T-model equivalent of N-type Enhancement
MOSFET transistor.
6. Draw the labeled circuit diagram of a CS, CG, amplifiers.
7. Draw labeled circuit diagrams of various biasing in MOSFET amplifier
circuits.
Section-B

Q.2 Attempt any five parts (5x7=35)

1. Derive the expression for equilibrium carrier concentration for holes using
Feric-delta distribution funtion with proper diagrams & graphs where
required.
2. Describe Diffusion of carriers & derive the current equation resulting due
to this phenomenon. Also derive the Einstein Relation.
3. Show that the total Depletion Width in an P-N junction at thermal
2V0 1 1
equilibrium can be given by W = . + .
q Na Nd
4. Explain Contact Potential & Also derive its formula.
5. Do the small signal analysis on MOSFET and show DC Bias point, the
signal current at Drain terminal and the Voltage gain.
6. Explain Shunt-Series & Series-Series feedback systems also derive formula
of Feedback Gain, Effective input resistance, Effective output resistance.
7. (i)It is required to design the circuit shown in the figure given so as to
operate at dc bias drain current of 0.5mA. Assume VDD=+5.0 Volt,
W
kn' 2
= 1 mA V , Vt = +1.0 Volt.
L

(ii) An enhancement type NMOS transistor with Vt = 0.7 V has its source
terminal grounded and a 1.5 V applied to the gate. In what region does the
device operate for
(1.) VD= +0.5 V
(2.) VD= +0.9 V
(3.) VD= +3.0 V.

Section-C

Q.3 Attempt any two parts. (2x10.5=21)

1. Do the small signal analysis of common emitter amplifier with emitter


resistance do derive input resistance, voltage gain (from base to collector),
overall voltage gain (source to load), open circuit voltage gain and output
resistance.
2. (i) Boron is implanted into n-type Si sample ( N d = 1016 cm3 ) forming an
abrupt junction of cross-section area = 2 102 cm 2 . Assuming acceptor
concentration in p-type as ( N a = 1018 cm 3 ) . Calculate V0, Q+, E & depletion
region extension on either side of p-n junction at room temperature.(Given
that ni = 1.5 10+10 cm 3 , r = 11.8, 0 = 8.85 1014 F cm , kT = 0.0259 eV, at room
temperature.
(ii) Mobilities of electron and holes in a sample of intronsic germanium at
room temperature are 3900 cm2/V-sec & 1900 cm2/V-sec respectively. If the
electron & hole densities are each equal to 2.5 x 1013/cm3. Calculate
germanium conductivity & resistivity.
3. For the circuit shown below kp= 8A/V2, W/L=25,& modulus of Vtp=1
V.for I = 100A find VSD and VSG for R=0,10,30 & 100 k. for what value
of R is VSD=VSG?

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