Design Problem 1

ECE ( Communication System II)

1) Design the block diagram of M-ARY FSK(M=8) using simulink. [5]

2) Compare the bit error rate of the M-ARY FSK (M=8) , BFSK and QFSK using graph. [5]
3) Compare the symbol rate of M-ary FSK (M=8) and BFSK using graph. [5]
4) Design the delta modulator block diagram using simulink and show the results. [5]

Note- Assume any signal or parameters by your own.