Digital Integrated Circuit Analysis and Design Static Circuits

Static Circuits

Prof. Ming-Bo Lin

Department of Electronic Engineering

National Taiwan University of Science and Technology

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-1

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-2

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
Noise margins
Voltage-transfer characteristic (VTC)
Short-channel considerations
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-3

Digital Integrated Circuit Analysis and Design Static Circuits

Noise Margins

q Low noise margin

q High noise margin

VIH = minimum high input voltage

VIL = maximum low input voltage
VOH = minimum high output voltage
VOL = maximum low output voltage

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-4

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
Noise margins
Voltage-transfer characteristic (VTC)
Short-channel considerations
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-5

Digital Integrated Circuit Analysis and Design Static Circuits

CMOS Inverter --- VTC

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-6

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Digital Integrated Circuit Analysis and Design Static Circuits

CMOS Inverter --- VTC

q Regions of operation

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-7

Digital Integrated Circuit Analysis and Design Static Circuits

CMOS Inverter --- VTC

q Calculation of VIL

Using dVout/dVin = -1 and setting Vin = VIL

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-8

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Digital Integrated Circuit Analysis and Design Static Circuits

CMOS Inverter --- VTC

q Calculation of VIH

Using dVout/dVin = -1 and setting Vin = VIH

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-9

Digital Integrated Circuit Analysis and Design Static Circuits

CMOS Inverter --- VTC

q Calculation of Vth
Setting Vth = Vin = Vout

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-10

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Digital Integrated Circuit Analysis and Design Static Circuits

An Example

q Calculate VOL, VOH, VIL, VIH, and Vth

VDD = 1.8 V
Wn = 4
Wp = 20
Ln = Lp = 2
Using 0.18-m parameters

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-11

Digital Integrated Circuit Analysis and Design Static Circuits

An Example

q In CMOS inverter

q Calculate kR

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-12

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Digital Integrated Circuit Analysis and Design Static Circuits

An Example

q Calculation of VIL

Hence, Vout = 1.65 V and VIL = 0.82 V.

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-13

Digital Integrated Circuit Analysis and Design Static Circuits

An Example

q Calculation of VIH

Hence, Vout = 0.11 V and VIH = 1.09 V.

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-14

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Digital Integrated Circuit Analysis and Design Static Circuits

An Example

q Calculation of Vth

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-15

Digital Integrated Circuit Analysis and Design Static Circuits

An Example

NOT VTC Characteristics--- 0.25 um process

******** Parameters and model *********
.lib "..\cmos25.txt" TT
.param Supply=2.5V * Set value of Vdd
.opt scale=0.125u
******** Circuit description **********
MN Vout Vin Gnd Gnd nmos L=2 W=4
MP Vout Vin Vdd Vdd pmos L=2 W=8
Vdd Vdd Gnd 'Supply'
Vin Vin Gnd
******** analysis statement *******
.DC Vin 0 'Supply' 'Supply/100'
******** Output statements *******
.print V(Vout)
.END

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-16

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
Noise margins
Voltage-transfer characteristic (VTC)
Short-channel considerations
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-17

Digital Integrated Circuit Analysis and Design Static Circuits

Saturation Voltage Criterion

q A criterion

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-18

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Digital Integrated Circuit Analysis and Design Static Circuits

Short-Channel VTC

q Calculation of VIL

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-19

Digital Integrated Circuit Analysis and Design Static Circuits

Short-Channel VTC

q Calculation of VIH

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-20

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Digital Integrated Circuit Analysis and Design Static Circuits

Short-Channel VTC

q Calculation of Vth

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-21

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimation of propagation delays
Definition of delays
Average current approach
Differential current approach
Equivalent resistance approach
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-22

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Digital Integrated Circuit Analysis and Design Static Circuits

Definition of Propagation Delays

q tpLH
q tpHL

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-23

Digital Integrated Circuit Analysis and Design Static Circuits

Definition of Rise and Fall Times

q Rise time (tr, trise)

q Fall time (tf , tfall)

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-24

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
Definition of delays
Average current approach
Differential current approach
Equivalent resistance approach
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-25

Digital Integrated Circuit Analysis and Design Static Circuits

Average Current Approach

q Average current approach

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-26

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
Definition of delays
Average current approach
Differential current approach
Equivalent resistance approach
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-27

Digital Integrated Circuit Analysis and Design Static Circuits

Differential Current Approach

q Propagation delay tpHL

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-28

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Digital Integrated Circuit Analysis and Design Static Circuits

Differential Current Approach

q Propagation delay tpHL

If VOH = VDD and VOL = 0

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-29

Digital Integrated Circuit Analysis and Design Static Circuits

Differential Current Approach

q Propagation delay tpLH

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-30

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Digital Integrated Circuit Analysis and Design Static Circuits

Differential Current Approach

q Propagation delay tpLH

If VOH = VDD and VOL = 0

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-31

Digital Integrated Circuit Analysis and Design Static Circuits

Differential Current Approach

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-32

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
Definition of delays
Average current approach
Differential current approach
Equivalent resistance approach
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-33

Digital Integrated Circuit Analysis and Design Static Circuits

Equivalent Resistance Approach

q Equivalent resistance approach

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-34

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Digital Integrated Circuit Analysis and Design Static Circuits

Equivalent Resistance Approach

q Charge and discharge equations

The 50% point occurs at

Equivalent resistance

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-35

Digital Integrated Circuit Analysis and Design Static Circuits

Equivalent Resistance Approach

q Equivalent resistance

Dependent on the operating voltage

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-36

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Digital Integrated Circuit Analysis and Design Static Circuits

An Example of Inverter Design

q tpLH = tpHL=100 ps
Lp = Ln = 2
CL = 0.1 pF
VDD = 1.8 V
Using 0.18- m parameters
q Determine Wn and Wp.

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-37

Digital Integrated Circuit Analysis and Design Static Circuits

An Example of Inverter Design

q Solution

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-38

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Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
An informal analysis
An example
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-39

Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-40

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Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

q An informal analysis
VOH = VDD
Calculation of VOL

Since VOL is small

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-41

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
An informal analysis
An example
q Two-input NAND gates
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-42

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Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

q An example
p = 112 cm2/V-s
n = 292 cm2/V-s
effn = 287 cm2/V-s
VT0n = |VT0p| = 0.4 V
VDD = 1.8 V
vsat = 8 106 cm/s
Esatn = 12 104 V/cm
Esatn = 25 104 V/cm
q VOL 0.1 V
Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-43

Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

q Using long channel equation

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-44

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Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

q Using short channel equation

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-45

Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters

Pseudo-nMOS VTC --- 0.35 to 0.13 um processes

******** Parameters and model *********
.lib '..\cmos35.txt' TT
.param Supply=3.3V * Set value of Vdd
.opt scale=0.175u
******** Circuit description **********
MN Vout Vin Gnd Gnd nmos L=2 W=4
MP Vout Gnd Vdd Vdd pmos L=2 W=2
Vdd Vdd Gnd 'Supply'
Vin Vin Gnd
********* Analysis statement ************
.DC Vin 0 'Supply' 'Supply/100'
********* Output statements *************
.print V(Vout)
.alter * using 0.25 um process
.lib '..\cmos25.txt' TT
.param Supply = 2.5V * Set value of Vdd

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-46

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Digital Integrated Circuit Analysis and Design Static Circuits

Pseudo-nMOS Inverters
.opt scale = 0.125u
.alter * using 0.18 um parameters
.lib '..\cmos18.txt' cmos
.param Supply = 1.8V * Set value of Vdd
.opt scale = 0.09u
.alter * 0.13 um process
.lib '..\cmos13.txt' cmos
.param SUPPLY=1.2V
.option scale=0.065u
.END

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-47

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
VTC
Inverter-equivalent design method
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-48

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Digital Integrated Circuit Analysis and Design Static Circuits

Two-Input NAND Gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-49

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
VTC
Inverter-equivalent design method
q Two-input NOR gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-50

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Digital Integrated Circuit Analysis and Design Static Circuits

Inverter-Equivalent Design Method

q Vth

(in parallel)

(in series)

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-51

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates
VTC
Inverter-equivalent design method

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-52

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Digital Integrated Circuit Analysis and Design Static Circuits

Two-Input NOR Gates

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-53

Digital Integrated Circuit Analysis and Design Static Circuits

Syllabus

q CMOS Inverters
q Estimate of propagation delays
q Pseudo-nMOS inverters
q Two-input NAND gates
q Two-input NOR gates
VTC
Inverter-equivalent design method

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-54

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Digital Integrated Circuit Analysis and Design Static Circuits

Inverter-Equivalent Design Method

q Vth
(in parallel)

(in series)

Department of Electronic Engineering, NTUST, copyright@2004~2011, Ming-Bo Lin 4-55

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