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ECE512 Embedded Systems Design using FPGA

3 0 0 3
Version : 1.00

Objectives:
 This course covers the advanced design and analysis of digital circuits with HDL. The primary goal is
to provide in depth understanding of logic and system design. The course enables students to apply
their knowledge for the design of advanced digital hardware systems with help of FPGA tools
Expected Outcome:
 Ability to design an embedded system using FPGA.
 Use Xilinx IP Cores
 Identification and exploitation of Parallelism concepts
Unit I Introduction 5 hours
Embedded Systems -Embedded and General -Purpose, Hardware, Software, and FPGAs , Execution
Models ,Design Challenges- Design Life Cycle ,Measures of Success ,Costs , Platform FPGAs .
Unit II Hardware Description Languages and FPGA 10 hours
Hardware Description Languages - VHDL , Verilog , Other High-Level HDLs, From HDL to
Configuration Bit-stream - Chapter in Review , Xilinx Virtex5- Look-Up Table, Slice , Configurable Logic
Block, Block RAM ,DSP Slices ,Select I/O, High-Speed Serial Transceivers, Clocks, PowerPC 440, Xilinx
Integrated Software Environment-Overview of Commands, Creating and Generating Custom IP -Xilinx
Core Generator, Create/Import Peripheral Wizard ,Hardware Core Project Directory.
Unit III System Design using FPGA 10 hours
Principles of system design-Design quality, Modules and interfaces, Abstraction and state, Cohesion and
coupling, Designing and Reuse, Control flow graph, Design-Origins of platform FPGA designs,
Platform FPGA Components, Adding to platform FPGA systems, assembling custom compute cores.
Software Design-System Software Options, Root File system, Cross-Development Tools, Monitors and
Boot-loader.
Unit IV Partitioning 10 hours
Overview of Partitioning Problem, Analytical Solution to Partitioning-Basic definitions, Expected
performance gain, Resource considerations, Analytical Approach, Communication-
Invocation/Coordination, Transfer of State ,Practical Issues-Profiling Issues, Data Structures Manipulate
Feature Size.
Unit V Spatial Design 10 hours
Principles of Parallelism-Granularity, Degree of Parallelism Spatial Organizations, Identifying Parallelism -
Ordering, Dependence, Uniform Dependence Vectors, Spatial Parallelism with Platform FPGAs-
Parallelism within FPGA Hardware Cores, Parallelism within FPGA Designs.

Reference Books:

1. Ron SASS, ANDERW G SCHMIDT “Embedded Systems Design with Platform FPGAs Principles
and Practices”, Tata McGraw Hill, 2007
2. V A. Pedroni “Circuit Design With VHDL” Phi Learning (2007)
3. Wayne Wolf , “FPGA Based System Design”, Prentices Hall Modern Semiconductor Design Series
4. Charles H Roth, Jr “Digital Systems design using VHDL”, Thomson Books/Cole.

Mode of Evaluation: CAT- I & II, Quizzes, Assignments/ other tests, Term End Examination.