Micro Practical

Kandivali (W) Mumbai – 400067
Tel. : 2228072477
A Practical Handbook on
MICROPROCESSOR AND MICROCONTROLLER
FOR FY B.Sc IT
Prepared By:-
VISHESH SHRIVASTAVA
B.E. Elec. & Tele
Lecturer B.Sc.IT
KES SHROFF COLLEGE Page 1

INDEX
S/N NAME OF EXPERIMENT DATE SIGN.

1 To Study The Pin Description of Microprocessor 8085.
2 To Study The Architecture of Microprocessor 8085.
3 To Study The Addressing modes and Instruction Set for

Microprocessor 8085.
4 To Study The Keyboard And Display Devices used in
Microprocessor in 8085 Kit
5 To write a program to transfer data 15H in all general
purpose register.
6 To write a program to add 02H, 0AH and 05H and store .
the result in memory location C070H and in register C
also.
7 To write a program to add content of memory location
C080H, and C081H and store the result in memory
location C082H
8 To write a program to find Two’s compliment of a
number stored at C070 H and store the result in C080
H..
9 To write a program to subtract the number stored at
memory location C040H from the number stored at
C041 Hand store the result at C042 H.
10 To write a program to stored data 00H to 07H in
memory location C090 H respectively
11 To write a program to stored data FFH in alternate
memory location starting from C030H in 5 memory
location.
12 Assume register B holds 93H and the Accumulator
holds 15H illustrate the result of the instruction ORA B,
XRA B, CMA, and ANA B. and store the result in
different registers.
13 To write a program to exchange digit of a number
stored at C050H and store the new number at C051H.
14 To write a program to mask 3rd and 5th bit of number
stored at memory location C070 H store the result in
C080 H.

EXPERIMENT NO. 1
Aim:- To Study The pin diagram of Microprocessor 8085.
Theory:- The 8085 is an 8 bit general purpose microprocessor capable of addressing 64 k of

memory. The device has 40 pins requires a + 5v single power supply and can operate at a 3-
MHz single phase clock. The 8085A-2 version can operate at the maximum frequency of
5MHz. figure shows the logic pin out of 8085 microprocessor. All the signal can be classified
into six groups.
1. Address Bus .
2. Data Bus.
3. Control and Status signal.
4. Power supply and Frequency signals.
5. Externally Initiated signal.
6. Serial input output port.
1. ADDRESS BUS:-
The Address bus is a group of 16 lines generally identified as A 0 to A15. The address bus is
unidirectional bits flows in one direction, But the 8085 has eight signal lines which are
unidirectional and used as a higher order address.
2. DATA BUS:-
The data bus is a group of eight lines used for data flow. These lines are bidirectional. The
signal lines AD0 to AD7 are bidirectional they serve a dual purpose. They are used as a low
order address bus as well as data bus. In executing an instruction during the earlier part of
the cycle these lines are used as low order address bus . And during the later part of the
cycle these lines are used as data bus.
3. CONTROL AND STATUS SIGNALS:-

The group of signals include two control signals( WR and RD) three
status signals(IO/M, S0 & S1) to identified the nature of the operation. And one special
signal (ALE) to indicate the beginning of the operation these signals are follows.
ALE:-
This is a positive going pulse generated every time the 8085 begins an operation(machine
cycle);it indicates that the bits on AD7- AD0 are address bits. This signal is used primarily to
latch the low -order address from multiplexed bus and generate a separate set of eight
address lines,A7-A0.

RD (Read) :
This is a read control signal (active low) This signal indicates that the selected I/O or
memory device is to be read and data are available on data bus.
WR (Write):-
This is a write control signal (active low) This signal indicates that the data on data bus are
to be written in to a selected I/O or memory device .
IO/M :-
This is the status signal used to differentiate between I/O and memory operation. When it
is high it indicates I/o operation and when it is low it indicates memory operation.
S1 and S0 :-
These status signals are similar to IO/M can identified various operations but they are
really used in small systems.
4. POWER SUPPLY AND CLOCK FREQUENCY :-

The power supply and frequency are as follows.
VCC :- + 5 v power supply.
Vss :- Ground reference.
X1, X1:- A crystal is connected to these pins the frequency is internally divided by two.
CLK:-
Clock Output: This signal can be used as the system clock for other devices.
5. EXTERNALLY INITIATED SIGNALS INCLUDING INTERRUPTS:-

The 8085 has five interrupt signals, that can be used to interrupt program execution .
INTR :-
INTR is maskable 8080A compatible interrupt. When the interrupt occurs the processor
fetches from the bus one instruction, usually one of these instructions:
RST5.5 :
It is a maskable interrupt. When this interrupt is received the processor saves the contents of
the PC register into stack and branches to 2CH (hexadecimal) address.

RST6.5 :-
It is a maskable interrupt. When this interrupt is received the processor saves the contents of
the PC register into stack and branches to 34h (hexadecimal) address.
RST7.5 :-
It a maskable interrupt. When this interrupt is received the processor saves the contents of
the PC register into stack and branches to 3Ch (hexadecimal) address.
TRAP:-
Trap is a non-maskable interrupt. When this interrupt is received the processor saves the
contents of the PC register into stack and branches to 24h (hexadecimal) address. All
maskable interrupts can be enabled or disabled using EI and DI instructions. RST 5.5, RST6.5
and RST7.5 interrupts can be enabled or disabled individually using SIM instruction
HOLD:-
This signal indicates that peripherals such as a DMA controller is requesting the use of the
address and data busses.
HLDA:-
Hold Acknowledgement: This signal Acknowledge the HOLD request.
READY:-
This signal is used to delay the microprocessor read or write cycles until as slow responding
peripheral is ready to sent or accept data

8085 PIN DIAGRAM
X1 1 40 VCC
X2 2 39 Hold
Reset Out 3 38 HLDA
SOD 4 37 CLK (OUT)
SID 5 36 RESET IN
Trap 6 35 Ready
RST 7.5 7 34 IO/M
RST 6.5 8 33 S1
RST 5.5 9 32 RD
INTR 10 31 WR
INTA 11 30 ALE
AD0 12 29 S0
AD1 13 28 A15
AD2 14 27 A14
AD3 15 26 A13
AD4 16 25 A12
AD5 17 24 A11
AD6 18 23 A10
AD7 19 22 A9
VSS 20 21 A8

Pin Description
Sr. Pin Pin name Purpose Status

no. no.
1 1,2 X1, X1 Crystal oscillator is connected for clock Input
pulses.
2 3 RESET OUT Peripheral reset Output
3 4 SOD Serial Output Data Output
4 5 SID Serial Input Data Input
5 6 TRAP Non Maskable Interrupt Input
6 7,8,9 RST Maskable Interrupt Input

7.5,6.5,5.5
7 10 INTR User Interrupt Request Input
8 11 Output
INTA Interrupt Acknowledgement
9 12 to AD0 to AD7 Address Data Bus Bidirectional
19
10 20 Vss Power Supply, Ground Connection Input
11 21 to A8 to A15 Address Bus higher Order Output

28
12 29,33 S0 , S1 Status Bus Indicator Output

13 30 ALE Address Latch Enable Output
14 31 Write Control Purpose Output

WR
15 32 Read Control Purpose Output
RD
16 34 Input Output or Memory Indicator Output
IO/M
17 35 READY Peripheral Wait State Input
18 36 System Reset Output

RESET IN
19 37 CLK OUT System Clock Output
22 38 HLDA Hold Acknowledgement Input
21 39 HOLD Hold Request Input
22 40 VCC Power Supply +5v DC Input
EXPERIMENT NO. 2
Aim:- To Study The Architecture of Microprocessor 8085.
Theory:-
The 8085 microprocessor architecture is shown in figure . It includes the ALU, Timing and
Control, Instruction Register and Decoder, Register Array, Interrupt Control and Serial I/O
control.
Control Unit:-
Generates signals within uP to carry out the instruction, which has been decoded. In reality
causes certain connections between blocks of the uP to be opened or closed, so that data
goes where it is required, and so that ALU operations occur.
Arithmetic Logic Unit:-

The ALU performs the actual numerical and logic operation such as ‘add’, ‘subtract’ ‘AND’ ‘OR’,
etc. Uses data from memory and from Accumulator to perform arithmetic. Always stores
result of operation in Accumulator.

Registers :-
The 8085/8080A-programming model includes six registers, one accumulator, and one flag
register, as shown in Figure. In addition, it has two 16-bit registers: the stack pointer and the
program counter. They are described briefly as follows.
The 8085/8080A has six general-purpose registers to store 8-bit data; these are identified as
B,C,D,E,H, and L as shown in the figure. They can be combined as register pairs - BC, DE, and
HL - to perform some 16-bit operations. The programmer can use these registers to store or
copy data into the registers by using data copy instructions.
Accumulator :-
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU). This register is
used to store 8-bit data and to perform arithmetic and logical operations. The result of an
operation is stored in the accumulator. The accumulator is also identified as register A.
Flags:-
The ALU includes five flip-flops, which are set or reset after an operation according to data
conditions of the result in the accumulator and other registers. They are called Zero(Z), Carry
(CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags; they are listed in the Table and their bit
positions in the flag register are shown in the Figure below. The most commonly used flags are
Zero, Carry, and Sign. The microprocessor
uses these flags to test data conditions.
For example, after an addition of two numbers, if the sum in the accumulator id larger than
eight bits, the flip-flop uses to indicate a carry -- called the Carry flag (CY) – is set to one.
When an arithmetic operation results in zero, the flip-flop called the Zero(Z) flag is set to one.
The first Figure shows an 8-bit register, called the flag register, adjacent to the accumulator.
However, it is not used as a register; five bit positions out of eight are used to store the
outputs of the five flip-flops. The flags are
stored in the 8-bit register so that the programmer can examine these flags (data conditions)
by accessing the register through an instruction.
These flags have critical importance in the decision-making process of the micro-processor.
The conditions (set or reset) of the flags are tested through the software instructions. For
example, the instruction JC (Jump on Carry) is implemented to change the sequence of a
program when CY flag is set. The thorough understanding of flag is essential in writing
assembly language programs.
Program Counter (PC):-

This 16-bit register deals with sequencing the execution of instructions. This register is a
memory pointer. Memory locations have 16-bit addresses, and that is why this is a 16-bit
register.
The microprocessor uses this register to sequence the execution of the instructions. The
function of the program counter is to point to the memory address from which the next byte
is to be fetched. When a byte (machine code) is being fetched, the program counter is
incremented by one to point to the next memory location.
Stack Pointer (SP):-

The stack pointer is also a 16-bit register used as a memory pointer. It points to a memory
location in R/W memory, called the stack. The beginning of the stack is defined by loading 16-
bit address in the stack pointer. The stack concept is explained in the chapter "Stack and
Subroutines."
Address Bus Address data bus
Instruction Register/Decoder :-
Temporary store for the current instruction of a program. Latest instruction sent here from
memory prior to execution. Decoder then takes instruction and ‘decodes’ or interprets the
instruction. Decoded instruction then passed to next stage.
Memory Address Register :-

Holds address, received from PC, of next program instruction. Feeds the address bus with
addresses of location of the program under execution.
Control Generator:-
Generates signals within uP to carry out the instruction which has been decoded. In reality
causes certain connections between blocks of the uP to be opened or closed, so that data
goes where it is required, and so that ALU operations occur.
Register Selector:-

This block controls the use of the register stack in the example. Just a logic circuit which
switches between different registers in the set will receive instructions from Control Unit.
General Purpose Registers:-

uP requires extra registers for versatility. Can be used to store additional data during a
program. More complex processors may have a variety of differently named registers.
8085 System Bus

Typical system uses a number of busses, collection of wires, which transmit binary numbers,
one bit per wire. A typical microprocessor communicates with memory and other devices
(input and output) using three busses: Address Bus, Data Bus and Control Bus.
Address Bus
One wire for each bit, therefore 16 bits = 16 wires. Binary number carried alerts memory to
‘open’ the designated box. Data (binary) can then be put in or taken out.The Address Bus
consists of 16 wires, therefore 16 bits. Its "width" is 16 bits. A16 bit binary number allows 216
different numbers, or 32000 different numbers, ie 0000000000000000 up to
1111111111111111. Because memory consists of boxes, each with a unique address, the size
of the address bus determines the size of memory, which can be used. To communicate with
memory the microprocessor sends an address on the address bus, eg 0000000000000011 (3
in decimal), to the memory. The
memory the selects box number 3 for reading or writing data. Address bus is
unidirectional, ie numbers only sent from microprocessor to memory, not other way.
Data Bus
Data Bus: carries ‘data’, in binary form, between µP and other external units, such as memory.
Typical size is 8 or 16 bits. Size determined by size of boxes in memory andµP size helps
determine performance of µP. The Data Bus typically consists of 8wires. Therefore, 28
combinations of binary digits. Data bus used to transmit "data" ie information, results of
arithmetic, etc, between memory and the microprocessor.
Control Bus
Control Bus are various lines which have specific functions for coordinating and controlling uP
operations. Eg: Read/Not Write line, single binary digit. Control whether memory is being
‘written to’ (data stored in mem) or ‘read from’ (data taken out of mem) 1 = Read, 0 = Write.
May also include clock line(s) for timing/synchronizing, ‘interrupts’, ‘reset’ etc. Typically µP has
10 control lines.

EXPERIMENT NO. 3
Aim:- To Study The Addressing modes and Instruction Set for Microprocessor 8085.
Theory:-
Instructions can be categorized according to their method of addressing the hardware

registers and/or memory.
1. Immediate addressing.
2. Register addressing.
3. Direct addressing.
4. Indirect addressing.
Immediate addressing :-
Data is present in the instruction. Load the immediate data to the destination provided.
Example: MVI R,data
Register addressing:-
Data is provided through the registers.
Example: MOV Rd, Rs
Direct addressing:-
Used to accept data from outside devices to store in the accumulator or send the data stored
in the accumulator to the outside device. Accept the data from the port 00H and store them
into the accumulator or Send the data from the accumulator to the port 01H.
Example: IN 00H or OUT 01H
Indirect Addressing:-
This means that the Effective Address is calculated by the processor. And the contents of the
address (and the one following) is used to form a second address. The second address is
where the data is stored. Note that this requires several memory accesses; two accesses to
retrieve the 16-bit address and a further access (or accesses) to retrieve the data which is to
be loaded into the register.
Instruction Set Classification

An instruction is a binary pattern designed inside a microprocessor to perform a specific
function. The entire group of instructions, called the instruction set, determines what
functions the microprocessor can perform. These instructions can be classified into the

following five functional categories: data transfer (copy) operations, arithmetic operations,
logical operations, branching operations, and
machine-control operations.
Data Transfer (Copy) Operations

This group of instructions copy data from a location called a source to another location called
a destination, without modifying the contents of the source. In technical manuals, the term
data transfer is used for this copying function. However, the term transfer is misleading; it
creates the impression that the contents of the source are destroyed when, in fact, the
contents are retained without any modification.
Arithmetic Operations:-
These instructions perform arithmetic operations such as addition, subtraction, increment,
and decrement.
Addition – Any 8-bit number, or the contents of a register or the contents of a memory
location can be added to the contents of the accumulator and the sum is stored in the
accumulator. No two other 8-bit registers can be added directly (e.g., the contents of register
B cannot be added directly to the contents of the register C). The instruction DAD is an
exception; it adds 16-bit data directly in register pairs.
Subtraction - Any 8-bit number, or the contents of a register, or the contents of a memory
location can be subtracted from the contents of the accumulator and the results stored in the
accumulator. The subtraction is performed in 2's compliment, and the results if negative, are
expressed in 2's complement. No two other registers can be subtracted directly.
Increment/Decrement - The 8-bit contents of a register or a memory location can be

incremented or decrement by 1. Similarly, the 16-bit contents of a register pair (such as BC)
can be incremented or decrement by 1. These increment and decrement operations differ
from addition and subtraction in an important way; i.e., they can be performed in any one of
the registers or in a memory location.
Logical Operations:-
These instructions perform various logical operations with the contents of the accumulator.
AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory

location can be logically ANDed, Ored, or Exclusive-ORed with the contents of the
accumulator. The results are stored in the accumulator.
Rotate- Each bit in the accumulator can be shifted either left or right to the next position.
Compare- Any 8-bit number, or the contents of a register, or a memory location can be
compared for equality, greater than, or less than, with the contents of the accumulator.
Complement - The contents of the accumulator can be complemented. All 0s are replaced by
1s and all 1s are replaced by 0s.
Branching Operations:-
This group of instructions alters the sequence of program execution either
conditionally or unconditionally.
Jump - Conditional jumps are an important aspect of the decision-making process in the
programming. These instructions test for a certain conditions (e.g., Zero or Carry flag) and
alter the program sequence when the condition is met. In addition, the instruction set
includes an instruction called unconditional jump.
Call, Return, and Restart - These instructions change the sequence of a program either by
calling a subroutine or returning from a subroutine. The conditional Call and Return
instructions also can test condition flags.
Data Transfer Group:
The data transfer instructions move data between registers or between memory and registers.
MOV Move
MVI Move Immediate
LDA Load Accumulator Directly from Memory
STA Store Accumulator Directly in Memory
LHLD Load H & L Registers Directly from Memory
SHLD Store H & L Registers Directly in Memory
An 'X' in the name of a data transfer instruction implies that it deals with a register pair (16-
bits);
LXI Load Register Pair with Immediate data
LDAX Load Accumulator from Address in Register Pair
STAX Store Accumulator in Address in Register Pair

XCHG Exchange H & L with D & E
XTHL Exchange Top of Stack with H & L
Arithmetic Group:
The arithmetic instructions add, subtract, increment, or decrement data in registers or

memory.
ADD Add to Accumulator
ADI Add Immediate Data to Accumulator
ADC Add to Accumulator Using Carry Flag
ACI Add Immediate data to Accumulator Using Carry
SUB Subtract from Accumulator
SUI Subtract Immediate Data from Accumulator
SBB Subtract from Accumulator Using Borrow
(Carry) Flag
SBI Subtract Immediate from Accumulator Using Borrow (Carry) Flag
INR Increment Specified Byte by One
DCR Decrement Specified Byte by One
INX Increment Register Pair by One
DCX Decrement Register Pair by One
DAD Double Register Add; Add Content of Register
Pair to H & L Register Pair
Logical Group:
This group performs logical (Boolean) operations on data in registers and memory and on
condition flags.
The logical AND, OR, and Exclusive OR instructions enable you to set specific bits in the
accumulator ON or OFF.
ANA Logical AND with Accumulator
ANI Logical AND with Accumulator Using Immediate Data
ORA Logical OR with Accumulator
OR Logical OR with Accumulator Using Immediate Data
XRA Exclusive Logical OR with Accumulator
XRI Exclusive OR Using Immediate Data
The Compare instructions compare the content of an 8-bit value with the contents of the
accumulator;
CMP Compare.
CPI Compare Using Immediate Data.
The rotate instructions shift the contents of the accumulator one bit position to the left or
right:
RLC Rotate Accumulator Left.
RRC Rotate Accumulator Right.
RAL Rotate Left Through Carry.
RAR Rotate Right Through Carry.

Complement and carry flag instructions:
CMA Complement Accumulator.
CMC Complement Carry Flag.
STC Set Carry Flag.
Branch Group:
The branching instructions alter normal sequential program flow, either unconditionally or
conditionally. The unconditional branching instructions are as follows:
JMP Jump.
CALL Call.
RET Return.
Conditional branching instructions examine the status of one of four condition flags to
determine whether the specified branch is to be executed. The conditions that may be
specified are as follows:
NZ Not Zero (Z = 0)
Z Zero (Z = 1)
NC No Carry (C = 0)
C Carry (C = 1)
PO Parity Odd (P = 0)
PE Parity Even (P = 1)
P Plus (S = 0)
M Minus (S = 1)
Thus, the conditional branching instructions are specified as follows:
Jumps Calls Returns
C CC RC (Carry)
INC CNC RNC (No Carry)
JZ CZ RZ (Zero)
JNZ CNZ RNZ (Not Zero)
JP CP RP (Plus)
JM CM RM (Minus)
JPE CPE RPE (Parity Even)
JP0 CPO RPO (Parity Odd)
Two other instructions can affect a branch by replacing the contents or the program counter:
PCHL Move H & L to Program Counter
RST Special Restart Instruction Used
with Interrupts.

EXPERIMENT NO. 4
Aim:- To Study The Keyboard And Display Devices used in Microprocessor in 8085 Kit.
Theory:-
DISPLAY SECTION:-
The display device of microprocessor 8085 is 7-segment LED. 7-segment is the output device
on which you can see the message.
“Friend” when you press Reset key on keyboard.
KEYBOARD:-
Keyboard is the input device which is used to feed the data into the microprocessor. In this
section the total no of keys are 16.
1. SET :- When this key is pressed the display section become blank and the
Dot appears in the address field. Now we can set the address of the memory
location which is to be used.
2. RESET:- When the RESET key is pressed all the internal operations are suspended and
the program counter is cleared.
3. DECREMENT:- this key is used to decrement the address of the memory location is
program counter by 1.
4. EXECUTION:- The Exe. Key is used to execute the program, when we push the EXE key
the microprocessor will load the address that we enter just before pressing execution
key.
5. V1 Key :- This key is used for interrupt.
6. INCREMENT:- This key will increment the memory address in program counter and
sends the code to processor.
7. REGISTERS:- The key allotted to it is 3, this key allows the users to enter the register
name to see the content in that that register.
8. GO key:- The key allotted to it is 8, this key allows the users to enter the memory
location which makes the beginning of the program during execution.
9. A to F key:- A to F key allows the user to enter A to F letters on the LED.
10. 0/SET key:- This key allows user to enter the memory location , to begin entering the
program.
11. Keys 0 to 9 :-This key is used to enter the numbers 0 to 9.
RESET V1
DEC C D E F
V1 V2 V3 V4
EXE 8 9 A B
GO/H L LOAD SAVE
INR 4 5 6 7
SPH SPL PCH PCL
0 1 2 3
SET CODE STEP REG
S/N NAME OF KEY NUMBER ALLOTTED
1 STACK POINTER HIGHER(SPH) 4
2 STACK POINTER LOWER(SPL) 5
3 PROGRAM COUNTER HIGHER(PCH) 6
4 PROGRAM COUNTER LOWER(PCL) 7

OTHER KEYS ON THE KEYBOARD:-
EXPERIMENT NO. 5
Aim:- To write a program to transfer data 15H in all general purpose register.
Program:-
MEMORY HEX. code OPCODE COMMENT

LOCATION
C000 3E MVI A,15H Moves 15H in Accumulator.
C001 15
C002 47 MOV B,A Move the accumulator content to

register B
C003 4F MOV C,A Move the accumulator content to
register C
C004 57 MOV D,A Move the accumulator content to
register D
C005 5F MOV E,A Move the accumulator content to
register E
C006 67 MOV H,A Move the accumulator content to
register H
C007 67 MOV L,A Move the accumulator content to
register L
C008 CF RST Ends the program
Register content BEFORE Execution

A B C D E H L

Register content AFTER Execution
A B C D E H L
Content of memory location BEFORE Execution
Content of memory location AFTER Execution
Lecturer’s Sign
EXPERIMENT NO. 6
Aim:- To write a program to add 02H, 0AH and 05H and store the result in memory location
C070H and in register C also.
Program:-
LOCATION
C000 3E MVI A,02H Moves 15H in Accumulator.
C001 02
C002 C6 ADI 0AH Data is added to the content of

accumulator and store in accu.
C003 0A
C004 C6 ADI 05H Data is added to the content of

accumulator and store in accu.
C005 05
C006 32 STA C070 Content of Accumulator are copied

to memory location specified by
operand.
C007 70
C008 C0
C009 4F MOV C,A Moves the contents from

accumulator to register C.

A B C D E H L

A B C D E H L
Lecturer’s Sign
EXPERIMENT NO. 7
Aim:- To write a program to add content of memory location C080H, and C081H and store
the result in memory location C082H .
Program:-

LOCATION
C000 21 LXI H , C080 Load 16 bit data in register pair
designated in operand.
C001 80
C002 C0
C003 7E MOV A,M Transfers the content from M to

Accumulator.
C004 23 INX H The content of specified registers
are incremented by 1.
C005 86 ADD M Add the contents to accumulator.
C006 32 STA C082 Contents of accumulator are

copied to memory location
specified by operand.
C007 82
C008 C0

A B C D E H L

A B C D E H L
Lecturer’s Sign
EXPERIMENT NO. 8
Aim:- To write a program to find Two’s compliment of a number stored at C070 H and store
the result in C080 H..
Program:-

LOCATION
C001 70
C002 C0

Accumulator.
C004 2F CMA The content of Accumulator are
complimented.
C005 3C INR A Content is incremented by 1.

C007 80
C008 C0

A B C D E H L

A B C D E H L
Lecturer’s Si
EXPERIMENT NO. 9
Aim:- To write a program to subtract the number stored at memory location C040H from
the number stored at C041 Hand store the result at C042 H.
Program:-
LOCATION
C001 41
C002 C0

Accumulator.
C004 2B DCX H The content of specified register
pair are decremented by 1.
C005 96 SUB M Subtract the contents to
accumulator.
C007 42
C008 C0

A B C D E H L

A B C D E H L
Lecturer’s Sign
EXPERIMENT NO. 10
Aim:- To write a program to stored data 00H to 07H in memory location C090 H
respectively.
Program:-
LOCATION
C000 21 LXI H , C090H Load 16 bit data in register pair
C001 90
C002 C0
C003 06 MVI B,00H Move 00H in accumulator.
C004 00
C005 0E MVI C,07H Stores 07H in register C.
C006 07 label
C007 70 MOV M,B Moves the content of B to M
C008 04 INR B Content is incremented by 1.
C009 23 INX H The content of register pair is

incremented by 1.
C010 0D DCR C Content is decremented by 1.

C011 C2 JNZ Jump to label.
C012 07 label
C013 C0

A B C D E H L

A B C D E H L
Lecturer’s Sign
EXPERIMENT NO. 11
Aim:- To write a program to stored data FFH in alternate memory location starting from
C030H in 5 memory location.
Program:-

LOCATION
C000 06 MVI B,05H Moves 05H in register B.

C001 05
C002 21 LXI H, C030H Loads memory adds C030H in the

register pair HL.
C003 30
C004 C0
C005 36 YY: MVI M, FFH Loads FFH in memory address

where address is in register pair
HL.
C006 FF
C007 23 INX H Increment the address in register

pair.
C008 23 INXH Increment the address in register
pair.
C009 05 DCR B Decrement the content in register
B by 1.
C010 C2 JNZ YY Jumps to level YY if value in B is
not 00H.
C011 05
C012 C0

A B C D E H L

A B C D E H L
Lecturer’s Sign

EXPERIMENT NO. 12
Aim:- Assume register B holds 93H and the Accumulator holds 15H illustrate the result of
the instruction ORA B, XRA B, CMA, and ANA B. and store the result in different
registers.
Program:-

LOCATION
C000 06 MVI B,93 Moves 93H in register B.
C001 93
C002 3E MVI A,15 Moves 15H in accumulator.
C003 15
C004 B0 ORA B Content are logically ORed with

the accumulator content.
C005 4F MOV C,A Moves the contents in register C .
C006 3E MVI A,15 Stores 15H in accumulator.
C007 15
C008 A8 XRA B Content are logically EX-ORed
with the accumulator content.
C009 57 MOV D,A Moves the contents in register D .
C010 3E MVI A,15 Stores 15H in accumulator.
C011 15
C012 A0 ANA B Content are logically ANDed with

the accumulator content.
C013 5F MOV E,A Moves the contents in register E
C014 3E MVI A, 15 Stores 15H in accumulator.
C015 15
C016 2F CMA Compliment of an accumulator

content
C017 67 MOV H,A Moves the contents in register D
C018 CF RST Ends the program.

A B C D E H L

A B C D E H L
Lecturer’s Sign
EXPERIMENT NO. 13
Aim:- To write a program to exchange digit of a number stored at C050H and store the new
number at C051H.
Program:-
LOCATION
C000 21 LXI H,CO50H Loads 16 bit data in register pair
C001 50
C002 C0
C003 36 MVI M,56 Stores 56 in accumulator.
C004 56
C005 7E MOV A,M Moves the contents From M to
accumulator.
C006 0F RRC Each binary bit of accumulator is
rotated right .
rotated right .
rotated right .
rotated right .
C010 32 STA C051 Contents of accumulator is copied to
memory location specified by operand.
C011 51
C012 C0


A B C D E H L

A B C D E H L
EXPERIMENT NO. 14
Aim:- To write a program to mask 3rd and 5th bit of number stored at memory location C070 H
store the result in C080 H.
Program:-

LOCATION
C000 21 LXI H,C070 Loads memory address C070H in
register pair HL.
C001 70
C002 C0
C003 3E MVI A, 07H Stores 07H in register A.
C004 07
C005 A6 ANA M Content of accumulator are

logically ANDed with operand.
C007 80
C008 C0

A B C D E H L

A B C D E H L
Lecturer’s Sign
APPENDIX
A. How to Write and Execute the program through the 8085 kit.
1. To write the program on 8085 programming kit :-
RESET
SET
Location from where u wants to store the data.(Ex. C000)
INR
Write the opcode of program
INR
Next opcode
INR
………
………
………
CF.
2. To Execute the program :-
RESET
GO
Location at where from the program is stored(Ex. C000)
EXE.

B. 8085 INSTRUCTION SUMMARY
MNEMONICS OPERAND OPCODE BYTES

ACI DATA CE 2
ADC A 8F 1
ADC B 88 1
ADC C 89 1
ADC D 8A 1
ADC E 8B 1
ADC H 8C 1
ADC L 8D 1
ADC M 8E 1
ADD A 87 1
ADD B 80 1
ADD C 81 1
ADD D 82 1
ADD E 83 1
ADD H 84 1
ADD L 85 1
ADD M 86 1
ADI DATA C6 2
ANA A A7 1
ANA B A0 1
ANA C A1 1
ANA D A2 1
ANA E A3 1
ANA H A4 1
ANA L A5 1
ANA M A6 1
ANI DATA E6 2
CALL LABLE CD 3
CC LABLE DC 3
CM LABLE FC 3
CMA 2F 1
CMC 3F 1
CMP A BF 1
CMP B B8 1
CMP C B9 1
CMP D BA 1
CMP E BB 1
CMP H BC 1

CMP L BD 1
CMP M BE 1
CNC LABLE D4 3
CNZ LABLE C4 3
CP LABLE F4 3
CPE LABLE EC 3
CPI DATA EE 2
CPO LABLE E4 3
CZ LABLE CC 3
DAA 27 1
DAD B O9 1
DAD D 19 1
DAD H 29 1
DAD SP 39 1
DCR A 3D 1
DCR B O5 1
DCR C OD 1
DCR D 15 1
DCR E 1D 1
DCR H 25 1
DCR L 2D 1
DCR M 35 1
DCX B OB 1
DCX D 1B 1
DCX H 2B 1
DCX SP 3B 1
DI F3 1
EI FB 1
HLT 76 1
IN PORT ADDR. DB 2
INR A 3C 1
INR B O4 1
INR C OC 1
INR D 14 1
INR E 1C 1
INR H 24 1
INR L 2C 1
INR M 34 1
INX B O3 1
INX D 13 1
INX H 23 1
INX SP 33 1
JC LABLE DA 3
JM LABLE FA 3

JMP LABLE C3 3
JNC LABLE D2 3
JNZ LABLE C2 3
JP LABLE F2 3
JPE LABLE EA 3
JPO LABLE E2 3
JZ LABLE CA 3
LDA ADDR. 3A 3
LDAX B OA 1
LDAX D 1A 1
LHLD ADDR. 2A 3
LXI B O1 3
LXI D 11 3
LXI H 21 3
LXI SP 31 3
MOV A,A 7F 1
MOV A,B 78 1
MOV A,C 79 1
MOV A,D 7A 1
MOV A,E 7B 1
MOV A,H 7C 1
MOV A,L 7D 1
MOV A,M 7E 1
MOV B,A 47 1
MOV B,B 40 1
MOV B,C 41 1
MOV B,D 42 1
MOV B,E 43 1
MOV B,H 44 1
MOV B,L 45 1
MOV B,M 46 1
MOV C,A 4F 1
MOV C,B 48 1
MOV C,C 49 1
MOV C,D 4A 1
MOV C,E 4B 1
MOV C,H 4C 1
MOV C,L 4D 1
MOV C,M 4E 1
MOV D,A 57 1
MOV D,B 50 1
MOV D,C 51 1
MOV D,D 52 1
MOV D,E 53 1

MOV D,H 54 1
MOV D,L 55 1
MOV D,M 56 1
MOV E,A 5F 1
MOV E,B 58 1
MOV E,C 59 1
MOV E,D 5A 1
MOV E,E 5B 1
MOV E,H 5C 1
MOV E,L 5D 1
MOV E,M 5E 1
MOV H,A 67 1
MOV H,B 60 1
MOV H,C 61 1
MOV H,D 62 1
MOV H,E 63 1
MOV H,H 64 1
MOV H,L 65 1
MOV H,M 66 1
MOV L,A 6F 1
MOV L,B 68 1
MOV L,C 69 1
MOV L,D 6A 1
MOV L,E 6B 1
MOV L,H 6C 1
MOV L,L 6D 1
MOV L,M 6E 1
MOV M,A 77 1
MOV M,B 70 1
MOV M,C 71 1
MOV M,D 72 1
MOV M,E 73 1
MOV M,H 74 1
MOV M,L 75 1
MVI A,DATA 3E 2
MVI B,DATA O6 2
MVI C,DATA OE 2
MVI D,DATA 16 2
MVI E,DATA 1E 2
MVI H,DATA 26 2
MVI L,DATA 2E 2
MVI M,DATA 36 2
NOP OO 1
ORA A B7

ORA B B0 1
ORA C B1 1
ORA D B2 1
ORA E B3 1
ORA H B4 1
ORA L B5 1
ORA M B6 1
ORI DATA F6 2
OUT PORT ADDR. D3 2
PCHL E9 1
POP B C1 1
POP D D1 1
POP H E1 1
POP PSW F1 1
PUSH B C5 1
PUSH D D5 1
PUSH H E5 1
PUSH PSW F5 1
RAL 17 1
RAR 1F 1
RC D8 1
RET C9 1
RIM 20 1
RLC O7 1
RM F8 1
RNC D0 1
RNZ C0 1
RP F0 1
RPE E8 1
RPO E0 1
RRC 0F 1
RST 1 C7 1
RST 0 F7 1
RST 2 D7 1
RST 3 DF 1
RST 4 E7 1
RST 5 EF 1
RST 6 F7 1
RST 7 FF 1
RZ C8 1
SBB A 9F 1
SBB B 98 1
SBB C 99 1
SBB D 9A 1

SBB E 9B 1
SBB H 9C 1
SBB L 9D 1
SBB M 9E 1
SBI DATA DE 2
SHLD ADDR. 22 3
SIM 30 1
SPHL F9 1
STA ADDR. 32 3
STAX B 2 1
STAX D 12 1
STC 37 1
SUB A 97 1
SUB B 90 1
SUB C 91 1
SUB D 92 1
SUB E 93 1
SUB H 94 1
SUB L 95 1
SUB M 96 1
SUI DATA D6 2
XCHG EB 1
XRA A AF 1
XRA B A8 1
XRA C A9 1
XRA D AA 1
XRA E AB 1
XRA H AC 1
XRA L AD 1
XRI M AE 1
XRI DATA EE 1
XTHL E3 1

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Kandivali (W) Mumbai – 400067

MICROPROCESSOR AND MICROCONTROLLER

KES SHROFF COLLEGE Page 1

S/N NAME OF EXPERIMENT DATE SIGN.

2 To Study The Architecture of Microprocessor 8085.

3 To Study The Addressing modes and Instruction Set for

KES SHROFF COLLEGE Page 2

Aim:- To Study The pin diagram of Microprocessor 8085.

Theory:- The 8085 is an 8 bit general purpose microprocessor capable of addressing 64 k of

3. CONTROL AND STATUS SIGNALS:-

KES SHROFF COLLEGE Page 3

4. POWER SUPPLY AND CLOCK FREQUENCY :-

VCC :- + 5 v power supply.

Vss :- Ground reference.

5. EXTERNALLY INITIATED SIGNALS INCLUDING INTERRUPTS:-

KES SHROFF COLLEGE Page 4

KES SHROFF COLLEGE Page 5

KES SHROFF COLLEGE Page 6

Sr. Pin Pin name Purpose Status

3 4 SOD Serial Output Data Output

4 5 SID Serial Input Data Input

5 6 TRAP Non Maskable Interrupt Input

6 7,8,9 RST Maskable Interrupt Input

11 21 to A8 to A15 Address Bus higher Order Output

KES SHROFF COLLEGE Page 7

14 31 Write Control Purpose Output

18 36 System Reset Output

22 38 HLDA Hold Acknowledgement Input

21 39 HOLD Hold Request Input

22 40 VCC Power Supply +5v DC Input

Aim:- To Study The Architecture of Microprocessor 8085.

Arithmetic Logic Unit:-

KES SHROFF COLLEGE Page 8

Program Counter (PC):-

Stack Pointer (SP):-

KES SHROFF COLLEGE Page 9

Address Bus Address data bus

Memory Address Register :-

KES SHROFF COLLEGE Page 10

General Purpose Registers:-

8085 System Bus

KES SHROFF COLLEGE Page 11

Instructions can be categorized according to their method of addressing the hardware

Instruction Set Classification

KES SHROFF COLLEGE Page 12

Data Transfer (Copy) Operations

Increment/Decrement - The 8-bit contents of a register or a memory location can be

AND, OR Exclusive-OR - Any 8-bit number, or the contents of a register, or of a memory

Data Transfer Group:

MVI Move Immediate

LDA Load Accumulator Directly from Memory

STA Store Accumulator Directly in Memory

LHLD Load H & L Registers Directly from Memory

SHLD Store H & L Registers Directly in Memory

LXI Load Register Pair with Immediate data

LDAX Load Accumulator from Address in Register Pair

STAX Store Accumulator in Address in Register Pair

KES SHROFF COLLEGE Page 14

XTHL Exchange Top of Stack with H & L

The arithmetic instructions add, subtract, increment, or decrement data in registers or

ADD Add to Accumulator

ADI Add Immediate Data to Accumulator

ADC Add to Accumulator Using Carry Flag