16 BIT FULL ADDER

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Contents
INTRODUCTION……………………………………………………..3
BLOCK DIAGRAM …………………………………………………..4
SUB UNIT……………………………………………………………….7
ENVIRONMENT ……………………………………………………..8
RESULTS ………………………………………………………………..11
CONCLUSION ………………………………………………………...12

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INTRODUCTION
An adder is a digital logic circuit that performs addition of numbers. In other words,
Digital Adder can be defined as a digital device that is capable of adding two digital
n-bit binary numbers, where n is the number of binary bits. Digital adder adds two
binary numbers A and B to produce a sum S and a carry C.
Adders can be used to calculate addresses of locations and indices in
processors and computers. The adders can be constructed for performing numerical
representations like excess-3 or binary coded decimal. Adders are generally
classified into two types: half adder and full adder.
The Full adder circuit has three inputs: A, B and Cin which add two input
digits and generate a carry and sum. Adders are widely used to perform addition,
subtraction, multiplication and division. The process of subtraction is also performed
by adders by adding 2’s complement of addend. The one bit full adder forms an
integral part of the other higher bit full adders thereby forming a ripple carry adder.
However Carry Look Ahead Adder can be used to perform addition without
significant delay.
TYPES OF MULTI- BIT ADDER
CARRY LOOK AHEAD ADDER

A carry-look ahead adder (CLA) or fast adder is a special type of adder

mostly used to perform fast calculations. A carry-look ahead adder improves speed
as it does not has to depend on the carry bits to be generated. The hardware
requirement of carry look ahead adder is comparatively more as compared to other
adders.
A carry look-ahead adder reduces the delay as it is proportional to log n, but
for large numbers this is not case, because even when carry look-ahead is
implemented, the distance traversed by the signal on the chip increases with n, and
propagation delays also increase at the same rate.

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CARRY SAVE ADDER
If we want to compute the sum of three or more numbers, it can be advantageous to
not propagate the carry result. Instead, we can use three-input adders thereby
generating two results: a sum and a carry. The sum and the carry are fed into two
inputs of the next 3-number adder without having to wait for propagation of a carry
signal. After all stages of addition, a conventional adder (such as the ripple-carry or
the look ahead) need to be used to combine the final sum and carry results

BLOCK DIAGRAM

16-bit Full adder using two 8-bit Full adder

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In 16 bit Full adder, two set of inputs namely A and B each 16 bits in length and one
bit Cin are given to 16 bit Full adder. The outputs generated are sum which is 16 bits
in length and carry out, Cout, 1 bit in length. The 16 bit Full adder is implemented
by using two 8 bit Full adders where the Carry out of first 8 bit full adder is given as
Cin to another 8 bit full adder.

TRUTH TABLE

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8-bit Full adder using eight Full bit adder

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A cascade of 8 full bit adders is designed in the form of ripple carry adder where
carry out of previous full bit adder is given as carry in of next full bit adder .Here
because of carry propagation delay ,output is obtained after a substantial amount
of delay. For an 8- bit parallel adder, there must be 8 number of full adder circuits.
A ripple carry adder is a logic circuit in which the carry-out of each full adder is the
carry in of the succeeding next most significant full adder. It is called a ripple carry
adder because each carry bit gets rippled into the next stage. In a ripple carry
adder the sum and carry out bits of any half adder stage is not valid until the carry
in of that stage occurs.

SUB UNIT
1-bit Full adder using And, Ex-or and OR gate

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The basic integral part of 1 bit full adder consists of two And gates, two Ex-or
gates and OR gate .The logic diagram is as shown above. Three gate level delays
are involved as is evident from the diagram. The sum is obtained as

SUM = (A ⊕ B) ⊕ Cin

CARRY-OUT = A.B + Cin (A ⊕ B)

ENVIRONMENT
Virtuoso by Cadence is being used as the design environment for the development
of 16-bit Full Adder. Cadence Virtuoso Analog Design Environment is the advanced
environment for simulation and design for the Virtuoso platform
User is being provided with a provision to create its own Library of circuits that
it need to implement. As far as our 16-bit Full Adder is concerned, we have used
‘gpk180’ library based MOSFETs that are basically MOSFETs developed with
180nm Technology Node.

For Realizing the above mentioned16-bit Full Adder we have developed smaller
modules like AND, OR and EX-OR as shown in the block diagram section using
this ‘gpk180’ library file. We are also being provided with inbuilt library named

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‘analoglib’ for realization of various power sources like VDD, GND, VDC,
VPULSE(These are various DC sources).

16-bit Full Adder in virtuoso

8 bit Full Adder in Virtuoso

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RESULTS
In this section, we demons11/8/17trate the simulation results of the Full Adder
using Virtuoso Tool. 16-Bit Full adder output waveforms or simulation results are
very difficult to be shown as the waveforms will be clubbed together which is very
difficult to be analyzed. However for the sake of simplicity, we are showing the
output of 8 bit Full Adder.

For Simulation, we launch ADE (Analog Design Environment) for simulation

purpose. ADE L provides us the analysis of many parameters from which we are
going to use Transient analysis.

Transient Analysis will provide us with the provision to see the output
corresponding to various input combination as a function of time

Here, we consider transient analysis of a Full Adder where input variables are
A and B and output Sum and Cout. The below figure shows simulation results for
the same

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Output of 8 bit Full Adder

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Output of 8 bit Full Adder

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CONCLUSIONS
In the task that is given to us we designed 16-bit Full Adder realized in Virtuoso
Environment. We got acquainted about the basic fundamentals about implantation
of any VLSI design in such industry standard environment. We also learned how to
design basic gates using this software which will be further useful for
implementation of complex circuits using such design environment.

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