Professional Documents
Culture Documents
Ee231 Lec16 18
Ee231 Lec16 18
Ee231 Lec16 18
Lecture 16-18
Chapter 4
DC Biasing – BJTs
Introduction
• It is wrong to assume that transistor can raise the level of
any AC input without the assistance of an external (DC)
energy source
– The amplified output AC power level is the result of energy from
the applied DC sources
• Hence the design of any electronic amplifier has two
components
– The DC portion & the AC portion
• Using the superposition theorem, the analysis for DC
conditions can be made separately from the AC response
– Though components/parameters (resistors, capacitors etc)
chosen for the required DC levels will affect the AC response
• During the design process, a number of
mathematical relations will be used but the most
frequent ones are
No bias → Device
is completely OFF
Approximation
Actual Approximate
Load Line Analysis - Fixed Bias
• Plot the network output characteristics
• Write the KVL equation for output
– Superimpose the curve defined by the equation on output
characteristics of the network
• Intersection of the two curves define actual operating
conditions or operating point for the network
• Load line basically represents response of a linear circuit to
which a non linear device in question is connected
• The operating point or the Q-point is the point where the
parameters of linear circuit match with parameters of the
non-linear device depending upon how they are connected
• In a fixed bias network, RC will define the slope of network
equation
– Smaller RC (i.e; load resistance in this case) → Steeper curve
slope Y-intercept
β = 50
Example 4.11, Pg: 181
• Determine ICQ and VCEQ using exact and
approximate techniques
Transistor Saturation & Load Line
Analysis
• The output circuits of voltage-divider and
emitter-bias are identical
– So, the technique and formulas for finding the
saturation current ICsat and the load line analysis
will also be same
Collector Feedback Configuration
• Stability of the Q-point against
changes in β can also be achieved
by introducing a feedback path
from collector to base
• Where
− V’ = VCC – VBE for
• Fixed-bias, emitter-bias and collector feedback bias
− R’ = 0 for fixed bias
− R’ = (β + 1)RE or βRE in emitter bias
− R’ = RE + RC in collector feedback bias
• As a general rule, if βR’ >>RB ;Q-point will be less
sensitive to changes in β
• R’ is typically larger for a collector feedback
configuration than for an emitter-bias configuration
Example 4.12, Pg: 184
• Find ICQ and VCEQ
Example 4.13, Pg: 185
• Repeat example 4.12 for a β = 135 (50% increase
in β). Also find VC
– Greater β means greater magnitude of βR’ as
compared to RB and thus greater stability or lesser
sensitivity of Q-point against the changes in β
Saturation Conditions & Load Line
• Once the approximation IC’ = IC is made then
– Equation for saturation current is the same as
obtained for voltage-divider bias and emitter-bias