LATCH D

entity latchd is
Port ( D : in STD_LOGIC;
Enable : in STD_LOGIC;
Q : out STD_LOGIC);
end latchd;

architecture Behavioral of latchd is

signal temp : STD_LOGIC;

begin

process (D, Enable)

begin
if (Enable = '1') then
q <= d;
temp <= d;
else
q <= temp;
end if;
end process;

end Behavioral;