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    Successive Approximation ADC: - Conversion Steps

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    GREATJUSTGREAT
    Successive approximation ADC uses a SAR to iteratively approximate an input voltage. It works as follows: 1. SAR initially sets the MSB and outputs an analog voltage. 2. If the output voltage is lower than the input, MSB is set to 1. Otherwise it is set to 0. 3. The next less significant bit is then tried until the output voltage equals the input in a decision tree like process. 4. This continues for n conversion steps, with each step taking one clock period to complete the conversion.

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    Successive Approximation ADC: - Conversion Steps

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    GREATJUSTGREAT
    15 views3 pages
    Successive approximation ADC uses a SAR to iteratively approximate an input voltage. It works as follows: 1. SAR initially sets the MSB and outputs an analog voltage. 2. If the output voltage is lower than the input, MSB is set to 1. Otherwise it is set to 0. 3. The next less significant bit is then tried until the output voltage equals the input in a decision tree like process. 4. This continues for n conversion steps, with each step taking one clock period to complete the conversion.

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    dac v sar

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    dac v sar

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    Successive approximation ADC uses a SAR to iteratively approximate an input voltage. It works as follows: 1. SAR initially sets the MSB and outputs an analog voltage. 2. If the output voltage is lower than the input, MSB is set to 1. Otherwise it is set to 0. 3. The next less significant bit is then tried until the output voltage equals the input in a decision tree like process. 4. This continues for n conversion steps, with each step taking one clock period to complete the conversion.

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    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as pdf or txt
    15 views3 pages

    Successive Approximation ADC: - Conversion Steps

    Uploaded by

    GREATJUSTGREAT
    Successive approximation ADC uses a SAR to iteratively approximate an input voltage. It works as follows: 1. SAR initially sets the MSB and outputs an analog voltage. 2. If the output voltage is lower than the input, MSB is set to 1. Otherwise it is set to 0. 3. The next less significant bit is then tried until the output voltage equals the input in a decision tree like process. 4. This continues for n conversion steps, with each step taking one clock period to complete the conversion.

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    © All Rights Reserved
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    of 3

    Successive Approximation ADC

    • Circuit waveform
    • Conversion Steps
    • 1. initially SAR provides an output
    corresponding to have the range
    (100..0)
    • 2. DAC outputs an analog voltage
    VDAC which if found smaller than
    Vs , then MSB is set to “1”,
    • Logic Flow (decision Tree)
    otherwise MSB=0
    • 3. IF MSB is reset to 0, next bit is
    tried until VDAC =Vs
    • 4. n -conversion steps, each takes
    a clock period
    73
    Example
    • VFSR=5V, 4 bit, SAR • (2) set b2=1, b3=b4=0
    • 1100 ==>
    ADC, Vs=Vin=3.127 V, VDAC=12/2^4*VREF=3.75V
    explain how conversion • Check VDAC > Vs ? (3.75 >
    is done? 3.127? ==> Yes ==> Reset b2=0
    • (3) set b3=1, b4=0
    • Solution:
    • 1010 ==>
    • Suppose Output is VDAC=10/2^4*VREF=3.1255V
    b1b2b3b4 • Check VDAC > Vs ? (3.125 >
    • (1) let b1=1, b2=b3=b4=0 3.127? ==> No ==> set b3=1
    • 1000 ==> • (4) set b4=1, 1011 ==>
    VDAC=8/2^4*VREF=2.5V VDAC=11/2^4*VREF=3.4375V
    • Check VDAC > Vs ? (2.5 > • Check VDAC > Vs ? (3.4375 >
    3.127? ==> NO ==> set b1=1 3.127? ==> Yes ==> Reset b4=0
    • Final Result: 1010
    ADC Comparison
    Characteristic Flash SAR Integrating

    Throughput 1 2 35
    Samples/sec

    Resolution 3 2 1

    Latency 1 2 35
    Sample to
    output
    Tc
    Power Constant Variable Constant
    consumption High Low Low

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