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Modulation Schemes of the Three-Phase

Impedance Source Inverters – Part II:
Comparative Assessment

Article in IEEE Transactions on Industrial Electronics · January 2018

DOI: 10.1109/TIE.2018.2793205

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IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Modulation Schemes of the Three-Phase
Impedance Source Inverters – Part II:
Comparative Assessment
Ahmed Abdelhakim, Student Member, IEEE, Frede Blaabjerg, Fellow, IEEE,
and Paolo Mattavelli, Fellow, IEEE
Abstract—Three-phase impedance source inverters can
be modulated using many modulation schemes, which
are basically classified into two categories: three-phase-
leg shoot-through-based (3P) and single-phase-leg shoot-
through-based (1P) modulation schemes. These different
modulation schemes have been comprehensively reviewed
in Part I. Hence, in this paper, a comparative assess-
ment among these different modulation schemes is intro-
duced using the conventional Z-source inverter (ZSI). In
this comparison, the ZSI voltage gain and stresses, cur-
rent stresses, effective switching frequency of its different
parts, spectrum of its output voltage, and switching losses
are considered for each modulation scheme. Such compar-
ative assessment introduces an effective benchmark for the
researchers in order to determine the differences among
these various modulation schemes, and easily select the
appropriate one for their application. Finally, the state-of-
the-art modulation schemes are experimentally assessed
using a 3 kVA three-phase ZSI, where the shown results
are consistent with the presented discussions and compar-
isons.
Index Terms—Continuous modulation, discontinuous
modulation, impedance network, impedance source in-
verter, shoot-through, sinusoidal, space vector, third-
harmonic, Z-source inverter.
I. I NTRODUCTION
MPEDANCE SOURCE INVERTERS are considered as the
I orbit of scientific research for many researchers, especially
in the last couple of years. This is evident in the large arisen
evolution [1]–[3] and the deeper penetration of these power
inverters into many applications [4]–[18]. This family of power
inverters has gained such high attention due to the merit
of embracing the boosting capability within their inversion
operation, which makes them a strong alternative to the two-
stage configuration [2], [19], [20].
Since the first release of the three-phase Z-source in-
verter (ZSI), which represents the first impedance source
inverter, many modified and improved topologies have been
proposed [1], [21]. Although these many alternative structures
to the original three-phase ZSI, most of them are using its
Manuscript received Aug 29, 2017; revised Nov 1, 2017; accepted
Dec 27, 2017. (Corresponding author: Ahmed Abdelhakim.)
A. Abdelhakim and P. Mattavelli are with the Department of Manage-
ment and Engineering, University of Padova, Vicenza 36100, Italy (e-
mail: ahmed.a.abdelrazek@ieee.org, paolo.mattavelli@unipd.it).
F. Blaabjerg is with the Department of Energy Technology, Aalborg
University, Aalborg 9220, Denmark (e-mail: fbl@et.aau.dk).
Sa,u Sb,u Sc,u
Dn Ln iL
vC
Cn
iin va
Vin vdc vb
vc
vC
Cn
L
iL n Sa,l Sb,l Sc,l
Fig. 1. Three-phase Z-source inverter (ZSI).
basic principle of operation. Such basic operation implies the
utilization of an extra switching state, called shoot-through
(ST) state, to the standard eight states of the space vector
modulation (SVM) scheme used with the traditional voltage
source inverters (VSIs). During this ST state, the B6-bridge
becomes equivalent to a short circuit, and this state is permis-
sible in the impedance source inverters due to the utilization
of an impedance network as shown in Fig. 1. Note that the
ST state represents an additional zero state and it must be
carefully inserted inside the zero states, in order not to affect
the active states and the output voltage consequently.
Furthermore, many modulation schemes have been studied
and proposed in order to enhance the performance of this
family of power inverters, like the conventional modulation
schemes, which are discussed in [3], [20], [22], [23]. Mean-
while, the possible modulation schemes that can be used
are not limited to the prior used schemes, i.e. many other
modulation schemes have been proposed and studied, such as
the different SVM schemes presented in [24]–[26] and the hy-
brid modulation proposed in [27]. In general, the three-phase
impedance source inverters modulation schemes are classified
into two categories: three-phase-leg-ST-based (3P) and single-
phase-leg-ST-based (1P) modulation schemes. In Part I [28], a
comprehensive review for these different modulation schemes
has been introduced, from which the operation and character-
istics of each modulation scheme can be recognized. In this
paper, i.e. Part II, an important comparative assessment among
all of these different modulation schemes is introduced. In this
comparative assessment, the ZSI voltage gain and stresses,
current stresses, effective switching frequency of its different
parts, spectrum of its output voltage, and switching losses are
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
considered for each modulation scheme. Moreover, the state-
of-the-art modulation schemes are experimentally assessed
using a 3 kVA three-phase ZSI.
The rest of this paper is organized as follows: Section II
recalls the introduced classification of the impedance source
inverter modulation schemes, which has been discussed in
Part I [28]. Then, a comparison among these different mod-
ulation schemes is done in Section III, which includes an
experimental assessment of the state-of-the-art modulation
schemes. Finally, the conclusions are drawn in Section V.
II. R EVIEW OF THE T HREE -P HASE ZSI S M ODULATION
S CHEMES C LASSIFICATION
From the introduced discussion in Part I [28], the three-
phase ZSIs modulation schemes are basically classified ac-
cording to their method of achieving the ST state as follows:
1) three-phase-leg ST-based (3P) modulation schemes [28];
2) single-phase-leg ST-based (1P) modulation
schemes [28].
Then, each of these two categories is classified into two
subcategories as follows:
1) continuous modulation schemes;
2) discontinuous modulation schemes.
Each of these two subcategories can further be classified into
three subcategories at most as follows:
1) using the simple-boost (SB) control;
2) using the maximum-boost (MB) control;
3) using the constant-boost (SB) control.
Finally, it is possible to use different reference signals
under these subcategories (see Fig. 3 in Part I [28]). These
reference signals could be taken from the sinusoidal mod-
ulation (SM) [20], the third-harmonic injected modulation
(THM) [22], the SVM [24], the modified SVM (MSVM) [29],
the dc-clamped modulation (DCCM) [26], or the hybrid mod-
ulation (HM) [27].
Note that from the introduced review in Part I, the modu-
lation schemes can be divided into three groups (G1 , G2 , and
G2 ), where each group has the same average ST duty cycle
(DST ), i.e. the same voltage gain capability.
III. C OMPARISON A MONG THE D IFFERENT M ODULATION
S CHEMES
In this section, the various modulation schemes of the
three-phase ZSIs are compared in terms of several aspects.
These aspects include the implementation complexity of each
modulation scheme, voltage gain and stresses, current stresses,
simulated currents in the upper and the lower switches of one
phase-leg, effective switching frequency of its different parts,
output voltage spectrum, and switching losses. In the following
subsections, these aspects are discussed in details.
Note that a 3 kVA three-phase ZSI has been designed and
simulated using MATLAB/PLECS in order to be used in the
this comparative assessment, where the used parameters are
summarized in Table I.
In this 3 kVA three-phase ZSI, the inductance (L) of the
impedance network has been increased for the modulation
schemes under group G3 due to the ST duty cycle variation
and the used low fundamental frequency (f1 ).
A. Implementation Complexity
One of the important aspects that must be noticed for these
different modulation schemes is the implementation complex-
ity compared to the standard VSI modulation schemes.
Table II compares these various modulation schemes in
terms of number of reference signals and the implementation
complexity. Such complexity is determined based on the
number of employed reference signals and the complexity of
obtaining these reference signals compared with the conven-
tional sinusoidal reference signals.
Table II shows that the 1P/SB/MSVM and 1P/MB/MSVM
schemes give the lowest complexity of implementation due
to the utilization of three reference signals, which can be
easily obtained from the conventional sinusoidal waveforms.
Meanwhile, the 1P/MB/HM scheme introduces the highest
complexity as it utilizes six reference signals and they require
a special implementation.
B. Voltage and Current Stresses
1) Voltage Stresses: Table II introduces a summary of
the normalized peak dc-link voltage (v̂dc /Vin ), the normal-
ized capacitor voltage (VC /Vin ), and the normalized output
fundamental peak phase voltage (V̂ϕ1 /Vin ) for the different
modulation schemes according to Part I [28], where Vin is the
input voltage.
The voltage stresses across the different switches of the
ZSI is equal to the peak dc-link voltage v̂dc . Hence, Fig. 2(a)
shows the variation of v̂dc /Vin versus the variation of V̂ϕ1 /Vin ,
while Fig. 2(b) shows the variation of v̂dc versus the variation
of Vin for a constant output fundamental RMS phase voltage
(Vϕ1 ) of 220 V . From Fig. 2 it can be seen that the modulation
schemes under group G3 results in the lowest possible voltage
stresses for the same output voltage, but with a variable
ST duty cycle during the fundamental period. Meanwhile,
the modulation schemes under group G2 results in slightly
higher voltage stresses, but with a constant ST duty cycle.
On the other hand, the modulation schemes under group G1
introduces much higher voltage stresses and this makes them
not suitable compared to the modulation schemes under group
G2 .
It is worth to note that the variation of the ST duty cycle
results in a low frequency component in the dc-side, and
this component increases the size of the impedance network.
Finally, Fig. 2(c) shows the variation of the normalized average
capacitor voltage VC /Vin versus the variation of V̂ϕ1 /Vin .
2) Current Stresses: Table III shows the maximum current
through the different switches of the ZSI as a function of
the output fundamental peak phase current (Iϕ1 ), the average
inductor current (IL ), and the peak-to-peak inductor current
ripple (∆IL ). Furthermore, it shows the ST commutation
period for the different switches, in which the 3P modulation
schemes are continuously commutating at one-third of the ST
current, while the 1P modulation schemes are commutating
at the ST current. Note that the ST commutation period is
introduced as a function of the fundamental period (T1 ), and
the ST current is twice the inductor current (iL ).
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE I
PARAMETERS OF THE 3 kVA Z-S OURCE I NVERTER (ZSI)

Input dc voltage (Vin ) 400 V 0.3 mH (G1 &G2 )(?)

Impedance network Ln
Output RMS phase voltage (Vϕ1 ) 220 V 10 mH (G3 )(?)
Fundamental frequency (f1 ) 50 Hz 20 µF (G1 &G2 )(?)
Impedance network Cn
Switching frequency (fs ) 50 kHz 500 µF (G3 )(?)
Inductance of the output LC filter (Lf ) 1.0 mH Capacitance of the output LC filter (Cf ) 4.7 µF
(?) Note that the modulation schemes are divided into three groups (G1 , G2 , and G2 ), where each group has the same
average ST duty cycle (DST ), i.e. the same voltage gain.

TABLE II
C OMPARISON B ETWEEN D IFFERENT M ODULATION S CHEMES IN T ERMS OF THE N UMBER OF R EFERENCE S IGNALS , I MPLEMENTATION
C OMPLEXITY, AND VOLTAGE G AINS

3P modulation schemes 1P modulation schemes

(10) 3P/MB/+DCCM

(21) 1P/MB/+DCCM
(11) 3P/MB/-DCCM

(22) 1P/MB/-DCCM
(19) 1P/SB/+DCCM
(18) 1P/MB/MSVM

(20) 1P/SB/-DCCM
(15) 1P/SB/MSVM
(8) 3P/SB/+DCCM

(9) 3P/SB/-DCCM

(16) 1P/MB/THM

(17) 1P/MB/SVM
(13) 1P/SB/THM

(14) 1P/SB/SVM
(5) 3P/MB/THM

(6) 3P/MB/SVM

(23) 1P/MB/HM
(2) 3P/SB/THM

(3) 3P/SB/SVM

(12) 1P/SB/SM
(4) 3P/MB/SM

(7) 3P/CB/SM
(1) 3P/SB/SM

A 5 4 6 3 6 3 6

Very Very Very

High

High
B Normal Low High High
low low high
C No No Yes No(2) Yes No No Yes No Yes
Group(?) G1 G2 G3 G2 G3 G1 G2 G3 G2 G3
(A) Number of Reference signals (B) Implementation complexity (C) Variation of the ST duty cycle during the fundamental period
(?) The modulation schemes are divided into three groups (G , G , and G ), where each group has the same average ST duty cycle (D
1 2 2 ST ),
i.e. the same voltage gain.
v̂dc 1 VC M V̂ϕ1 M
G1 −→ = , = , =
Vin 2M − 1 Vin 2M√− 1 Vin 4M − 2
v̂dc 1 VC 3M V̂ϕ1 M
G2 −→ = √ , = √ , = √
Vin 3M − 1 Vin 2 3M √ −2 Vin 2 3M − 2
v̂dc π VC 3 3M V̂ϕ1 πM
G3 −→ = √ , = √ , = √
Vin 3 3M − π Vin 6 3M − 2π Vin 6 3M − 2π

4 1.0 4
G1 G1 G1
0.9
3 3 G2
G2 0.8
v̂dc (kV )
v̂dc /Vin

VC /Vin

2 0.7 2 G3
G3 0.6 G2
1 1
0.5
G3
0 0.4 0
0.0 0.5 1.0 1.5 2.0 200 300 400 500 600 0.0 0.5 1.0 1.5 2.0
V̂ϕ1 /Vin Vin (V ) V̂ϕ1 /Vin
(a) (b) (c)
Fig. 2. Variation of the peak dc-link voltage (v̂dc ) and the average capacitor voltage (VC ) versus the variation of the output fundamental peak
phase voltage(V̂ϕ1 ) and the input voltage (Vin ). (a) Variation of v̂dc /Vin versus the variation of V̂ϕ1 /Vin ; (b) variation of v̂dc versus the variation of
Vin for a constant output fundamental RMS phase voltage (Vϕ1 ) of 220 V ; and (c) variation of VC /Vin versus the variation of V̂ϕ1 /Vin . Note that
the modulation schemes are divided into three groups (G1 , G2 , and G2 ), where each group has the same average ST duty cycle (DST ), i.e. the
same voltage.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

20 20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10 10

0 0 0 0
20 20 20 20

10 10 10 10

0 0 0 0
0 t T1 0 t T1 0 t T1 0 t T1
(a) 3P/SB/SM scheme. (b) 3P/SB/THM scheme. (c) 3P/SB/SVM scheme. (d) 3P/MB/SM scheme.

20 20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10 10

0 0 0 0
20 20 20 20

10 10 10 10

0 0 0 0
0 t T1 0 t T1 0 t T1 0 t T1
(e) 3P/MB/THM scheme. (f) 3P/MB/SVM scheme. (g) 3P/CB/SM scheme. (h) 3P/SB/+DCCM scheme.

20 20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10 10

0 0 0 0
20 20 20 20

10 10 10 10

0 0 0 0
0 t T1 0 t T1 0 t T1 0 t T1
(i) 3P/SB/-DCCM scheme. (j) 3P/MB/+DCCM scheme. (k) 3P/MB/-DCCM scheme. (l) 1P/SB/SM scheme.

20 20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10 10

0 0 0 0
20 20 20 20

10 10 10 10

0 0 0 0
0 t T1 0 t T1 0 t T1 0 t T1
(m) 1P/SB/THM scheme. (n) 1P/SB/SVM scheme. (o) 1P/SB/MSVM scheme. (p) 1P/MB/THM scheme.

20 20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10 10

0 0 0 0
20 20 20 20

10 10 10 10

0 0 0 0
0 t T1 0 t T1 0 t T1 0 t T1
(q) 1P/MB/SVM scheme. (r) 1P/MB/MSVM scheme. (s) 1P/SB/+DCCM scheme. (t) 1P/SB/-DCCM scheme.

20 20 20
iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

iSa,l (A) iSa,u (A)

10 10 10

0 0 0
20 20 20

10 10 10

0 0 0
0 t T1 0 t T1 0 t T1
(u) 1P/MB/+DCCM scheme. (v) 1P/MB/-DCCM scheme. (w) 1P/MB/HM scheme.
Fig. 3. Simulated currents in the three-phase ZSI upper and the lower switches of phase a (iSa,u and iSa,l ) using the different modulation schemes.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE III
C URRENT S TRESSES OF THE ZSI D IFFERENT S WITCHES U SING THE D IFFERENT M ODULATION S CHEMES

3P modulation schemes 1P modulation schemes

(10) 3P/MB/+DCCM

(21) 1P/MB/+DCCM
(11) 3P/MB/-DCCM

(22) 1P/MB/-DCCM
(19) 1P/SB/+DCCM
(18) 1P/MB/MSVM

(20) 1P/SB/-DCCM
(15) 1P/SB/MSVM
(8) 3P/SB/+DCCM

(9) 3P/SB/-DCCM

(16) 1P/MB/THM

(17) 1P/MB/SVM
(13) 1P/SB/THM

(14) 1P/SB/SVM
(5) 3P/MB/THM

(6) 3P/MB/SVM

(23) 1P/MB/HM
(2) 3P/SB/THM

(3) 3P/SB/SVM

(12) 1P/SB/SM
(4) 3P/MB/SM

(7) 3P/CB/SM
(1) 3P/SB/SM

(1) 2IL ∆IL

îS Iϕ1 + + Iϕ1 + 2IL + ∆IL
abc 3 3
(1)
îDn 2IL + ∆IL

TST,u (2) 2 1 2 2 1
1 0
T1 2 5 3 3 3 2 1 2 3 3 1
1 1
TST,l (2) 3 6 2 2 1 1 3 3 3 1 2 3
1
T1 3 3 3 3 3 3
(1) Maximum current in the B6-bridge switches (îSabc ) and the input diode (îDn )
(2) Normalized ST duration for the upper switches (TST,u /T1 ) and the lower switches (TST,l /T1 )
% of fundamental

% of fundamental

% of fundamental
60 G1 60 G2 60 G2
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(a) 3P/SB/SM scheme. (b) 3P/SB/THM scheme. (c) 3P/SB/SVM scheme.
% of fundamental

% of fundamental

% of fundamental

60 G3 60 G3 60 G3
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(d) 3P/MB/SM scheme. (e) 3P/MB/THM scheme. (f) 3P/MB/SVM scheme.
% of fundamental

% of fundamental

% of fundamental

60 G2 60 G2 60 G2
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(g) 3P/CB/SM scheme. (h) 3P/SB/+DCCM scheme. (i) 3P/SB/-DCCM scheme.
% of fundamental

% of fundamental

60 G3 60 G3
45 fundamental 45 fundamental

30 30
15 15
0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency
(j) 3P/MB/+DCCM scheme. (k) 3P/MB/-DCCM scheme.
Fig. 4. Simulated output line-to-line voltage spectrum of the ZSI using the 3P modulation schemes.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

% of fundamental

% of fundamental

% of fundamental
60 G1 60 G2 60 G2
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(a) 1P/SB/SM scheme. (b) 1P/SB/THM scheme. (c) 1P/SB/SVM scheme.
% of fundamental

% of fundamental

% of fundamental
60 G2 60 G3 60 G3
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(d) 1P/SB/MSVM scheme. (e) 1P/MB/THM scheme. (f) 1P/MB/SVM scheme.
% of fundamental

% of fundamental

% of fundamental
60 G3 60 G2 60 G2
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(g) 1P/MB/MSVM scheme. (h) 1P/SB/+DCCM scheme. (i) 1P/SB/-DCCM scheme.
% of fundamental

% of fundamental

% of fundamental
60 G3 60 G3 60 G3
45 fundamental 45 fundamental 45 fundamental

30 30 30
15 15 15
0 0 0
0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs 0 fs 2fs 3fs 4fs 5fs
Frequency Frequency Frequency
(j) 1P/MB/+DCCM scheme. (k) 1P/MB/-DCCM scheme. (l) 1P/MB/HM scheme.
Fig. 5. Simulated spectrum of the ZSI output line-to-line voltage using the 1P modulation schemes.

G1 G1

G2 G2 G2 G2 G2 G2 G2 G2 G2 G2
102.1
Switching losses (W )

G3 G3 G3 G3 G3 G3 G3 G3 G3 G3 G3
73.9
73.9
57.6

46.3
46.3
40.5
40.5

36.9
36.9
29.9

27.4
27.4
20.1
20.5
20.5

20.5

20.9
20.9

17.9
16.7
10.9
10.9
1) 3P/SB/SM

2) 3P/SB/THM

3) 3P/SB/SVM

4) 3P/MB/SM

5) 3P/MB/THM

6) 3P/MB/SVM

7) 3P/CB/SM

8) 3P/SB/+DCCM

9) 3P/SB/-DCCM

10) 3P/MB/+DCCM

11) 3P/MB/-DCCM

12) 1P/SB/SM

13) 1P/SB/THM

14) 1P/SB/SVM

15) 1P/SB/MSVM

16) 1P/MB/THM

17) 1P/MB/SVM

18) 1P/MB/MSVM

19) 1P/SB/+DCCM

20) 1P/SB/-DCCM

21) 1P/MB/+DCCM

22) 1P/MB/-DCCM

23) 1P/MB/HM

| {z } | {z }
3P modulation schemes 1P modulation schemes

Fig. 6. Calculated switching losses of the 3 kV A ZSI B6-bridge using PLECS for different modulation schemes at full-load with unity power factor.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE IV
E FFECTIVE S WITCHING F REQUENCY OF THE ZSI D IFFERENT PARTS U SING THE 3P M ODULATION S CHEMES

3P modulation schemes

(10) 3P/MB/+DCCM

(11) 3P/MB/-DCCM
(8) 3P/SB/+DCCM

(9) 3P/SB/-DCCM
(5) 3P/MB/THM

(6) 3P/MB/SVM
(2) 3P/SB/THM

(3) 3P/SB/SVM

(4) 3P/MB/SM

(7) 3P/CB/SM
(1) 3P/SB/SM
2fs 5fs 2fs
Upper switches (Sabc,u ) fs
2fs 5fs 3 3 3
3 6 5fs 2fs 2fs
Lower switches (Sabc,l ) 2fs fs
3 3 3
Input diode (Dn )
2fs fs
Impedance network
Note that the impedance network under the MB-based modulation schemes should be designed
based on the fundamental frequency.

TABLE V
E FFECTIVE S WITCHING F REQUENCY OF THE ZSI D IFFERENT PARTS U SING THE 1P M ODULATION S CHEMES

1P modulation schemes

(21) 1P/MB/+DCCM

(22) 1P/MB/-DCCM
(19) 1P/SB/+DCCM
(18) 1P/MB/MSVM

(20) 1P/SB/-DCCM
(15) 1P/SB/MSVM

(16) 1P/MB/THM

(17) 1P/MB/SVM
(13) 1P/SB/THM

(14) 1P/SB/SVM

(23) 1P/MB/HM
(12) 1P/SB/SM

2fs 2fs fs
Upper switches (Sabcu )
3 2fs 3 3 fs
fs
3 fs 2fs 3
Lower switches (Sabcl ) fs
3 3
Input diode (Dn ) 6fs 4fs 4fs 3fs 2fs
fs 2fs
Impedance network ∼ 3fs ↔ 6fs ∼ 2fs ↔ 4fs ∼ 3fs ↔ 4fs ∼ fs ↔ 3fs ∼ fs ↔ 2fs
Note that the impedance network under the MB-based modulation schemes should be designed based on the fundamental frequency.

It is worth to note that the 1P modulation schemes introduce C. Effective Switching Frequency
higher current stresses, where the ST state is achieved through
one phase-leg at a time. Meanwhile, this ST current is divided
From the prior parts, it has been noticed that these different
among the three-phase legs using the 3P modulation schemes.
modulation schemes introduce different effective switching
Hence, it is of importance to properly design the gate drive
frequency for the B6-bridge upper switches (Sabc,u ) and
circuits under the 3P modulation schemes, as having a delay
lower switches (Sabc,l ), the impedance network, and the input
for a fraction of µs can result in a catastrophic consequences.
diode (Dn ). Table IV shows the normalized effective switch-
This is due to the fact of having all ST current flowing through
ing frequency of the ZSI different parts using the different 3P
one-phase leg for short periods. Hence, one solution could be
modulation schemes, while Table V considers the different 1P
designing each switch to carry the highest possible current as
modulation schemes.
a worst case.
It is worth to note that the effective switching frequency
of the impedance network using the 1P modulation schemes
Fig. 3 shows the simulated currents in the upper and the is varying between two quantities during the fundamental
lower switches of the three-phase ZSI phase a (iSa,u and iSa,l ) period due to the variation of the active states equivalent time.
using different modulation schemes. Comparing among these Hence, it is mandatory to design it based on the smallest
different current waveforms in Fig. 3 shows the current stresses value of the effective switching frequency. On the other hand,
and the ST commutation period for the different switches, the modulation schemes under group G3 should consider the
which have been summarized before in Table III. resultant low frequency component at the dc-side.
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(a) 3P/SB/SVM scheme.

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(b) 3P/CB/SM scheme.

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(c) 3P/SB/+DCCM scheme.
Fig. 7. Obtained open-loop experimental results of the 3P modulation schemes under group G2 . For each modulation scheme, the dc-link voltage
(vdc ), the capacitor voltage (vC ), the output phase current, and the inductor current (iL ) are shown. Note that a zoom for one switching cycle is
shown for each modulation scheme and the non-linearity in the inductor current is due to the swinging property of the used core.

D. Spectrum of the Output Voltage
One of the important aspects that must be considered
is the effect of these different modulation schemes on the
output voltage spectrum. The output line-to-line voltage spec-
trum is shown in Fig. 4 using the different 3P modulation
schemes, and in Fig. 5 using the different 1P modulation
schemes. These figures show that the voltage spectrum using
the modulation schemes under group G1 , i.e. 3P/SB/SM
and 1P/SB/SM, introduce higher energy compared to the
equivalent 3P and 1P modulation schemes respectively due to
the higher dc-link voltage. Moreover, using the discontinuous
modulation schemes, the energy is highly concentrated around
fs , where the 1P/MB/HM scheme results in the highest energy
around fs .
Among the different 1P modulation schemes, the
1P/SB/MSVM and 1P/MB/MSVM schemes result in higher
energy concentration around 2fs . Note that under these two
modulation schemes, the energy becomes concentrated around
fs with the reduction of M .
E. Switching Losses
The prior designed 3 kVA three-phase ZSI has been utilized
in order to calculate the switching losses in the ZSI using
these different modulation schemes. Such aspect is relevant in
order to figure out the effect of these different schemes on the
converter efficiency.
Fig. 6 shows the obtained switching losses using the dif-
ferent modulation schemes at full-load. This figure shows
that among the modulation schemes under group G2 , the
1P/SB/MSVM scheme has the lowest switching losses, in
addition to its implementation simplicity as it only uses three
reference signals. Meanwhile, among the modulation schemes
under group G3 , the 3P/MB/+DCCM scheme results in the
lowest switching losses. On the other hand, among the 3P
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(a) 1P/SB/SVM scheme.

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(b) 1P/SB/MSVM scheme.

vdc (300 V /Div)

vC (300 V /Div) 5 ms/Div vdc (300 V /Div)
vC (300 V /Div) 2 µs/Div

ia (10 A/Div)

iL (5 A/Div)
iL (5 A/Div)
(c) 1P/SB/+DCCM scheme.
Fig. 8. Obtained open-loop experimental results of the 1P modulation schemes under group G2 . For each modulation scheme, the dc-link voltage
(vdc ), the capacitor voltage (vC ), the output phase current, and the inductor current (iL ) are shown. Note that a zoom for one switching cycle is
shown for each modulation scheme and the non-linearity in the inductor current is due to the swinging property of the used core.

modulation schemes, the 3P/SB/SM which belongs to group
G1 introduces highest switching losses due to the higher dc-
link voltage. Similarly, among the 1P modulation schemes, the
1P/SB/SM, which belongs to group G1 introduces the highest
switching losses.
Note that the used model in PLECS for the B6-bridge
switches is CCS050M12CM2 SiC power module from CREE,
while the used model for the input diode (Dn ) is C4D40120D,
which is a SiC diode. Thus, the reverse recovery losses are
negligible.
Compared to the 3P modulation schemes, most of the
1P modulation schemes introduce higher effective switching
frequency that might reach six times the carrier one. Hence,
it is mandatory to use SiC diodes with 1P different modula-
tion schemes that result in much higher effective switching
frequency for the input diode.
IV. E XPERIMENTAL A SSESSMENT OF THE M ODULATION
S CHEMES U NDER G ROUP G2
From the previous comparisons, it can be seen that the
modulation schemes under group G2 represents the state-of-
the-art modulation schemes for the three-phase impedance
source inverters. This is due to the high voltage stresses
related to group G1 and the limited applications of group G3 .
Hence, the prior designed 3 kVA three-phase ZSI for group
G2 , whose circuit diagram is shown in Fig. 1 and parameters
are listed in Table I, is implemented experimentally in order
to introduce an experimental assessment according to the prior
discussions and measure the entire conversion efficiency under
these different schemes. Note that due to the equivalence
between the THM and the SVM schemes, and the +DCCM
and the -DCCM schemes, only the SVM and the +DCCM
schemes are considered in this experimental assessment. Thus,
the following modulation schemes are considered in this exper-
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS

TABLE VI
G ENERAL C OMPARISON A MONG THE D IFFERENT M ODULATION S CHEMES

3P modulation schemes 1P modulation schemes

G1 G2 G3 G2 G3 G1 G2 G3 G2 G3

(10) 3P/MB/+DCCM

(21) 1P/MB/+DCCM
(11) 3P/MB/-DCCM

(22) 1P/MB/-DCCM
(19) 1P/SB/+DCCM
(18) 1P/MB/MSVM

(20) 1P/SB/-DCCM
(15) 1P/SB/MSVM
(8) 3P/SB/+DCCM

(9) 3P/SB/-DCCM

(16) 1P/MB/THM

(17) 1P/MB/SVM
(13) 1P/SB/THM

(14) 1P/SB/SVM
(5) 3P/MB/THM

(6) 3P/MB/SVM

(23) 1P/MB/HM
(2) 3P/SB/THM

(3) 3P/SB/SVM

(12) 1P/SB/SM
(4) 3P/MB/SM

(7) 3P/CB/SM
(1) 3P/SB/SM
High

High
A Low Lowest Low Lowest Low Lowest Low Lowest

High
B Low Highest

Normal
Very Very Very Very
C Low Normal Lowest Lowest
high high high high

Highest
Normal

Very

Low

Low
D High Low Low Lowest Normal High Normal
high

(A) Theoretical peak voltage across the B6-bridge switches for the same operating point
(B) Theoretical peak current in each of the B6-bridge switches for the same operating point
(C) Impedance network size
(D) Switching losses

96 the non-linearity in the inductor current is due to the swinging

1P/SB/MSVM property of the used core.
95
3P/SB/+DCCM
94 Comparing these figures confirms the prior discussions and
93
comparisons. This can be illustrated as follows: from Fig. 7(c)
Efficiency (%)

and Fig. 8(b), it can be seen that one ST pulse is inserted

92
91
90
89
88
87
86
1.5 1.8
Load power (kW)
Fig. 9. Measured efficiency of the modulation schemes under group
G2 . Note that this prototype is based on a CCS050M12CM2 SiC power
module and a C4D40120D SiC diode from CREE.
imental assessment: 3P/SB/SVM, 3P/CB/SM, 3P/SB/+DCCM,
1P/SB/SVM, 1P/SB/MSVM, and 1P/SB/+DCCM schemes.
Fig. 7 shows the obtained experimental results for the
3P/SB/SVM, the 3P/CB/SM, and the 3P/SB/+DCCM schemes,
while Fig. 8 shows the obtained experimental results for
the 1P/SB/SVM, the 1P/SB/MSVM, and the 1P/SB/+DCCM
schemes. For each modulation scheme, the dc-link voltage
(vdc ), the capacitor voltage (vC ), the output phase current,
and the inductor current (iL ) are shown. Note that a zoom for
one switching cycle is shown for each modulation scheme and
during each switching cycle using the 3P/SB/+DCCM and
the 1P/SB/MSVM schemes, which corresponds to an effective
3P/CB/SM switching frequency of fs for the impedance network passive
3P/SB/SVM components. Meanwhile, Fig. 7(a) and Fig. 7(b) show that the
1P/SB/+DCCM 3P/SB/SVM and the 3P/CB/SM schemes introduce two ST
pulses during each switching cycle, where the latter scheme
1P/SB/SVM
has unequal pulses due to the utilization of time-varying
additional reference signals. This corresponds to a variable
2.1 2.4 2.7 3.0 effective switching frequency as discussed before. On the other
hand, comparing inductor current in Fig. 8(a) and Fig. 8(c)
for the 1P/SB/SVM, and the 1P/SB/+DCCM schemes respec-
tively shows that both schemes introduce a variable effective
switching frequency due to the variation of the ST duty cycle
during the fundamental cycle. Moreover, the latter scheme,
i.e. the 1P/SB/+DCCM scheme shown in Fig. 8(c), has a
higher peak-to-peak inductor current ripple compared to the
the 1P/SB/SVM scheme shown in Fig. 8(a). This is due to the
variation of the effective switching frequency between 3fs and
4fs for the 1P/SB/+DCCM scheme, unlike the 1P/SB/SVM
scheme, in which the effective switching frequency varies
between 3fs and 6fs .
Finally, the conversion efficiency has been measured using
a KinetiQ PPA5530 power analyzer, where the obtained mea-
surements are shown in Fig. 9. From this figure, i.e. Fig. 9,
it can be seen that the 1P/SB/MSVM scheme has the highest
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
conversion efficiency among the different modulation schemes
under group G2 and this confirms the prior shown switching
losses results in Fig. 6. Moreover, the obtained efficiency
measurements in Fig. 9 are consistent with the calculated
switching losses in Fig. 6.
V. C ONCLUSION
This paper has introduced an important comparative as-
sessment among the different modulation schemes used with
the three-phase impedance source inverters. Such assessment
has been achieved by evaluating the Z-source inverter (ZSI)
voltage gain and stresses, current stresses, effective switching
frequency of its different parts, spectrum of its output voltage,
and switching losses under each modulation scheme.
These various modulation schemes have been divided into
three groups as follows: G1 , G2 , and G3 . G1 includes two
modulation schemes, where the ZSI suffers from high voltage
stresses and switching losses under these two modulation
schemes. On the other hand, the modulation schemes under G2
and G3 introduce much lower voltage stresses. Although, the
modulation schemes under G3 introduce lower voltage stresses
compared to the ones under G2 , a low frequency component
is associated with them. Hence, this group of modulation
schemes, i.e. G3 , is useful for high speed motor drives due
to the high fundamental frequency.
On the other hand, the 1P/SB/MSVM scheme results in the
lowest switching losses compared to the equivalent modula-
tion schemes in group G2 , in addition to its implementation
simplicity as it only uses three reference signals. Mean-
while, among the modulation schemes under group G3 , the
3P/MB/+DCCM scheme results in the lowest switching losses.
The modulation schemes under group G2 have been ex-
perimentally assessed using a 3 kVA three-phase ZSI, where
the obtained results confirm the introduced discussions and
comparisons. Moreover, the efficiency of these modula-
tion schemes has been measured experimentally, where the
1P/SB/MSVM scheme has the highest efficiency among group
G2 .
Finally, Table VI gives a general comparison which is
deduced from the prior comparative study. This table shows
that among the modulation schemes of group G2 , the
3P/SB/+DCCM, the 3P/SB/-DCCM, and the 1P/SB/MSVM
schemes result in the highest performance. Meanwhile, among
the modulation schemes of group G3 , the 3P/MB/+DCCM,
the 3P/MB/-DCCM, and the 1P/MB/MSVM schemes result
in highest performance.
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Ahmed Abdelhakim (S’15) was born in Egypt
on April 1, 1990. He received the B.Sc. and the
M.Sc. degrees (with Hons.) in electrical engi-
neering from Alexandria University, Alexandria,
Egypt, in 2011 and 2013 respectively. Since
October 2015, he has been working toward the
Ph.D. degree in power electronics under the
supervision of prof. P. Mattavelli at the University
of Padova, Vicenza, Italy.
In 2017, he was with the department of De-
partment of Energy Technology, Aalborg Univer-
sity, Aalborg, Denmark, as a visiting scholar for ten months, where he
was working on several research activities under the supervision of
prof. F. Blaabjerg. In January 2015, he joined the University of Padova as
a research fellow, where he was working on several research activities
for eight months under the supervision of prof. P. Mattavelli. In 2012,
he was involved in Spiretronics company’s R&D team in Egypt for nine
months, then he was a visiting scholar in Texas A&M university, Doha,
Qatar, for two months. From 2011 to 2014, he was a Demonstrator and
then a Lecturer Assistant in Alexandria University, where he helped
in teaching several power electronics courses for the undergraduate
students. His major field of interest includes analysis, modeling, control,
and investigation of new power converter topologies, and application of
new wide-band-gap (WBG) semiconductor devices (GaN/SiC) for high
frequency and high power density power converters.
Mr. Abdelhakim has published more than 25 journal and conference
papers, and two book chapters in the area of expertise. He is serving
as a reviewer in several journals including IEEE Transaction on Power
Electronics, IEEE Transaction on Industrial Electronics, and IET Power
Electronics.
Paolo Mattavelli (S’95, A’96, M’00, SM’10,
F’14) received the MS degree (with honors) and
the Ph.D. degree in electrical engineering from
the University of Padova (Italy) in 1992 and in
1995, respectively. From 1995 to 2001, he was
a researcher at the University of Padova. From
2001 to 2005 he was an associate professor
the University of Udine, where he led the Power
Electronics Laboratory. In 2005 he joined the
University of Padova in Vicenza with the same
duties. From 2010 to 2012 he was professor and
member of the Center for Power Electronics Systems (CPES) at Virginia
Tech. He is currently a professor with the University of Padova.
His major field of interest includes analysis, modeling and analog
and digital control of power converters, grid-connected converters for
renewable energy systems and micro-grids, high-temperature and high-
power density power electronics. In these research fields, he has been
leading several industrial and government projects. His current google
scholar h-index is 60.
From 2003 to 2012 he served as an Associate Editor for IEEE
Transactions on Power Electronics. From 2005 to 2010 he was the
IPCC (Industrial Power Converter Committee) Technical Review Chair
for the IEEE Transactions on Industry Applications. For terms 2003-
2006, 2006-2009 and 2013-2015 he has been a member-at-large of the
IEEE Power Electronics Society’s Administrative Committee. He also
received in 2005, 2006, 2011 and 2012 the Prize Paper Award in the
IEEE Transactions on Power Electronics and in 2007, the 2nd Prize
Paper Award at the IEEE Industry Application Annual Meeting. He is
an IEEE Fellow.

Frede Blaabjerg (S’86, M’88, SM’97, F’03) was

with ABB-Scandia, Randers, Denmark, from
1987 to 1988. From 1988 to 1992, he got the
PhD degree in Electrical Engineering at Aalborg
University in 1995. He became an Assistant Pro-
fessor in 1992, an Associate Professor in 1996,
and a Full Professor of power electronics and
drives in 1998. From 2017 he became a Villum
Investigator.
His current research interests include power
electronics and its applications such as in wind
turbines, PV systems, reliability, harmonics and adjustable speed drives.
He has published more than 500 journal papers in the fields of power
electronics and its applications. He is the co-author of two monographs
and editor of 7 books in power electronics and its applications.
He has received 24 IEEE Prize Paper Awards, the IEEE PELS
Distinguished Service Award in 2009, the EPE-PEMC Council Award
in 2010, the IEEE William E. Newell Power Electronics Award 2014 and
the Villum Kann Rasmussen Research Award 2014. He was the Editor-
in-Chief of the IEEE TRANSACTIONS ON POWER ELECTRONICS
from 2006 to 2012. He has been Distinguished Lecturer for the IEEE
Power Electronics Society from 2005 to 2007 and for the IEEE Industry
Applications Society from 2010 to 2011 as well as 2017 to 2018. In 2018
he is President Elect of IEEE Power Electronics Society.
He is nominated in 2014, 2015, 2016 and 2017 by Thomson Reuters
to be between the most 250 cited researchers in Engineering in the
world. In 2017 he became Honoris Causa at University Politehnica
Timisoara (UPT), Romania.

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