IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO.
2, MARCH 2008
Voltage Multiplier Cells Applied to
Non-Isolated DC–DC Converters
Marcos Prudente, Luciano L. Pfitscher, Gustavo Emmendoerfer, Eduardo F. Romaneli, and Roger Gules
Abstract—This paper introduces the use of the voltage multiplier
technique applied to the classical non-isolated dc–dc converters in
order to obtain high step-up static gain, reduction of the maximum
switch voltage, zero current switching turn-on. The diodes reverse
recovery current problem is minimized and the voltage multiplier
also operates as a regenerative clamping circuit, reducing the
problems with layout and the EMI generation. These characteris-
tics allows the operation with high static again and high efficiency,
making possible to design a compact circuit for applications where
the isolation is not required. The operation principle, the design
procedure and practical results obtained from the implemented
prototypes are presented for the single-phase and multiphase
dc–dc converters.
A boost converter was tested with the single-phase technique,
for an application requiring an output power of 100 W, operating
with 12 V input voltage and 100 V output voltage, obtaining effi-
ciency equal to 93%. The multiphase technique was tested with a
boost interleaved converter operating with an output power equal
to 400 W, 24 V input voltage and 400 V output voltage, obtaining
efficiency equal to 95%.
Index Terms—DC–DC power conversion, dc power system,
switched circuits, voltage multipliers.
I. INTRODUCTION
HE recent growth of battery powered applications and low
T voltage storage elements are increasing the demand of ef-
ficient step-up dc–dc converters. Typical applications are em-
bedded systems, renewable energy systems, fuel cells, mobility
applications and uninterrupted power supply (UPS) [1], [2] and
[3]. These applications demand high step-up static gain, high
efficiency and reduced weight, volume and cost.
The step-up stage normally is the critical point for the de-
sign of high efficiency converters due to the operation with high
input current and high output voltage, thus a careful study must
be done in order to define the topology for a high step-up appli-
cation.
Some classical converters with magnetic coupling as flyback
or current-fed push-pull converter can easily achieve high
step-up voltage gain. However, the power transformer volume
is a problem for the development of a compact converter. The
energy of the transformer leakage inductance can produce high
voltage stress, increases the switching losses and the electro-
magnetic interference (EMI) problems, reducing the converter
efficiency. Active clamping soft-commutation techniques can
Manuscript received April 22, 2007; revised August 2, 2007. Recommended
for publication by Associate Editor H. Chung.
M. Prudente and L. L. Pfitscher are with the UNISINOS, São Leopoldo
93022–000, Brazil.
G. Emmendoerfer, E. F. Romaneli, and R. Gules are with the Federal Univer-
sity of Technology CPGEI-UTFPR, Curitiba 80230-901, Brazil.
Digital Object Identifier 10.1109/TPEL.2007.915762
0885-8993/$25.00 © 2008 IEEE
871
be used to reduce the switching losses and the EMI generation.
However the voltage stress is higher than in the hard-switching
structures and the cost and circuit complexity are increased.
Thus, the weight, volume and losses of the power transformer
are limiting factors for the isolated dc–dc converters used in
embedded applications.
Non-isolated dc–dc converters as the classical boost, can
provide high step-up voltage gain, but with the penalty of
high voltage and current stress, high duty-cycle operation and
limited dynamic response. The diode reverse recovery current
can reduce the efficiency when operating with high current and
voltage levels. There are some non-isolated dc–dc converters
operating with high static gain, as the quadratic boost converter,
but additional inductors and filter capacitors must be used and
the switch voltage is high [8].
However, recently new non-isolated dc–dc converter topolo-
gies were proposed [1]–[9], showing that it is possible to obtain
high static gain, low voltage stress and low losses, improving
the performance with relation the classical topologies.
A new alternative for the implementation of high step-up
structures is proposed in this paper with the use of the voltage
multiplier cells integrated with classical non-isolated dc–dc
converters. The uses of the voltage multiplier in the classical
dc–dc converters add new operation characteristics, becoming
the resultant structure well suited to implement high-static gain
step-up converters.
II. DC–DC CONVERTERS WITH SINGLE-PHASE
VOLTAGE MULTIPLIER CELLS
The use of voltage multiplier in low frequency rectifiers is
a classical solution for high dc output voltage. Some of these
structures are shown in Fig. 1. This technique is also used
in high-frequency isolated dc–dc converters, mainly for high
output voltage (kV) applications as in Traveling Wave Tube
Amplifiers (TWTA), reducing the problems presented by the
high frequency and high-voltage power transformers [10]. The
charge pump technique and switched-capacitor circuit is also
a classical use of the capacitor charge transference [11]. These
structures provide an output voltage higher than the input
voltage without the use of magnetic elements. The operation
at high-frequency permits a reduction of the capacitor’s size,
thus enabling the design of a single integrated circuit without
external components, for low power applications [13]. Some
implementations of switched-capacitor circuits are presented
in Fig. 2 and the implementation of dc–dc converters with
this technique are presented in [12] and [13]. A recent use of
the capacitor charge transference in a new class of conversion
power cells for dc–dc voltage step-up has been presented in [5]
and [6]. The voltage lift technique is utilized to implement a
872
Fig. 1. Classical voltage multiplier rectifier circuits.
Fig. 2. Switched-capacitor circuits.
series of high voltage and wide conversion range applications
converters.
Another alternative to overcome the limitations of the clas-
sical dc–dc converters for high performance and large conver-
sion ratio applications is proposed in this paper with the integra-
tion of a voltage multiplier cells with non-isolated dc–dc con-
verters. The utilization of the voltage multiplier is also presented
for the multiphase dc–dc converters, for better performance in
high power applications.
A. Circuit Description of the Single-Phase Converter
The basic structure of the single-phase voltage multiplier
cell is composed by the diodes , the capacitors
and the resonant inductor . This voltage
multiplier cell can be integrated with the classical converters
as buck, boost and buck-boost, composed by the switch (S),
inductor (L), output diode and filter capacitor , However, the maximum switch voltage is
as presented in Fig. 3. The new features obtained with the
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008
Fig. 3. Voltage Multiplier cell integrated with classical dc–dc converters. (a)
Buck. (b) Boost. (c) Buck-boost.
integration of the voltage multiplier cell are the same for all
basic converters. However, the use of the voltage multiplier
integrated with the buck converter does not introduce practical
advantages because the output voltage must be lower than
the input voltage. As the main application of the structures
studied is high static gain converters, only the boost topology
is analyzed in detail in this paper.
The voltage multiplier cell also operates without the reso-
nant inductor . However, the inclusion of this small induc-
tance (typically 1 H to 4 H) allows the power switch to op-
erate with zero-current-switching (ZCS) turn-on and the nega-
tive effects of the reverse recovery current of all diodes are mini-
mized. These characteristics reduce the converter commutation
losses, allowing the operation with high switching frequency,
maintaining high efficiency.
It is possible to add more multiplier cells in order to achieve
higher step-up ratios, as shown in Fig. 4. The reduction of the
reverse recovery current of all diodes is obtained with only one
resonant inductor in the first voltage multiplier cell. The voltage
multiplier cell increases the static gain of the classical boost by
a factor , where M is the number of multiplier cells.
lower than the
output voltage. In the simplest case shown in Fig. 3(b),
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS 873

Fig. 4. Boost converter with “M” voltage multiplier cells.

Fig. 7. Second Stage (t ;t ).

Fig. 8. Third Stage (t ;t ).

Fig. 5. Parameterized output voltage and switch voltage variation as a function

of the duty-cycle and the number of the voltage multiplier cells.

Fig. 9. Fourth Stage (t ;t ).

Fig. 6. First Stage (t ;t ).

the switch voltage is half of the output voltage. This character-

istic allows the use of low drain-source voltage and low Fig. 10. Fifth Stage (t ;t ).
MOSFETs, reducing the switch conduction losses.
Fig. 5 shows the parameterized output voltage
curves, as a function of the duty-cycle, for different number of diode . The resonant inductor current increases lin-
voltage multiplier cells (M). The output voltage of the proposed early until to reach the value of the input inductor current
converter is equal to the output voltage of the classical boost and the current in the diode is reduced at same propor-
multiplied by the factor while the switch voltage is tion. The resonant inductor current is defined by (1). The current
always equal to the output voltage of the classical boost (lower variation can be considered linear because the capacitor
curve) and is independent of the factor M. voltage increases and the capacitor voltage decreases ap-
proximately at the same rate, maintaining constant the voltage
B. Operation Analysis of the Single-Phase Converter applied to the resonant inductor. The capacitor voltages are de-
Better operation characteristics are obtained when the con- fined by (2) and (3)
verter operates in continuous conduction mode (CCM). Thus
the operation stages (Figs. 6 –10) and the theoretical waveforms (1)
(Fig. 11) are presented for CCM operation and considering the
use of only one multiplier stage .
1) First Stage ( Fig. 6): At the instant , switch S
is turned-off and the energy stored in the input inductor
is transferred to the output capacitor through the diode
and also transferred to the multiplier capacitor through the (2)
874 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

Fig. 12. Integration of the voltage multiplier capacitor with the output capac-
itor.

defined by (10), (13) and (14). When the energy stored in the
capacitor is transferred to the capacitor, the diode
is blocked (instant ). The average voltage stored in the
output capacitor is equal to the output voltage of the classical
boost converter plus the voltage. The average voltage of
the capacitors and are equals to the output voltage of
the classical boost converter, and this is the maximum voltage
applied in all diodes and power switch

(10)

(11)
Fig. 11. Main theoretical waveforms of the single-phase converter.
(12)

(13)
(3)

2) Second Stage ( Fig. 7): At the instant , the cur- (14)

rent in the diode is zero. The resonant inductor current is
5) Fifth Stage ( Fig. 10): At the instant , the current
equal to the input inductor current during this stage (4) and the
in the inductor becomes null and the diode is blocked.
energy of the input inductor is transferred to the load through
The input inductor stores energy as a conventional boost until
the diode
turn-off the switch S, returning to the first stage
(4)
(15)
(5)
(16)
(6) (17)

3) Third Stage ( Fig. 8): At the instant , the switch As can be observed in Fig. 11, the switch turn on is ZCS.
S is turned-on with ZCS commutation and the current in the The resonant inductor limits the current variation (di/dt) in
resonant inductor and in the output diode reduce linearly all diodes, reducing the diodes reverse recovery current. The
to zero as defined by (7), at the instant . Thus the output voltage in all semiconductors is half of the output voltage, con-
diode also is blocked with low reverse recovery current. The sidering a low voltage ripple in the multiplier capacitors.
capacitor voltage can be considered constant due to the The basic structure also can be modified as shown in Fig. 12.
short duration of the third stage The voltage multiplier capacitor can compose the output
filter capacitor, reducing the output capacitor voltage level. A
(7) symmetrical output voltage is obtained with this
configuration, because the capacitor is charged with half
(8) of the output voltage even for unbalanced loads .
(9) Therefore, the symmetry between and is obtained
without the use of a control circuit. The configuration proposed
4) Fourth Stage ( Fig. 9): When the output diode is in Fig. 12 can be interesting for an integration of the step-up
blocked, the diode conducts transferring the energy stored dc–dc converter with a half-bridge inverter, as in a class D
in the capacitor to the capacitor , in a resonant way, power amplifier powered by a battery.
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS
C. Design Considerations of the Single-Phase Converter
The main equations to design the single-phase converter are
presented with an example, considering the following specifica-
tions.
Output power: 100 W.
Input Voltage: 12 V.
Output Voltage: 100 V.
Switching Frequency: 50 kHz.
Number of multiplier stages: .
1) Static Gain: The multiplier capacitor is charged with
the output voltage of the classical boost converter (18) at the
fourth operation stage. As this capacitor is connected in series
with the converter output at the transference of the energy stored
in the input inductance (first and second stages), the output ca-
pacitor is charged with the boost output voltage multiplied by
two
(18)
(19)
Therefore, for a circuit composed by M series stages, as pre-
sented in Fig. 4, the output voltage will be multiplied by the
factor . Thus, the static gain of the proposed converter,
operating in continuous conduction mode is presented in
(20)
2) Switch Duty-Cycle: The nominal duty-cycle is defined by
(21)
3) Switch Voltage: The maximum voltage in all diodes and
power switch is equal to the voltage, that is equal to the
output voltage of the classical boost, calculated by (22). The
voltage in all components is half of the output voltage
(22)
4) Input Inductance: The design of the input inductance is
the same of the classical boost converter. Considering a current
ripple equal to 45% of the nominal input current, the input in-
ductance is equal to
(23)
(24)
5) Voltage Multiplier Capacitor : The minimum capac-
itance of the voltage multiplier capacitor depends of the max-
imum output power, the multiplier capacitor voltage and the
switching frequency, as shown in (25). The maximum output
875
power considered in this example is equal to 150 W for a nom-
inal output power equal to 100 W
Switching frequency
Voltage of the multiplier capacitor
Maximum output power (25)
The maximum output power is limited by the energy stored
in the multiplier capacitor. If the load power is increased above
of the value, the output voltage will be reduced, limiting
the output power at the value of . Therefore, the proposed
converter will operate with constant output power in an overload
condition until the output voltage to reach the value of the output
voltage of the classical boost, calculated by (18). Thus, for a too
small multiplier capacitance, the proposed structure will operate
as a classical boost converter and the voltage multiplier will op-
erate only as a non-dissipative snubber. The intrinsic power lim-
itation of the circuit can increase the converter reliability in the
overload operation, but a current protection circuit is necessary
for an effective short-circuit protection.
Considering a low value of the multiplier capacitance (1 F
and 3.3 F) as in the implemented prototypes, a polypropylene
capacitor can be used and the equivalent series resistance (ESR)
can be not considered ( at 100 kHz). For higher
capacitance values the electrolytic capacitor can be used and the
ESR losses must be considered in the capacitor definition.
6) Resonant Inductor : The resonant inductor can be
defined by the maximum current variation (di/dt) at the turn-on
commutation, in order to minimize the commutation losses. In
the third operation stage presented in Figs. 8 and in 11 ,
occurs the reduction of the resonant inductor current at the
switch turn-on. The current variation is limited by the presence
of the resonant inductor, defined by
(26)
Considering the maximum di/dt at the turn-on commutation
equal to 25 A/ s, the resonant inductance is defined by
(27)
7) Switch Conduction Loss: The energy transference from
the capacitor to the capacitor does not change signif-
icantly the switch current waveform and the RMS current can
be determined approximately by (28), where the current ripple
in the input inductance is not considered
(28)
The switch conduction loss is calculated by (29), considering
a RDS resistance equal to 30 m
(29)
8) Switch Commutation Losses: Normally the turn-on com-
mutation is the most important component in the commutation
876 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

loss of the classical boost converter because the switch cur-

rent is added with the diode reverse recovery current, increasing
the commutation current. The commutation loss is reduced in
the proposed converter because the turn-on commutation occurs
with ZCS. The power loss of the turn-off commutation is equal
to the area of the switch voltage and switch current tran-
sitions at the commutation instant multiplied by the switching
frequency. Considering a switch current equal to 10 A at the
commutation instant and a turn-off time equal to 50 ns, Fig. 13. Power circuit of the prototype implemented (M = 1).
the commutation loss is calculated by

(30)

9) Diodes Conduction Loss: The average current in all

diodes is equal to the output current in the single-phase struc- Fig. 14. Power circuit of the prototype implemented (M = 2).
ture. Therefore, the diode conduction losses can be high in
applications with low output voltage and high output power.
Thus, an analysis of losses must be accomplished in order to
verify if the reduction of the losses in the power switch will
compensate the conduction losses of the diodes. However,
for applications with static gain higher than 5, the proposed
converter can present a superior performance than the classical
boost converter

(31)

The conduction losses of all diodes is presented below, con-

sidering a conduction-threshold voltage equal to V

(32)

10) Theoretical Efficiency: The expected converter effi- Fig. 15. Power switch voltage and current (10 V/5 s/div).
ciency can be determined by (33) based on the losses calculated.
The total losses of the filter inductor implemented in the
prototype is equal to W

%
(33)

D. Experimental Results of the Single-Phase Converter

The practical aspects of the single-phase converter and the
design procedure developed are verified with the implementa-
tion of two laboratory prototypes. The power circuits imple-
mented, the components used and the specifications are shown
Fig. 16. Switch turn-on commutation (10 V/1 s/div).
in Figs. 13 and 14.
The main waveforms obtained from the Fig. 13 prototype are
presented in Figs. 15–18. The power switch voltage and current also operates as a clamping capacitor, reducing the switch
are shown in Fig. 15. The maximum switch voltage is equal to voltage due to layout problems. Fig. 17 presents the current in
55 V for an output voltage equal to 100 V. the resonant inductor. As presented in the theoretical analysis,
The detail of the turn-on commutation can be observed in this inductance reduces the di/dt in all diodes, minimizing the
Fig. 16. The turn-on commutation occurs with zero current effects of the diodes reverse recovery current. Fig. 18 shows the
and the commutation loss is reduced. The multiplier capacitor current in the input inductance. The input characteristic is the
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS
Fig. 17. Resonant inductor current (5 V/5 s/div).
Fig. 18. Input inductance current (5 V/5 s/div).
Fig. 19. Output voltage and power switch voltage (50 V/10 s/div).
same of the classical boost converter. The efficiency obtained
with the proposed structure, operating with nominal output
power, is equal to 93%.
Figs. 19–21 present the experimental results of the Fig. 14
prototype. Fig. 19 presents the output voltage and the
877
Fig. 20. Output voltage and multiplier capacitor voltage (50 V/10 s/div).
Fig. 21. Multiplier diode voltage (50 V/10 s/div).
switch voltage . As the structure presents two voltage
multipliers, the switch voltage is equal to 100 V for an output
voltage equal to 300 V.
The voltage of the multiplier capacitor is presented in
Fig. 20. This voltage is equal to the output voltage of the clas-
sical boost converter. The voltage in one multiplier diode is pre-
sented in Fig. 21. The diode voltage is 100 V for an output
voltage equal 300 V. All experimental results agree well with
the theoretical analysis and waveforms. The efficiency obtained
operating with nominal load is equal to 92.5%.
E. Comparison of the Single-Phase Converter With Others
Topologies
Some operation characteristics of the proposed converter and
others topologies with high static gain are analyzed by simu-
lation. The following converter characteristics are considered:
structures without magnetic coupling, only one stage in series
and only one power switch. The main parameters analyzed are
the component number, static gain, duty-cycle and the max-
imum switch voltage.
The simulated converters are presented in Fig. 22. The
boost converter operating with the voltage multiplier cell is
presented in Fig. 22(a). The second converter, Fig. 22(b), is
based on the voltage lift technique, presented in [6]. When
878
Fig. 22. Simulated power converters. (a) Boost converter with voltage
multiplier cell. (b) Voltage lift technique elementary circuit. (c) Quadratic
Boost.
the power switch is turned-on in this circuit, the capacitor
is charged with the input voltage and when the power
switch is turned-off, the energy stored in the input inductor
is transferred to the output through the capacitor and
the output diode. Therefore there is a similarity in both
techniques of the static gain increment obtained with the
capacitor energy transference. However, the series capacitor
with the output is charged with the classic boost output
voltage in the voltage multiplier technique and the equivalent
capacitor is charged with the input voltage with the
voltage lift technique. Thus the static gain obtained with
the voltage multiplier is higher than with the voltage lift.
The converter presented in Fig. 22(c) is obtained with the
series connection of two boost converters and the static gain
is quadratic in relation to the classic boost. A geometric
progression of the static gain can be obtained with the
series connection of the converters with voltage multiplier
cell and with the voltage lift technique, in the last case
called as re-lift, triple-lift circuits and others [5], [6], but
these alternatives are not considered in this analysis.
The main parameters analyzed are presented in Table I. The
higher static gain is obtained with the circuit of Fig. 22(c).
Therefore this converter operates with the lower duty-cycle.
However, the maximum switch voltage is equal to the output
voltage and the circuit complexity is high. The circuit of
Fig. 22(b) presents the lower component number and the switch
voltage is equal to the difference between the output and input
voltages. However, this circuit presents the lower static gain
and the higher duty-cycle. The circuit of Fig. 22(a) presents
a component number higher than the circuit of Fig. 22(b).
But the static gain is higher and the duty-cycle is lower than
the obtained with the Fig. 22(b) circuit, for the same voltage
specification. The maximum switch voltage is lower than the
IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008
TABLE I
SIMULATED CONVERTERS
others converters and is equal to half of the output voltage,
allowing the use of MOSFETs with lower and lower
conduction losses.
III. DC–DC CONVERTERS WITH MULTIPHASE
PHASE VOLTAGE MULTIPLIER CELLS
The multiphase interleaving is an important technique used
with the classical buck and boost converters, in order to reduce
the current and voltage ripple and reduces the current level in
the power switches and diodes, sharing the total current in each
phase [14]. The current sharing is an interesting feature for ap-
plications with high input current, as in high power step-up con-
verters.
The voltage multiplier cells also can be integrated with inter-
leaved converters, resulting in a modular structure well adopted
for high output voltage and high input current applications.
Fig. 23(a) presents the two-phase boost converter integrated
with the voltage multiplier. The circuit of Fig. 23(a) can be sim-
plified substituting the multiplier capacitors and
by only one capacitor in series with the input voltage source as
shown in Fig. 23(b). However, due to the operation redundancy
of some voltage multiplier components, it is possible to imple-
ment a multiphase voltage multiplier with a lower component
number. For example, when the switch is turned-off in the
circuit of Fig. 23(b), both diodes and conducts and
the multiplier capacitor in series with the input voltage source
is connected in parallel with the multiplier capacitor .
The same occurs with the diodes and multiplier
capacitor , when the switch is turned-off. Therefore,
the multiplier capacitor connected in series with the input
voltage source and one multiplier diode of each phase can be
eliminated, maintaining the same operation principle. With
these simplifications, the circuit of the Fig. 23(c) is obtained.
Only the inclusion of one multiplier capacitor and diode is
necessary for each phase. But the resonant inductor of the
single-phase voltage multiplier can not be maintained in the
multiphase configuration presented in Fig. 23(c). In this case,
the reverse recovery current of the diodes must be limited by
the inclusion of a non-dissipative current snubber.
The number of multiplier stages is determined by the static
gain necessary for the application, also by the maximum switch
duty-cycle and the maximum switch voltage. The number of
phases or parallel stages is defined by the components current
level of each phase. A losses analysis can define the best config-
uration of the series and parallel stages. Therefore, the proposed
structure is modular and the best configuration can be defined by
an analysis of cost and performance. The structure modularity
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS
Fig. 23. Voltage Multiplier cell integrated with the two phase boost dc–dc con-
verter. (a) Parallel association of two single-phase converters. (b) First simplifi-
cation. (c) Final configuration.
allows increment the current, voltage and power levels, using
the same range of components.
As the analysis of the stages number is very dependent of
the specifications and also by the components characteristics,
a generic design recommendation of the number of series and
parallel stages is not developed in this paper.
879
Fig. 24. Generic configuration of the multiphase converter.
A. Circuit Description of the Multiphase Converter
Expanding the number of the series and parallel stages of
the circuit presented in Fig. 23(c), a generic configuration of
the multiphase boost voltage multiplier is obtained, as shown in
Fig. 24. The number of parallel stages is represented by the pa-
rameter “P” and the number of multiplier stages is represented
by the parameter “M”, which is defined by the number of the
multiplier capacitors in series with each switch. The min-
imum configuration of the multiphase structure is composed by
two parallel stages and one series multiplier stage
, as shown in Fig. 23(c). This configuration of the mul-
tiphase boost voltage multiplier is composed by the capacitors
and and diodes and . The multiplier capac-
itors are charged by the diodes and , with a voltage
equal to the output voltage of the classical boost, and this is the
maximum voltage applied to the power switches.
The multiphase configuration can reduce significantly the
input current ripple and the output voltage ripple due to the
operation of the parallel stages with different phases. The main
operation characteristics, as the high static gain and low switch
voltage, presented by the single-phase structure are maintained
for the multiphase topology.
The theoretical analysis is presented for the minimum config-
uration and can be extended for the generalized structure, con-
sidering its modularity.
B. Principle of Operation of the Multiphase Converter
The principle of operation is presented for the minimal con-
figuration ( and ), considering the use of ideal
components. The proposed structure presents different opera-
tion stages when operating in continuous or discontinuous con-
duction mode and with a switch duty-cycle (D) lower or higher
than 0.5. The continuous conduction mode operation and duty-
cycle higher than 0.5 is defined in four operation stages.
880 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

Fig. 25. First stage D > 0:5(t t ).

Fig. 27. Third stage D > 0:5(t ; t ).

Fig. 28. Fourth stage D > 0:5(t ;t ).

Fig. 26. Second stage D > 0:5(t ; t ).

the second operation stage, the output diode will conduct

1) First Stage ( Fig. 25): Both switches are con- first and will present a peak current higher than the multiplier
ducting and the input current flows through the input inductors diode , but both diodes presents the same average current.
and power switches. All diodes are blocked and the input The diode average current is reduced by the number of series
inductors store energy during this stage. and parallel stages.
2) Second Stage ([ ] Fig. 26): At the instant , switch The theoretical current waveforms considering ideal compo-
is turned-off and the energy stored in the input inductor is nents and are shown in Fig. 29. The power switch cur-
transferred to the output capacitor through the diode and rent is the sum of the input inductor current and the voltage mul-
also to the multiplier capacitor through the diode . It tiplier diode current. The input current ripple is reduced due to
can be observed in Fig. 24 that the multiplier capacitors and the multiphase operation. When the power switch is turned-off,
are connected in series by the diode and connected in only half of the input inductor current is conducted by the output
parallel with the output capacitor by the output diode . diode and the other part is conducted by the multiplier
Thus, the output voltage will be two times the multiplier capac- diode , reducing the diode conduction losses.
itor voltage and equal to for The operation in continuous conduction mode and is
the generic structure. The maximum voltage applied across the defined in six operation stages and the theoretical current wave-
switch is equal to the capacitor voltage and the forms considering ideal components and are shown in
maximum voltage across the output diode is equal to the Fig. 36.
multiplier capacitor voltage . The maximum voltage a) First Stage ( Fig. 30): Only the power switch
applied across the multiplier diode is always equal two is conducting and the inductor stores energy. The energy
times the multiplier capacitor voltage . stored in the inductor is transferred to the multiplier capacitor
3) Third Stage ( Fig. 27): The switch is turned-on through the diode .
and the input inductors and store energy as in the first b) Second Stage ( Fig. 31): At the instant , with
operation stage. the charge of the multiplier capacitor , the energy stored
4) Fourth Stage ( Fig. 28): At the instant , switch in the inductor is also transferred to the output through the
is turned-off and the energy stored in the input inductor is diode .
transferred to the output capacitor and also to the multiplier c) Third Stage ( Fig. 32): Switch is turned-off
capacitor . As the multiplier capacitor was charged in and the diode is blocked. The energy stored in both input
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS 881

Fig. 32. Third stage D < 0:5(t ;t ).

Fig. 29. Main theoretical waveforms of the multiphase converter (D > 0:5).

Fig. 33. Fourth stage D < 0:5(t ;t ).

d) Fourth Stage ( Fig. 33): Switch is turned-on

and the input inductor stores energy. The energy stored in
the inductor is transferred to the multiplier capacitor
through the diode .
Fig. 30. First stage D < 0:5(t ; t ). e) Fifth Stage ( Fig. 34): At the instant , with the
charge of the multiplier capacitor , the energy stored in the
inductor is also transferred to the output through the diode
.
f) Sixth Stage ( Fig. 35): Switch is turned-off
and the diode is blocked. The energy stored in both input
inductors and are transferred to the output capacitor
through the output diodes and .
The transition among the operation with to
occurs without discontinuity to the load because the static gain
is the same for both operation regions.

C. Diode Reverse Recovery Current

The generic multiphase boost converter was presented in
Fig. 24, where the number of series (M) and parallel (P) stages
are defined by the application specifications and a cost and
efficiency analysis. However, as the resonant inductance
Fig. 31. Second stage D < 0:5(t ; t ). presented in the voltage multiplier circuit of the single-phase
topology [Fig. 3(b)] cannot be included in the multiphase con-
figuration, there is the problem of the diode reverse recovery
inductors and are transferred to the output capacitor current. The increment of the turn-on commutation losses due
through the output diodes and . to the diode reverse recovery current can reduce the converter
882 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

Fig. 34. Fifth stage D < 0:5(t ;t ). Fig. 37. Turn-on snubber.

Fig. 38. Turn-on/turn-off snubber.

Fig. 35. Sixth stage D < 0:5(t ; t ).

that reduces the switch turn-on loss. The inductor limits

the di/dt and the energy stored in this inductance is transferred
to the load through the components . As the
resonant inductance of the voltage multiplier, the snubber
inductor is very small and can be implemented with some turns
with air coil, including the intrinsic inductance of the layout.
Adding more two diodes and a snubber capacitor it is
possible to reduce also the turn-off loss, limiting the dv/dt of
the switch voltage, as shown in Fig. 38. Thus, with this snubber
all commutation losses are reduced increasing the efficiency
and allowing the operation with high switching frequency.
Only one snubber is necessary for each switch even for various
multiplier stages, because the reverse recovery current of all
diodes is in series with the snubber inductance.

D. Design Considerations of the Multiphase Converter

Fig. 36. Main theoretical waveforms of the multiphase converter (D < 0:5).
efficiency. In this case, a non-dissipative current snubber, nor-
mally used in the classical boost converter [15], can be included
in the multiphase circuit. Fig. 37 presents a snubber circuit
The single-phase voltage multiplier presents an adequate per-
formance for low power applications, as for example
W, considering the specifications and losses analysis. For
higher power applications, the multiphase converter can present
a best performance because the conduction loss in the multi-
plier diodes is lower than with the single-phase converter. Thus
the increment in the command complexity and the higher com-
ponent number is compensated by the higher performance. The
number of series stages can be defined by the maximum switch
voltage and the application static gain.
The main equations to design the multiphase converter op-
erating in continuous conduction mode are presented with an
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS 883

example, considering the following specifications: TABLE II

CALCULATED VALUES
Input voltage
Output voltage
Output power
Switching frequency
Multiplier stages
Parallel stages

1) Static Gain: The static gain of the proposed converter

operating in continuous conduction mode is presented in (34).
This equation is also valid for the operation with

(34)

where
Therefore, the increment of the number of diodes does not in-
M number of multiplier stages; crease the total diode conduction losses because the average cur-
D switch duty-cycle. rent of each diode is proportionally reduced

Thus, nominal duty-cycle is calculated by

(35)

2) Switch Voltage: The maximum voltage applied across the
power switches ( and ) and the output diodes ( and
) are equal to the multiplier capacitor voltage ). The
maximum voltage in these components is
(40)
5) Passive Components: The design of the input inductance
is the same of the classical boost converter

(36)
(41)
The maximum voltage applied across the multiplier diodes
is two times the multiplier capacitor voltage, even if —Input current ripple
structure presents more than one multiplier stage The multiplier capacitor can be calculated by (42), where
is the capacitor voltage ripple
(37)

3) Switch Current: The current in all components is divided

by the number of parallel stages (P). Considering the efficiency (42)
equal to 94% operating with nominal output power, the con-
verter input current is equal to
For the same output power ( W), input voltage
( V) and two phases configuration , the design
(38) procedure was used for other specifications. The design results
considering V, V and V are
The RMS switch current is calculated by (39), considering presented in Table II.
the operation with and
E. Experimental Results of the Multiphase Converter
(39) The practical aspects of the proposed converter and the design
procedure developed were verified with the implementation of
4) Diode Current: The average current in the multiplier and two laboratory prototypes, considering the specifications pre-
output diodes is calculated by (40). As can it be seen in (40), viously presented. The power circuit of the implemented pro-
the diode average current is reduced with the increment of the totype with two stages in parallel and one multiplier
parallel stages (P) and with the number of multiplier stages (M). stage is shown in Fig. 39. Fig. 40 shows the prototype
884 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

Fig. 39. Multiphase boost power circuit implemented (M = 1; P = 2).

Fig. 41. Output voltage and the power switch voltage (50 V/5 s/div).

Fig. 42. Switch turn-on commutation (20 V/25 ns/div).

Fig. 40. Multiphase boost power circuit implemented (M = 2; P = 2).

implemented with two parallel stages and two multi-

plier stages . For this implementation, two multiplier
diodes and two multiplier capacitors were added to the circuit
of Fig. 39. The static gain increases from to
with the same duty cycle . The structure presented
in Fig. 39 was tested for an output voltage of 200 V and the cir-
cuit of Fig. 40 was tested for an output voltage of 200 V, 300 V
and 400 V.
The waveforms presented in Figs. 41 and 42 were obtained
with the structure of Fig. 40 operating with an output voltage
equal to 200 V. Fig. 41 presents an important characteristic of
the proposed converter, which is the reduction of the voltage
across the power switches . The maximum voltage across
the switch is about 120 V for an output voltage equal to
200 V. Fig. 42 shows the turn-on commutation of the switch Fig. 43. Output voltage and the power switch voltage (50 V/10 s/div).
S1. The turn-on losses are reduced due to the presence of the
non-dissipative snubber and the negative effects of the reverse
recovery current of the diodes is reduced. Fig. 44 presents the power switch voltage and the con-
The waveforms presented in Figs. 43 and 44 were obtained verter input current (I ). The input current ripple is reduced due
with the structure of Fig. 40 operating with an output voltage to the multiphase operation.
equal to 300 V. The efficiency curves of the implemented circuits, as a func-
Fig. 43 shows the voltage across the power switches tion of the output power, are presented in Figs. 45 and 46.
and the output voltage . The maximum voltage across the Fig. 45 shows the efficiency curve of the circuit presented in
switch is about 100 V for an output voltage equal to 300 V. Fig. 39 ( and ) operating with and without the
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS
Fig. 44. Input current and the switch voltage (50 V/10 s/div).
Fig. 45. Measured efficiency of the proposed converter operating with one mul-
tiplier stage.
Fig. 46. Measured efficiency of the proposed converter operating with non-
dissipative snubber and with one and two multiplier stages.
non-dissipative snubber. Considering the use of the non-dissi-
pative snubber, the efficiency obtained at the nominal load is
equal to 95%. As can be observed in Fig. 45, the efficiency re-
duction is about 4% operating at the nominal load without the
non-dissipative snubber. Fig. 46 shows the efficiency compara-
tive curves of the circuit presented in Fig. 39 ( and ) increasing the reliability of the system.
885
Fig. 47. Uninterrupted power supply implemented with the multiphase boost
voltage multiplier.
Fig. 48. Output voltage (V ) and input current (I ) in an overload condi-
tion (100 ms/div).
and of the circuit presented in Fig. 40 ( and ) with
the snubber.
The multiphase boost voltage multiplier presented in Fig. 40
was also utilized for the implementation of the
step-up stage of an uninterrupted power supply (UPS), as shown
in Fig. 47, [16]. In this application, the UPS was used to supply
a 220 induction motor from a 24 V battery, when a fault of
the grid energy occurs. The step-up converter was implemented
with an output voltage control loop, regulating the dc output
voltage in 350 V. A 700 W two-phase boost voltage multiplier
was implemented in this application.
Fig. 48 presents the intrinsic converter characteristic of
power limitation in the overload operation. This figure shows
the output voltage of the step-up converter and the input
current obtained from the current sensor circuit (I ), used
only for the short-circuit protection. The current at the motor
start-up is many times higher than the nominal motor current.
As the motor power at the start-up is higher than the maximum
power that can be transferred through the multiplier capacitors,
the output voltage of the step-up converter is reduced, even
with a voltage control loop. This characteristic is defined by
(25). Therefore, during the motor start-up, the output power is
constant in the maximum value (Po ). The converter input
current is limited in a maximum value during the motor start-up
without a current control loop or current limitation circuit.
After the motor start-up, the output power is lower than the
maximum power Po and the output voltage is regulated
again by the control loop in the nominal voltage. Therefore, the
step-up converter presents an intrinsic over current limitation
886 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 2, MARCH 2008

IV. CONTROL DESIGN CONSIDERATIONS

The influence of the voltage multiplier in the converter dy-
namic is analyzed with the small-signal frequency response.
This analysis is useful for the controller design in order to at-
tend the transitory and steady-state control specifications. The
frequency response was obtained with circuit-oriented simula-
tors in similar procedure presented in [17] and [18]. The cir-
cuits analyzed are the classical boost and the single-phase boost
Fig. 49. Magnitude frequency response.
converter with one and two voltage multi-
plier. Two different values for the voltage multiplier capacitor
( F and F) were considered in order to
verify the influence of this capacitance in the dynamic response.
The parameters considered in the simulations are presented in
Table III. The magnitude (dB) and phase frequency response
of the simulated converters are presented in Figs. 49 and 50,
respectively, and represents the small-signal control-to-output
voltage transference function. The frequency response of the
boost converter operating with the voltage multiplier is com- Fig. 50. Phase frequency response.
pared with the well known classical boost response in order to
conclude about the influence of the multiplier circuit in the dy-
namic response. The classical boost frequency response is char- TABLE III
acterized by the presence of two complex poles that results in SIMULATION PARAMETER FOR THE FREQUENCY RESPONSE ANALYSIS
40 dB/dec of gain decrement after the double-pole frequency
and in a total phase contribution of . The transference
function of the classical boost is also characterized by the pres-
ence of a right-half-plane (RHP) zero that results in a magni-
tude increment of 20 dB/dec after the zero frequency and in a
total phase contribution of . There is also the presence of
a left-half-plane zero due to the equivalent series resistance of
the filter capacitor, but normally this zero is located at a much
higher frequency than the others poles and zero. Therefore the
equivalent series resistance was not considered in the simulated
circuit. The magnitude and phase frequency response obtained
with the boost converter with one voltage multiplier — Utilization of MOSFET with low RD due to the re-
is similar to the classical boost. The main difference that can be duced switch voltage.
observed in Figs. 49 and 50 is that the complex poles are lo- — Low commutation losses and low EMI generation are ob-
cated at a frequency lower than in the classical boost. Thus, for tained with the limitation of the di/dt and with the mini-
the voltage-mode controlled boost, a reduction of the crossover mization of the negative effects of the diodes reverse re-
frequency can be necessary in order to maintain an adequate covery current.
phase margin, reducing the velocity of the control loop. Also — High static gain operation without the use of power trans-
can be observed that the increment of the multiplier capaci- former, allowing a reduction of the weight and volume,
tors from 3.3 F to 50 F presents a low influence in the fre- that are important parameters for compact portable appli-
quency response. The insertion of an additional voltage multi- cations.
plier also reduces the frequency of the complex poles. The theoretical analysis and design procedure of the single-
Therefore, the dynamic specifications must be considered in the phase and multiphase versions of the boost converter integrated
definition of the multiplier stage number. A phase-lead com- with a voltage multiplier is presented. The experimental results
pensator can be used in order to improve the phase margin and obtained with the implementation of four prototypes confirm
increase the crossover frequency for a faster dynamic response experimentally the theoretical development and the operation
[19]–[21]. characteristics.
The control loop utilized in the application presented in The implemented prototypes operate with efficiency about
Fig. 47 was implemented with a simple voltage control loop 93% for the single-phase structure and about 95% for the two-
and as a fast response is not necessary in this application, a low phase converter with a range of the static gain form 8.3 to 16.6.
crossover frequency and slow control loop was used. The proposed technique was also tested in a practical applica-
tion for the implementation of an UPS with a 220 induction
V. CONCLUSION motor as load, supplied by a 24 V battery. The static and dy-
The integration of voltage multiplier circuits with dc–dc con- namic performance of the step-up converters implemented con-
verters for the implementation of non-isolated structures oper- firms the good operation characteristics of the voltage multiplier
ating with high static gain is proposed in this paper. The main integration with the dc–dc converters, in high step-up applica-
operation features obtained with this integration are as follows. tions.
PRUDENTE et al.: VOLTAGE MULTIPLIER CELLS
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887
Roger Gules was born in Bento Gonçalves, Brazil, in
1971. He received the B.S. degree from the Federal
University of Santa Maria, Brazil, and the M.S. and
Ph.D. degrees from the Federal University of Santa
Catarina, Brazil, in 1998 and 2001, respectively.
From 2001 to 2005, he was a Professor at the Uni-
versidade do Vale do Rio dos Sinos, Brazil. Since
2006, he has been at Federal Technological Univer-
sity of Paraná, Brazil as Professor. His research inter-
ests include power switching converters and renew-
able energy applications.
Eduardo Félix Ribeiro Romaneli received the B.S.,
M.S., and Ph.D. degrees in electrical engineering
from the Federal University of Santa Catarina,
Brazil, in 1993, 1998, and 2001, respectively.
Since 2003, he has been at the Federal Technolog-
ical University of Paraná, Brazil as a Full Professor.
Professor Romaneli’s research has spanned a several
disciplines, emphasizing power electronics. His in-
terests are focused but not restricted to UPS, power
factor correction and digital control.
Gustavo Emmendoerfer was born in Toledo, Brazil,
in 1981. He received the B.S. degree in electrical en-
gineering from the Federal Tecnologic University of
Paraná, Brazil, in 2006 where he is currently pursuing
the M.S. degree.
His research interests include power electronics,
motion control, and inertial navigation techniques.
Luciano Lopes Pfitscher received the B.S. and
M.Sc. degrees in electrical engineering from the
Universidade Federal de Santa Maria, Brazil, in
1997 and 2001, respectively.
He joined the Universidade do Vale do Rio dos
Sinos, Brazil, in 2001, where he is an Assistant
Teacher and Coordinator of the Electrical Engi-
neering graduation course. His research interests
are solar and wind power generation, industrial
electronics and power electronics.
Marcos Prudente was born in Porto Alegre, Brazil,
in 1978. He received the B.S. degree in electrical en-
gineering from the Universidade do Vale do Rio dos
Sinos, Brazil, in 2006.
His research interests include power electronics
and wireless sensor networks.