DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
SDSD External Practical Exam Date:02-02-2018 I Year M.Tech I-sem DSCE (R-17) Max.Marks: 60
1. Write the VHDL code to design 4-bit adder / subtractor.
2. Write the VHDL code to design Booth Multiplier. 3. Write the VHDL code to design 4-bit ALU. 4. Write the VHDL code to design SISO, SIPO, PISO, PIPO Registers. 5. Write the VHDL code to design Ripple, Johnson and Ring counters. 6. Write the VHDL code to design MIPS processor. 7. Write the VHDL code to design Washing machine controller. 8. Write the VHDL code to design Traffic Light Controller. 9. Write the VHDL code to design “1010” pattern detector using Mealy& Moore state Machine. 10. Write the VHDL code to design FSM/ASM.