. be) System Software = An Introductivn to Systems Prograinming Third Edition Leland L. Beck San Diego State University An imprint of Addison Wesley Longman, Inc. Reading, Massachusetts « Menlo Patk, Californ ‘Den Mill. Ontario « Sydney + Mexico City York + Harlow, England id » AmsterdamChapter 1 Background ‘This chapter contains a variety the material presented Inte: software and an overview of dlscussion of the relationships betw ture, which continues throughout in later chapters, References are provided throughout th readers who want further information. 1.4 INTRODUCTION ‘This tex is an introduction to the design and implementation of system soft ‘ware. System sofaate consists ofa vate tion of a computer. Ths software makes thout needing to know the de- were already using ‘wrote programs in « to crete nd aioeChuper 3 Beco Inlater courses, you probably wrote programs in assembler language. You ay have used macro instructions in these programs to read and write dats, orto perform other higher-level functions. You used an asembe, which prob- bly included a macro processor, to translate those programs into machine lan= fuage. The translated programs were prepared for execution by the loader or ‘put. However, you oncentrate on what you wanted to do, without worrying about hove it was sccomplished. "As you read this book, you will learn about several important types of 33> ‘Chapter 7 contains a survey of some other important types of system soft- editors, and interactive debugging systems. Chapter 8 contains an introduction to software engineering concepts fnd techniques, focusing on the use of such methods in writing system soft “ware This chapter can be read at any time aftr the introduction to assemblers sors contain enough imple ‘these types of software for sputer. Comp ‘om the other hand, are very large topes each has, by itself, been the subject of 1 Sytem Send Machine Arcitare aay complete books and courses. Iti obviously impossible to provide a full coverage ofthese subjects in a single chapter of any ressonable size. Instead, ‘we provide an introduction fo the most important concepts and issues related to compilers and operating systems, stressing the relationships between soft- ‘ware design and machine architecture. Other subtopes are discussed as space ‘permits, with zeferences provided for readers who wish to explore these areas Farther. Our goa sto provide a good overview of these subjects that can also serve as background for students who will later fake more adwanced software ‘courses. This sume appreach is also applied to the othor topics surveyed in Chapter. 1.2 SYSTEM SOFTWARE AND MACHINE ARCHITECTURE ‘One characteristic in which most system software differs from application sofChapin 1 Backrond dificult to distinguish between those features ofthe software that are truly Fundamental and those that depend solely onthe iiosyn: articular ploce of software ty (GIC). SIC is hypothetical compater that has been carefully 44. Major design options for struchuring a particular piece uf sotware— for example, single-pass versus multipass processing, 5, Examples of implementations on actual machines, stressing wns! software features and thote that are related to machine characteristics. spter contains brief descriptions of SIC and of the real machines ‘hat are used as examples. You are encouraged to reac these descriptions now, and refer to them as necessary when studying the examples in each chapter 1.3 THE SIMPLIFIED INSTRUCTIONAL COMPUTER (SIC) In this section we describe the architecture of 15 The Sinpifl Intructonl Compe (SIC) ike many other products, SIC comes in two versions: the standard model ‘and an XE version (XE stands for “extra equipment,” or pethaps “extra expen- sive"). The two versions have been designed to be upward conpatible—that i, program for the standard SIC machine will also execute properly on XE system. (uch upward compatibility is often found on eal comput that aze closely related to one another) Section 1.1 summarizes the stan- of their lowest ni ‘computer memory Rogistors “There are five registers, all of which have special uses, Each register is 24 bits {in length. The following table indicates the number, mnemonics, and uses of these registers, (The numbering scheme has been chosen for compatbility ‘withthe XE version of SIC) Mnemonic __Number_ Special use a‘ 0 Accumulator used for athmetc operations x 1 Indexregiter sed for addressing L 2 Linkage register the Jump to Subroutine OSU) Tretction sme thera addess inusregisee Re 8 Program counter contains the addres of he ent instruction tobe fetched for execton sw 9 Status word: contains a varity of Information including a Cacition Code (CC) SS aIntegers are stored as 24-bit binary numbers; 2's complement representation is ‘values. Characters are stored using their -bit ASCII codes. Instruction Formats ‘All machine instructions on the standard version of SIC have the following 2st format endef wae “The lag bt xis sed to indicate indexed-addressing mode. Addressing Modes “There are two addressing modes available, indicated by the setting ofthe x bit {nthe instruction. The fllowing table describes how the target nres is ealeu- Isted from the address given in the instruction, Parentheses ae used to indi cate the contents of yr a memory location. For example, (X) represents the contents ofregises X. Mode Indication _ Target address calculation Direct = x=0 TAs address Indeed x21 TA=address +0) Instruction Set SIC provides a basic set of instructions that are sufficient for most simple 13) The Simplifd Isewctonal Computer SIC) vided foc sbrotine linkage, SUB mye othe ssbrotine placing the ‘etum adres in egies Ly RSUB rete by jumping fo the adds Cn tained in register L. eee ‘pend gives complet i all SIC a SIC/ Eicon, with ther operation cos anda speciation of the function performed by ech. Input and Output (On the standard version of SIC, input and output are performed by transfor. register A. Each device is /0 instructions, each of whieh SIC. However, the maximum memory 1 megabyte (2 bytes). This increase leads ‘and addressing modes Registers ‘The following additional registers are provided by SIC/XE: Mnemonic Number Special use 3 ase register; used for adress 4 General working reister—no special use 5” General working register—no special use 6 Floating-point acramulator (G8 bits)SIC/XE provides the same data formats 95 the standard version. In addition, ting: point datatype with the following format: "The fraction is interpreted asa value between O and I; that mediately before the higivorder bit. For normalized floating: he high-order bt ofthe fraction must be 1. The exponent is lar memory vlan IC/XE mae ht nas id thus the ingtruction format used on the \dressing, or extend the adress field to 20 Dis. Both ofthese options are inchuded in SIC/XE (Formats 3 and 4 in the fol- lowing description). In addition, SIC/XE provides some instructions that do not reference memory a al. Formats 1 and 2in the following description are ted for such instructions. 1.5 The init instructions Comput (SC) ° Format 2 (2 byte): 5 «1 Mode Inleation Target address catculation Basewlaive b=1p=0 TA=(B)+disp (0 onney WRITE OME BYDE TO cODeUT DavICE Figure 1.6 Sample input and cuput operations fo SiC ‘Output is performed in the same way. Fist the program uses TD to check ‘whather the output device is reauiy to receive a byte of data. Then the byte to bbe written is loaded into the rightmost byte of register A, and the WD (Write Data) instrction i used to transmit ce.Chapter Background u gedgeeee i fa iF i 380 sro RB 14 ‘ation (CISC) Moctine 4.4 TRADITIONAL (CISC) MACHINES “This section introduces the architectures of two ofthe machines that will be used as examples later inthe text Section 11 describes the VAX architecture, and Section 1.4.2 describes the arhitectute of the Intel x86 family of proces.Chepler 1 Background 4s defined separately for each program. A part ofthe process space contains stacks that are available tothe program. Special registers and machine instruc tions aid in the use ofthese stacks. for this purpore, hardovare instructions that implicitly use SP. RI3 isthe frame pointer FP. VAX procedure eal eon- Data Formats 1A Taint (CISC) Mtns per byte. In this forma, the eeparate byte preceding the frst ng mimeic and leading spurte me Instruction Formats struction censists of an operation code (L of 2 bytes) followed by up to six ch operand specifier Addressing Modes VAX provides a lage number of addressing modes. With few exceptions, any ‘used with any instruction. The operand it mode), or is address may be specified by 2 res sina register, th re Instruction Set ‘One ofthe goal ofthe VAN designers was to preduce an instruction st thats symmlric with respect to data type. Many instuction mnemonics ae formed by combining the following elementsChapt Background 1, aprefixthat specifies the type of operation, 2, a suffix that specfis the data type ofthe operands, 3. a modifier (on some instructions) that gives the number of operands Involved, For example, the instruction ADDW2 isan add operation with two operands, ‘a multiply eperation wit 5m ‘operand “SSYIAX provides all ofthe usual type of instacions for computation, data sparson, branching, etc in addition, there are 2 1A Triton (CISC) Machin 1.42 Pentium Pro Architecture ‘The Pentium Pro microprocessor, introduced near the end of 1985, i the latest in the Intel x86 family. ther recent mieroprocessors in £80486 and Pentium. Processors ofthe x86 famly ar presently used in a major- ity of personal computers, and there isa vast amount of software for these processors. tis expected that adaltional generations ofthe x86 family will be developed in the future The various x86 processors differ in implementation details and operating speed. However, they share the same basic architecture. Each succeeding gene eration has been designed to be compat rogremmers usually view the x86 memory asa collection of ‘zymes, From this point of view, an address consist of two parts—a segment toa byte within the segment. Segments can bbe of different sizes, and are often used for diferent purposes. For example, some seganents may contain executable inetactions, and other segments may. bbe used to store dats. Some data segments may be treated as sacks that can be used to save register contents, pass parameters to ubrotins, and for other Purposes. Its not necessary forall ofthe segments used by a program to be in phys ‘al memory. In some cases, a segment can also address specified by the programa is Automatically tronsated into a physical byte address by the x85 MemoryChapter 1 Backgroend Management Unit (MMU). Chapter 6 contains a brie discussion of methods that cam be used in this kind of adress transation, Registers ‘There are eight general-purpose registers, which are named BAX, EBX, ECX, [EDX, FSI EDI, EBP, and ESP. Each general-purpose register is 22 bits long (Le, ‘one doubleword). Registers EAX, EBX, ECK, and EDX are generally used for individual words or bytes from The general-purpose roster set is dente embers ofthe x86 family beginning with the 80386. Tis set is also Segment ze ‘ment and $S contains the address ofthe curent stack segment, The other se5- ‘ment registers (DS, ES, FS, and GS) are used to indicate the eddreses of data segments "Floating-point computations ore performed using a special flating-point tit (FPU). This unt contains eight 80-bit data registers and several other con- 14 Tintiont CISC) Macnee liteendian byte ordering, because the “litle end” ofthe value comes fist in encoded (in binary) Inthe low-order 4 bits ofthe byte: the high-order bits are normally zero. In the packed BCD format, each byte represents two decimal Aligits, with each digit encoded using bits ofthe byte. ‘data formats. The single-preisionChepler? Backrowrd (Operands stored in memory are often specifi using variations ofthe gen- eral target address calculation “TA= (base ester + index restr) * (cae factor) + displacement ster may be used as a base register any general be used as an index register. The scale factor mode). Instruction Set “The xo architecture has a large and complex instruction set, containing more ‘than 400 different machine intructions. An instruction may hee zero, one, Sipaatons and spor conto he poco nd mene management a ” ‘The x86 architecture also includes special-purpose instructions to perform persons fequenty reared in high velpopamming guages for ex “Tipe catering and lenving procedures and Celanese vos age thebound ofan aay Input and Outpus pretixes allow these pertion. 15 RISC Acne 1.5 RISC MACHINES. “This section introduces the architectures of Uwee RISC machines that will be used as examples later in the text. Section 15.1 describes the archilecte of the vantagesand disadvantag 1.5.1 UltraSPARC Architecture “The UltraSPARC processor, announced by Sun Micro lntast member of the SPARC family. Other members of variety of SPARC and SuperSPARC processors. The of iemented by a number processor architecture ‘ange of implementa:Chapter Baked Memory Memory consists of S-bit bytes; all addresses used are byte addresses. Two consecutive bytes form a afford four bytes form a word; eight bytes form a Goubleword. Haliwords are sloced in memory beginning at byte address that fare multiples of 2 Srlanly, words begin at addresses that are mulliples of 4, [and doublewords at addrestes that are multiples of. ‘UllraSPARC programs can be written using a virtual address space of 26 bytes, This addeas epace is divided ito pages! multiple page sizes are sup- ported. Some ofthe pages used by a program may be in physical memory, while others may be stoned on disk When an instruction is executed, the hard "ware and the operating system make sure that the needed page i loaded into ‘be used inthis kind of address tranlation. Registers lap, So some registers in the ‘example, registers 18 through 115 of a calling procedure are physically the fame registers as 124 through 131 of th called procedure. This facilitates the passing of parameters “The SPARC hardware manages the windows into the register file. fa set of, concurrently running procedures needs more windows than are physically “window overflow” interrupt occurs. The operating system must then save the contents of some registers inthe fle (and restore them later) 0 15) RISCMackines Besides thes register files, there area program counter PC (Which contains the address of the next instruction to be executed), condition code registers, land a mumber of other control registers, “There are three basic instruction formats in the SPARC architecture. All of ‘word 'SPARC architecture is typical of RISC proces of instruction fetching and de- ih the complex varisbleength insirsetions found on CISC eystams such as VAX and 386 Adtdreeaing Howes As in most architectures, an operand value may be spcifed as part ofthe in struction i te mois), or it may be in register slirectRegister indirect indexed TA (register) + (egiter2) 1eis used only for branch instructions. iy few addressing modes of SPARC allow for mor ef Instruction Set ‘ordinary branch instruction following the branch 15. RISC Machines ‘common operating system functions. Communication in & multi-processor may allow a compiler to eliminate many branch instructions in order to opti- mize program execution, Input and Output In the SPARC architecture, communication with I/O devices is accomplished tecture include the PowerPC 601,608, andl 604 others are expected inthe near future ‘As its name implies, oweePC is a RISC architecture. As we shall oe, thas alford: four bytes fers ight bytes form a fauna vor, Many istracion may ena(Capler_ Backgront more efficiently if operands ae aligned at starting adress that isa multiple of thei lengt PowerPC programs can be written using @ virtual address epace of 64 bytes This adress spaces divided into fixed length spre, which are 256 rogebytes long. Bach segment is divided into jugs, which are 4096 bytes ‘others may be stored on disk. When land the operating system make s Registers be used to store and manipula .putatons are performed using a special, nisin thst vo 64-bit floating-point regi 15) RISC chins ‘There are two diferent floating-point data formats, The single-precision ‘sores 23 significant bits ofthe floating-point value,hoper 1 Bacgront ‘Branch instructions use one of the following three addressing moves Mode ‘Terget address caleuation ‘Absolute TTA= actual addrese Relative ‘TA. current instruction addres + displacement 25bits, signed} Link Register TA=(LR) Count Register TA=(CR) “The absolute addres o displacement is encoded as part ofthe instruction, Instruction Sot ‘The PowerPC architecture has approximately 210 machine instructions, Somme 15 RISC Machines ‘A reference to an address that snot in diroct-store segment represents 2 orm virtual memory access. In this situation, 1/0 is performed using the regular virtual memory management hardware and software 1.5.8 Cray TSE Architecture “The TBE series of supercomputers was announced by Cray Research, Inc, near 5 (MPP) system, de- Memory Each processing element in the TSE has ts owe local memory with a capacity of from 64 mepabyts to 2 gigabytes. The local memory within each PEis partChaplet Background ofa phypiclly dstibuted, logically shared memory system. System memory \s physieally distributed because each PE contains local memory. System mem- (ory logically shared because the microprocessor in one PE can ‘memory of another PE: ‘The memory with ‘processing element consists of 8bit bytes; all addresses used are byte addresses. Two consecutive bytes form a wont; four Alpha instuctions tasting adress that addresses Registers 1s RISC Metin Instruction Formats ‘There are five basic instruction formats in the Alpha architecture, some of before this fixed length is typical of RISC systems.) Th struction word always specify the opcode; some instruction formats also have ‘an additional function” field Mode ‘Target address calculation PC lative TTA= (PO) + displacement (23bits, signed] Register indirect sath Register indizect with displacement mode is used fot load and store opera tions and for subroutine jumps. PC-rlatve mode Is used for conditional ana ‘unconditional branches, Instruction Sot pprosch can be found in Sach and Weiss Input andi Output “The TSE system perfceme i/ throvgh multiple ports into ane ot more 1/0 hannels, which can be configured ira murnber of ways. These channels areChapter) Bakr integrated into the network that interconnects the processing nodes. system, ‘may be configured with up to one 1/0 channel for every eight PEs. All chan- EXERCISES Section 1.3 41. Write a sequence of instructions for SIC to sot ALPHA equal to the product of BETA and GAMMA. Assume that ALPHA, BETA, and GAMMA ave defined as in Fig. 1.) quence of instructions for SIC to set ALPE tion of BETA » GAMMA. Ascuave thal GAMMA, setting ALPHA [DELTA to the remainder. Use rgisterto-epstrinstvetions to make ‘8 sequence of instructions for SIC/XE to divide BETA by IA setting ALPHA to the value of the quotient, rounded to the nearest integer, Use regster-t-register instructions to make the 6, Wiite a sequence of instructions for SIC to clear a 2n-byte string to all blanks. 7. White a sequence of instructions for SIC /XE to clear a 20-byte string to all Banks. Use immediate addcessing and reister-to-registerin- elements ofthe array to 0. Use immediate addressing and register to- register instructions to make the process a efficent as posable, Suppose that RECORD contains a 100-byte recor a in Fig. 17() ‘Waite a subroutine for SIC that wil write this record onto device 05 RECORD contains a 10Dyte record, as in Fig. 1706) ne for SIC/XE tat wall write this record onto device late addressing and register to-egister instuctions to make the subroutine as eicient as posible able named LENGTH. Use immediate addressing and registe-to- register instruction: to make the subrovtine as eifcient as posible| Chapter 2 Assemblers i In this chapter we discus the design and implementation of assemblers. These an ADD operation. As we shall ee, there are also ssany subtler ‘ways that assemblers depend upon machine architecture. On the other hand, the corresponding tered machine independent assem! tation. Onee again, ou purpose piions But ratherhk? Ascenders concepts and techniques that can be used in new and unfamiliar hich each might be useful. ‘Section 25 we briefly consider some examples 2% machines, We do not attempt to discuss all aspects of these as- etal. Instead, we focus on the most intresting featres that are introduced by harduvare or software design decisions 2.1 BASIC ASSEMBLER FUNCTIONS owing essenBler diztoes: START Specify name and starting address forthe program. END 3 the source program and (optionally specify 22, Basic Asem Functions 6Chapter 2 Aso put device, Each subeoutine must transfer the record one character at time because the only 1/0 instructions available are RD and WD. The butler is nec- tes for the two devices, such as a disk and a slow ‘operating system calls on » SIC/XE system to accom= ions) The end ofeach ecord is marked witha ull charac Ifa record is longer than the length of the buffer (4096 tes by executing an fgram was called by the operating system using 2 SUB instruction; thus, the [RSUB wil tum control othe operating system. 2.1.1 A Simple SIC Assembler in Fig. 21, withthe generated object dress raslaton of source program to abject code requires us to accomplish ‘he following functions (not necessarily in the order given): 1. Convert mnemonic operation codes to their machine language equivalents eg, translate STL to 1 (line 10) 2. Convert symbulic operands to their equivalent machine aldresses— eg. taralate RETADR to 1033 (Line 10) ‘3. Build he machine instructions in the proper format. 4. Convert the data constants specified in the souree program into theit intemal machine representations—eg, translate BOF to 454846 line 80), 5, Wit the bject program and the assembly isting, gags BUSRAGRGSESS® Figure 22 Program from Fig. 2.1 with cbject code,Chapter 2 Accents “Thi instruction contains a forward reference—that (RETADR) that is defined later in the program. If ‘rogram line by line, we will be unable to process this statement because we fo not know the adress that will be assigned to rogram. The first pass definitions and assign “The second pass per form: most ofthe actual translation previously described. the source programy the assem= the object program, and RESB and RESW, serve memory locations without generating dat in our sample program are START, (dress forthe object program, and 21. Basie Acne Factions Co. 2-7 Stating adivess for object exe in this recorhexadecimal) Col.8-9 Length of object code inthis recordin bytes (nadia) Col. 10-69 Object code, represented in hexadecimal @ columns per byte of abject cade) cau E CaL27 Addn fit inal itacton cba progam (hexadecimal) ls, the program during execution, (Chapter 3 containea detailed discussion of the ‘operation ofthe loader) 'wecan now gvea general description fhe functons ofthe wo pases of our simple assembler. Figure 2.3 Object program corresponding to Fig. 22.hepler 2 Assanies ass 1 (define symbols: 1. Assign addresses toall statements in the program. 2, Save the values (addresses) assigned toll labels for use in Pass 2. 3. Perform some processing of assembler directives, (This includes processing that affects address assignment, such as determining the length of data areas defined by BYTE, RESW, ec) ‘Paes 2 (assemble instructions and generate object program): ting operation codes and Iooking, ned by BYTE, WORD, ee rocesing of assembler directives not done during Pas 1. In the next section we discuss these functions in more detail, describe the in- ternal tables required by the assembler, and give an overall description of the logte flow of each pass 2.1.2 Assembler Algorithm and Data Structures ample assembler uses two major internal data structures: the Operation {GYMTAB), OPTAB is used to look 21. Basic Asonber Futons Likewise, we must have the information from OPTAB in Pass 2 to tell us {able—that is, entries are not nermally added to oF del cats ts posible to design a pei hashing anton formance for the particular set of keys being stored. Moat a general-purpese hashing method is used. Puther i lesign and construction of hash tables may be found in ‘good data structures tox, such as Lewis and Denenberg bled instructions. deletion is not an important Loughout the assembly, care ing copy of the source program can also be used to relsin the reels of era22 Machine Dependent Assembler Fats may be performed during Pass 1 (such as scanning the sbols and addressing flags), so these need n during Pass 2. Similay, pointers into OPTAB and SYMTAD may be retained for each operation code and symbol used, This avoids the need to repeat many ofthe table-sarching operations. the logic flow of the two passes of our assem- ly urged to follow through the logic in by han to the program in Fg. 2] to produce 2.2 MACHINE-DEPENDENT ASSEMBLER FEATURES Figure 2.4(a) Aigorv or Pass 1 of assombier. a decom = yell fie iChapter? Asses Figure 2.4(0) Algorthm lor Pass 2of assembler 22 Machine Dependent Asembler Fates Source statement te Eom Teor ron fF (ONO = 0) soe jenn ‘tre comic nae = me Figure 25 Exampl of a SICME orogromChapter?” Assis (Gee line 70), Immediate operands are denoted with the prefix # lines 25, 55, 1158) Instractions that refer fo memory are normally assembled using either relative or the base relative mode. The assembler dirce- se relative addressing. Gee li changed from TIX MAXLEN urn” operation on ine 70) You may nc- for another instruction (as in tice that some of the changes require the addition of other instructions to the program, For example, changing COMP to COMPR on line 150 forces us to del the CLEAR instruction on line 132. Ths sil results in an improvement in fexec:tion speed. The CLEAR is executed only once for each record read, ‘whereas the benefits of COMPR (as opposed to COMP) are realized for every 22, Machine Depot Assn Fetes Implications for operating systems, in Chepter 6} To take fll advantage of ‘specifying a fixed adress at assembly time. ‘of program reaction and discusses its impli- ‘nstaction assembly, how re really to be loaded at snbled using either esembler must in address field, whichis large enough to contain the full memory address. In ‘ths ease, there sno dieplacerent to be calculated. For example inthe instruc tion 350006) corm ROR an1nn03622. Mechine Dependent Ascwbler Fores 8 Line Lee Source statement Object code the operand address is 1036. This full address is stored inthe instruction, with biteset to Ito indicate extended instruction format. [Note thatthe programmer must epeify the extended format by using the prefix + (as on line 15) If extended format isnot specified, our assembler fist i gua f i i 1838 i bam He fo36 i f Se Hae setting ofthe addresaing mode bit #3 ) Another example of program-counter relative assembly. the same as for progre counter relative addsessing, The malin cterence Figure 26 Program trom Fig. 25 with object code. aot - i| ceding instruction (LDB #LENGTH) loads Chapter? Assos that the assembler knows what the contents ofthe program counter will beat execution time, The base register, on the other hand, is under control of the programmer Therefore, the programmer must tell the assembler what the base register will contain during execution of the program so thatthe assem ler ean compute displace the assem - bler dieective BASE. The assembler thatthe base reg program execution. The assembler assumes wunters another BASE statement, Later the contents ofthe base register ean no longer be relied upon ne, important to understand that BASE and NOBASE are assembler dire \dace no executable code, The programmer must provide i Fath proper value into te bose register Gung exeaton. I this roperly, the target addres calculation will not produce the correct gms OPER, $70003 fof base relative assembly. According fo the BASE state- "Notice the difference between the assembly ofthe instructions on lines 20, ‘On line 29, LDA LENGTH is assembled with program-counter rela: 22. Mahe Dependent Ase etree 5 ooo im 8 10003 ype ample of is, wih he operand tol nthe isto 80 and bit set to 1to indicate immediate addressing. Another example can be found in the instruction =i — 131 ane or 4096 Ta this cose the oper used) 12003 ue fiaont 622020 donot know exaly wien jobs wil be submited, eval ow long they wlChapter? Assobions run, etc) Because of this it is desirable tobe able to load a program into mem toy wherever there is room for it. In such a situation the actual starting, d= dress of the program is aot know uni lod time. “The program we considered in Section 21 is an example of an absolute ‘program (or absolute assembly). This program must be loaded at acdvess 1000 {ihe nares that was apecified at assembly time) in order to execute prope. ‘Tosoe this, consider the instruction from Fig, 22. In the object program (Fig. 22), this statement is translated as is tobe loaded from memory 020. other hand, there are parts ofthe program (such asthe constant 3 gener from line 85) that should remain the same regardless of where the {UB instruction would nee to be changed sy adds of RDKEC, Selon 22 MackinsDependntAsenBlerFstes (usu ROREC) (ovsue ORE) sue oneS) Figure 2.7 Examples of program loaton, [Note that no matter where the program is Joaded, RDREC is always 1035 bytes past the starting address of the program. Ths means that we can solve the relocation problem i the following way: 1 hn in me gaat ct ode te BUB srChapter? Assemblers Seti 22. Mache Drpendot Asse Bier Fetes 6 “The command for the loader of course, must also be a past ofthe object pro- bytes away from the STL instruction; thus no instruction modification is ‘gram. We can accomplish this with » Modification record having the following format ‘Modification recor cot M CoL2-7 Starting location ofthe adres fi modified, re- ative to the beginning of the pr sadecimal) CoL8-9 Length of the address field to be modified, in hal: bytes (hexadecimal than bytes) because the address record would be we0000705 cd spaifes thatthe beginning adres Figure 2.8 Objec rogram comesponiing o Fl. 26. ssChapter? Asbo: 2.3 MACHINE-INDEPENDENT ASSEMBLER FEATURES fe discuss soawe common assembler features that are not ‘of such capabilites is much more closely related mer convenience and softwar yment than it is to Section 23.1 we diseus the implemen Die, including the requited data structures and processing logic. Section 2.3.2 language notation, a literal i identified with the prefix =, le, sng the sae nota specifies a Sbyte opersnd whose valve i the character string EOP, Likewise ‘he statement ms 10 Or =H E201 Saggy ga50 8 Gogeiges sana tgiy i ane 22 Machine pod Asan atures oSource statement So “porn fees mS Eo bores-nerm Zee frre igure 2.10 Program from Fig. 2.8 with abjoct code the target address forthe machine instrac- exactly the same as ifthe programmer had ‘would be placed int begin at address 1073. This means operand would be placed too The need for an a= desirable to keep te same literal used ie copy ofthe speci- fied data value. For example, the literal =X05'is used in vur program on lines Idee seiChaps 2 Avemblrs 215 and 220, However, nly one data aren with this value fs generated, Both ‘lust appear in the literal pool. The same problem arises if a litecl refers to fy olher item whose value changes between one point in the program and another ‘Now we are ready to describe how the assembler handles tral operands. tera table LITTAB. For each literal used, ‘Operand value and length, and the ad ‘placed in literal poo. LITTABis of- 25, Machine depen Aerie Fetes signed, the location counter updated to reflect the number of bytes occupied by each literal During Pass 2 the operand address fr use in generating cbject code i ob- tained by searching LITTAB for each literal operand encountered. The data as if these values had been generated al value represents an address in the tion counter value), the assembler must also gon- ‘understand how LITTAB is creatod and used by the asem- apply the procedure we just described to the source ‘object code and literal pools generated should be for improved readability in place of numeric values. For example, on line 133, ‘of the program in Fig. 25 we used the stalement‘There is another common assembler directive that canbe use indirectly assign values to symbols. This directive is usually called ORG (for “origin”. Its fran is inthe program, wecan write line 133 as Chpler?- Asembrs | 213) Machine Indpndnt Ace rts *s ! ms omy RL cm ay OR samo, mo sus ma ay OR vaMe RU SABCEA Gupte cenit ‘This would allow us to write, for example, ion VALUE. to fetch the VALUE fie from the table entry indicated by the contents of reg- ister X. However, this method of definition simply defines the labels it does ro make the structure of the table might be. on wsing ORG in the following orp Ress 1100 snmo. Resa 6 one Snan+2300 “The first ORG resets the location counter tothe val ning address ofthe table) the ale ef the new symcl—mast have been defined prev usin the program Thus the equence mew REM 2 BETA. QU. ALPHA 23. Machine independent Ase Fetes ‘would be allowed, whereas the sequence symbol definition process. In the second a value when iti encountered dur- EPHIA does not yet have 2 valve). hs at the atenbler wou ot kw (ting ‘of handling such sequences in a more complex assembler strc 23. Expressions *Chapter? Asenbrs ‘use of expressions wherever such a single operand is permitted. Bach such ex- ‘pression must, of course, be evaluated by the assembler to produce a single ‘generally allow arithmetic expressions formed according to and /. Division is usually defined term represents th Fig. 29 the siatem« 106 RD a ‘assembler directive) may be either an ab~ ive term depending upon the expression used to define terms may enter intoa miltipliation or division operation. vA relative expresion is one in which all ofthe relative terms except one can be paired as described above; ining tnpaited rolatve term must term may enter into a multiplica- tion or division operation, Express te or eelative expressions should be flagged by the assembler sgh the rules given above may sven arbitrary, they aze actually quite 2] under these definitions include es- oe remains meaningful when the program is relocated, A reat esson represents some value that may be ‘Written as (+1), where 5 is the sarting address of the program and r is the 23. Meine ndpoen! Asner atures ‘value ofthe term or expresion relative to the starting address. Thus a relative ‘the program of ig. 29, In the statement 207 a DBR BLER both BUFEND and BUFFER are relative terms, each representing an address ver, the expression represents an absolute value: the ‘addresses, which isthe length of the buffer area in sociated with the symbol that appears in the + BUFFER, 100 ~ BUFFER, or 3 * BUFFER land generate Modification vocoeds in the objoct ‘der programs that consist of several parts that can cof each ather. As we discuss in the Inter section, ‘our rules fa determining the type of an expression must he modified in-sich instances,Chapter? Assemblers 2.3.4 Program Blocks Inall of the examples we have seen so far the program being assembled was treated a5 a unt. The source programs logically contained subroutines, data areas, ete. However, they were handled by the assembler as one entity, resull> ing in a single block of object code, Within this objct program the generated sachin instructions and data appeared in the same oder ashy were writ ‘igure 21 ram blocks in ts eae yee Block ae sed The is onaared) program block contains the executable instrctions ofthe program. The second (named ‘EDATA) contains all data areas that are a few words or less in length. The third (named CELKS) contains all data arcas that consist of larger blocks of ‘memory. Some possible reasons for making such a division are discussed later {inthis section. ‘The asseubler directive USE indicates which portions of the source pro- gram beng he vat locks, tte epi of he prorat be part of the unnamed lock; if no USE. Statements te included, the entre program belongs to this single block. The USE statement on line $2 signals the Beginning ofthe biock named CDATA. Source statements are associated with this block until the USE statement on ‘continuation of a previously begun block. Thus the statement on resumes the default block, andthe statement on line 283 resumes the TA, each progrem block may actually contain several separate ‘our program. The assembler will logically) rearrange these gather together the pieces of each block. These blocks will then be fsegned aedruses in the object program, with the blocks appearing in the 23. Mac depontow Atco FetusCapi? Assemblers ‘same order in which they were fist begun in the source program, The results the same as if the programmer had physically rearranged the source state- _menis to group together all the source lines belonging to ach block. bal able, the block name or number is stored along with the assigned relative ie ofthe location counter for each block indicates the length of that block The assembler can then assign to each block a starting address in the object program (beginning with relative Joes ‘ion 0). For code generetion during Pass 2, the assembler needs the adress for the object program (not the start ofan indi- ily found fm the information in SYMITAB. location of the symbol, relative tothe start of re (0 = default bloc mation that is stored in SYMAB for each symbol: symbol MAXLEN (ine 107) is shown without « ‘that MAXLEN is an absolute symbol, whose value snot relative tothe start of any program block. the end of Pass? the assembler constructs a table that contains the stat ing addresses and lengs forall blocks. For our sample program, this table Joo ike Blockname Block number Address _Length (efaut o 0000066 pata i 0065 0008 cus 2 oor 3000 [Now consider the instruction 20 9006 © yon ure 32060 or aagaggesyosee yagegag casi Ee] Sagang poqarage gage a a i Figure 2.12 Program from Fig. 2.11 with obec ode. Object codeCChaptr 2 Asonblers 'SYMTAB shows the value ofthe operand (the symbol LENGTH) as relative lo- ‘ation 0003 within program block 1(CDATA). The starting adress for CDATA 4s 0066, Thus the desired target addeess for this instruction is 0003 + 0066 = (0069, The inetruction isto be assembled using program-counter relative ad> location 0000, this address is simply 0008. Thus the required displ (069 — 0009 = 60. The calculation ofthe other addresses during Pas similar pater. ‘We ean immediatly oe thatthe separation of the program into blocks has in the program is also much more easily solv statement in the CDATA biock to be sure ta any lage data areas. (Of course the use of program blocks has not accomplished anything we iscusced, machine considerations suggested thatthe suggested that the source program should be in a f program blacks is one way of satisfying both of these requirements with he assembler providing the required reorganization, Tis not necessary to physically rearrange the generated code inthe object ‘rogram to place the pisces ofeach program block together. The essembler can Simply write the object code as it fs generated during Pass 2 and inset the proper load address i each Text record feflest the stating address of the block code within the block. This process is illustrated in Fig. 2.13. The frst two ext re generated from the source program lines 5 through 70. When the USE statement on line 92 is recognized, the assembler wtes out the current ‘Tet record (even though there ssl room left in i). The assembler then pre- ‘pares to begin a new Text record fr the new program block. As it happens, the $tatements on lines 95 through 105 result ino generates 23. Mahine Independent Asner Features % Figure 2.13 Object program corresponding to Fig. 2.11 records are created. The next twa Text records come from lines 125 through {in the generation of objct code. The fifth Text record contains the single byte resumes the default program block ‘how the assembler handles moiple program pieces of exch program block ave gathered (get subroutines or olor logis! subdivisions of 2 progiam. The programmer can asvamnble, oad, and manipulate each ofthese contol sections separasls, TheChapter? Asenbes Secin23. Mase denn Asse Feats 8 : Program forded Figure 215 shows our example program ast might be writen using malic | ‘Source program Object program TR mOMOY e ple control sections. In this case there are three control sections: one forthe ss tiie Line Sot bc os contol | 1 This et ota Loon at fssember dircive signals the start of «new control section named RDREC. ono over Similarly, he CSECT statement on line 183 begins the contol section named owns | oa gi | COnTA Jom | cour a eta) s oat | ‘| ous soar fo | SONAR) ns conraey | i ta ‘onrnar | ZI cor | ses) COATAR couxsen ota) s {ine 207). The order in which symbols are listed inthe EXTDEF and EXTREF 2 coATASY statementsis not significant hore ‘Now we are eady to look at how extemal references are handled by the Figure 2.14 Program blocks from Fig. 2.11 traced through the assem ‘bly and loading processes. resting flexibility ea major benafit of using contro sections We consider ex- amples ofthis when we diseus linkage editors in Chapter 3. ‘When cortzo sections frm logically related parts ofa programy itis neces- ‘operand involves an external reference ‘cusses in detal how the aca linking i performed,fe 30 beer eee, { sahegdagea®sggey i { sangue sess" dageheayy : 5 i i 5 i pearly i 8 i i a Figure 2.16 tstration of contol sections and progam linking Figure 21 Program rom Fig. 2.18 wih objec code,makes an external refezence to BUFFER, The instruction is extended format with an address of zoro. The x bit ddexed addressing, as specified by te instruction. The 2900028 MUGEN ORD OPD-BUPPER fx word to be generated is specified by an expression involving ber stores this value between the handling ofthe expression on line 190 and line 107, The symbols BUFEND and BUFFER are the values of external symbols. The fn the object program that will aus where they ae required. We need two new record types in the object program and a change ina previously defined record type. As before, the exact format ofthese records i arbitrary: however, the same information must be passed to the lor in some form. symbols that are used as , symbols named by EXTREE Section 23 Machine terete Assn ators cot D Col.2-7 Name of external symbol defined in this control section CoL8-13 Relative addrese of symbol within this control section (hexadecimal) Col, 14-73 Repeat information in Col. 2-13 for other external symbols Refer recor Colt R CoL2-7 Name of external symbol referved to in this control, section CoL8-73 Names of other reference symbols ‘The other information needed 1m linking is added to the Modification record type. The new forme follows. Moalfcaton record (revised) Colt M CoL2-7 Stating addres ofthe fold to be mortified, eatve to the beginning ofthe conteo section (hexadecimal) Col 8-9 Length ofthe fel to be modified, in hal-ytes thera decimal) Col 10 Modification fag (+ or) Col 1-16 External symbol whose value isto be added to or sub- tracted from the indicated field “he first three items inthis record are the same as previously discussed. The tro new items specify the modification to be performed: adding or subtact- 3 symbol. The symbol used for modifieation may through End) for each control section. The records foreach control section are ‘exactly the same as they would be ifthe sections were assembled separately ohtrol Section: For EXTREF symbols, ‘These symbols are simply named inthe Refer recorCopter? Assnblers gpra0oggesqgszeessro0oges Figure 2.17 Object program coresponcing o Fig. 2.15 [Now let us examine the process involved in linking up external references, beginning with the source statements we discussed previously. The address Feld for the JSUB instruction on line 15 begins at relative address 0004, Its ni- tial value in the object program is zero. The Moxilicalion recor, ROR section COPY specifies thatthe address of RDF vs producing the correct machine intructo odifcaton. recone in COPY perform sim PE: 23. Mackinelndependet Assembler Feces instructions on lines 35 and 65. Likewise, the frst Modifica trol section RDREC fills in the proper address forthe: line 160 ‘The handling ofthe data word generated by ine cent, The value ofthis word isto be BUFEND-BUFH omChapter 2 Asenbrs tion The reason issimple—if the tvo tems represent relative locations in the gardless of where trol sections their diference has a value that is unpredictable (and therefore probably useless), For example the expression ora SUFFER has sits value the length of BUFFER in bytes. On the other hand, the value of the expression is the difference in the load addresses ofthe two control sections. This value depends on the way rur-time storage is allocated itis unlikely to be of any for ertors We discus this further in Chapter 3 when we examine the design of allinking loader. 2.4 ASSEMBLER DESIGN OPTIONS In this section we discuss two altematives tothe standard two-pass assembles logic. Section 24.1 describes the structure and logic of one-pass assemblers. “These assemblers ae used when it is necessary or desirsble to avoid a second ‘pass over the source program Section 2.42 introduces the notion of a mult- [poss asserbler, an extension to the two-pass loge that allows an assembler to handle forward references during symbol defiition. 2444 One-Pass Assemblers In his section we examine the structure and design of ocerpass assemblers. AS swe discussed in Sector. 21, the main problem in trying to assemble a program 24. Assembler Osien Options It's easy to eliminate forward references to data items; we can simply re- {quice that all such areas be defined in the source program before they are ref- addres is inserted into any instructions previously gaerated,24 Assembler Design Options Capi? Asembiers _An example should help fo make this process clear Figure 219(a) shows the obj bol table entries as they would be ater scanning line ——_--__4 i e ge [SUBROUTINE 10 READ RECORD INTO BUFFER 4 wos fe pwr So Reoe So Bar : men Borrn.x nee emt mon ae 2020 Sm nem 2 Figure 2.1%) Object-cade in memory the rog:amin Fig. 2.16 aller scanning line Figure 2.18 Sample program fora cne-pass assemble eresCaplar2 Assndlos Symbol Value Contents 0050060 00s [mor] }o[mi[ L0o? Figure 2:19(2) Object code in memory and symbol table enisies for the program in Fig. 2.18 ator scanning ne 160. eferences will be filled in propery. At the endl ofthe program, any SYMTAB cate undefined symbols. These should countered, the assembly is complete. If searches SYMTAB for the value ofthe symbol named in the END statement (in this case, FIRST) and jumps to this lo- ‘ation to begin execution of the assembled program. ‘Wie use an absolute program as our example because, for assembler the actual address must be known at assembly time. Of eourse i is ‘counter would $e initialized to the actual program produce object programs as output are often used on al wocking-storage devices (forthe intermediate file between the two passes) are not available. Such assemblers may also be 24 Assembler Desig Optima ‘useful when the external storage is slow or is inconvenient to use for some symbol is encountered instructions that made forward references to that sym- addresses of the operands. More advanced. 0620206 eygeredgges06s¢ca000 Figur 2.20 Chet progam fom ones soem iorprotan in Fig. 2.18. "9 Caper? sends were not allowed. You are encouraged to think about ways of removing some ofthese restrictions (ee the Exercises for this section for some suggestions). 2.4.2 Multi-Pass Assemblers In our discussion ofthe EQU assembler directive, we required that any symbot Restrictions auch as prohibiting forward references in symbel definition ‘setious inconvenience for the programmer. As a mattr of program as wel as fr the assembler. Nevertheless, figned to eliminate the need for such restrictions. The general solution is ‘multipass assembler that can make as many passes as are needed to process the definitions of symbols, Tis not necessary for such an assembler to make ‘more than two pastes over the entie program. Instetd, the portions of the ‘progeain that involve forward references in symbol definition are saved dur fing Pass 1. Additonal pases trough these stored definitions ave mae as he Ing ofthe statement 246 Assembler Design Options %° marss oy uu not yet beon defined, so no value for HALFSZ. can be com- ining expression for HALFSZ is stored in the symbol table in Warsz [er MAREN . o Figure 2.21 Exemole of mut-pass assembler operation.‘0 Chapter 2 AsenBlos BaFEND [+ waure [et] mane Twaxcen [ea] BUrENGEUFFER aurren [> [4px @ eure [> > [macen vauree [ei ppanuewe e prever [av[Ourren ° wari [aajerenmourren [oy —>[vairez jeurren [* tof paever [o @ Figure 221 (conte) 2 Assembler Deir Options evar [ia —! curren [iaoe ARLEN [somo urFER [1068 o Figure 221 (conta mo «fffollowed with the definition of MAXLEN [see are two undefined symbols involved inthe defi- to show that only on ‘The other symbol in the lst (PREVBT) can be evaluated becas only on BUFFER. The valve of the defining expression for PREVI Iated and stored fn SYMTAB. The results shoven in Fig. 221) ‘embler would flag them as erors "The procedure we have just described applis to symbols defined by sembler directives ike EQU. You are encouraged to think about how this [method could be modified to allow forward reierences in ORG statements as wall, 2.5 IMPLEMENTATION EXAMPLES We discussed many ofthe most common assembler features inthe preceding sections, However, the variety of machines and assembler ‘great. Most assemblers have at machine architecture or languag amples of assemblers fo ‘gorithm and data structures describe eater + 25. nplementation Exomples “The assembler examples we discuss ae forthe Pentium (x86), SPARC, and PowerPC architectures. You may want to review the descriptions of these “architectures in Chapter 1 before proceeding, . 2.5.4 MASM Assembler ‘This section describes some of the fatures ofthe Mirosoft MASM assembler i aystems. Further information about MASM can be ). ‘Section 142, the programmer ofan x86 system views memory asa collection of segments. An MASM assembler language program i Neti of segments, Each segment i defined as belonging to orresponding to its contents, Commonly used classes are a parti ‘CODE, DATA, CONST, and STACK, ‘During program execution, segments ere addressed via the x86 segment registers. In most casts, code seginents are addressed using register CO, and er 58. These segment registers are stack segments are addressed using ‘nutomaticaly set by the system loa sat o indicate these i he programmer does not specify a segment register, one 1 9- lected by the assembler. By default, he assembler assumes tha ll ferences to data segments use register DS. This assumption can be changed by the assembler directive "ASSUME. For example, the directive ASSN ES:DROASE tells the assembler to assume th TS indicates the segment DATASEG2, Thus, any references to ‘be assembled using register ES. Ibis into a group and use ASSUME to associate a segment register with the group. ‘ewiters D5, ES, FS and GS must be loaded by the program before they canbe used to address data segments. For example, the instructions yer ax, ONDA my ESA | | | etChapter 2 Assos ‘would set BS to indicate the data segment DATASEG2. Notice the similarities between the ASSUME directive and the BASE directive we discussed for SIC/XE, The BASE directive tlls a SIC/XE assembler the contents of register programmer must provide executable instructions to load this value into the register. Likewise, ASSUME tells MASM the contents of a segment register the programmer must provide instructions to load this rgistr when 2 different segment register, which i specified in an instruction pref. The as sembled machine instruction fora ness jump occupies 2 or 3 bytes (depending {upon whether the jump address is within 128 bytes ofthe current instruction). jump roquires 5bytes. ‘By default, MASM aspumes that a forward jump isa near jamp, set of the jump isin enother code segment, the programmer must assembler by waiting If the jump address i within 128 bytes ofthe curren instruction, the program- rer an specify the shorter (2 byte) nea jump by wating 25 Implonetion Examples erro) In ater versions of MASM, the assembler can repeat Pes 1 to generate the correct location counter values ‘Notice the simulates between the far jump and the forward references in SIC/XE that require the ws of extended format instructions, ‘There ae eso many other situations in which the length of an assembled re wsed.F instruction depends onthe operan ‘The object program from allow easy and elficient execution of the program in a vasiety teavironments, MASM can also produce an instruction timing listing that Shows the number of clock cycles required to execute each machine instruc- tion. This allows the programmer to exercise a great deal of contol in eptimiz~ ng timing,eritical sections of code. 2.5.2 SPARC Assembler “This section describes some of the features ofthe SunOS SPARC assembles Further information about this aesembler can be fos in Sun Microsystems (a9). eat LamesChaplr? Asonblers _ASPARC assembler language program is divided into units called sections, “The assembler provides a set of predefined section names. Some examples of hese are TEXT ——_-xcoutable instructions DATA _Initalized read/write data RODATA Read-only data Bs Uniniilined data areas sections, speliying section atrbutes such as A swea symbol is similar to a global symbol ak symbol may be overridden by a global sym- bol with the same name, Also, weak symbols may remain undefined when the 25. Inplenttion Epes BUR 1o0e the ADD instruction i executed befor the conditional branch BLE. This ADD Instruction fs said to be inthe daly slot ofthe branch itis executed regardless However, there is another possiblity. Suppose thatthe orginal version of the loop had been ce uo, 10Chyler? Assemblers language by writing “A” following the operation code. Thus the loop just ise cussed could be rewritten 28 28.3 AIX Assembler ‘This section describes some of dhe features ofthe AIX assembler for PowerPC ‘As we discussed in Soction 152, PowerPC load and stove instructions use ‘base register and a displacement value to specify an address in memory. Any 25. inpomdnatin Bape 109 assembler directive, This is similar in function to the BASE slatement in our SIC/XE assembler language. Thus the statements vent aN, USING BUFFER, é ‘would identify GPRI and GPR as base registers, GPRL would be assumed to The AIX assembler language also allows the programme registers and displacements explicitly in the source program. FChapler 2 Assemblers ‘An AIX asseribler language program can be divided into contra sections using the .CSECT assembler directive. Each contol section has an associated storage mapping ci 2 of the discussed in Secions 233 and 2335. tions. By using asembler directives, the programmer can create tbl of cm tet (TOC fr the assembled program. The TOC contains addresses of control sections and global symbols defined within thec (of these symbols, the program retrieves the needed address from the TOC, and Bers dows not continue to the second pass. In thls case the assembly Hsting contains nly erst could be dtc during Fs ‘were not serious enough to tng will contain ony errors capt for the TOC. The TOC is written after the other .DATA contol sections Relocation and linking operations are specified by entries ins relocation table, similar tothe Modification ecords we discussed for SIC EXERCISES Section 2.1 1. Apply the algorithm descsibed in Fig. 2 to assemble the source pro gram in Fig, 24. Your results should be the same as those shown in Figs. 22 and23, 2. Apply the algorithm described in Fig. 24 to assemble the following SIC source program: sm smn 4000 then uses that adaress to refer to the needed data item or procedure. (Some PRsr ux aeRO types of frequently used data items can be stored directly in the TOC for elf- oo BO dency of ret all references to extemal syibols are done inthis way, mo mux then the TOC the only parts of the program involved in relocation = com and Linking wh (ee “The ADK assembler &, ‘used for SIC. Hove wer a S08 ofthe AIX assembi cot RE sages. exer ar wo WED 0 rom RE a> rmsr li utChapter? Asenblrs 3. As mentioned inthe text, @ number of operations in the algorithm of they might be implemented. 44 Suppose that you are to write a“ eceating the source program? 5. Many assemblers use feeformat input. Labels must start in Column 1of the source statement, bu other fils (opcode, operands, com= mess) may begin in any column. The various fields are separated by blanks. How could our assembler logic be modified to allow this? 6, The algorithun in Fig, 24 provides forthe detection of some assembly hich reserves bytes of memory and initializes all ofthese bytes to the characte ‘¢. For example, ine 105 in ig. 25 could be changed to BUFFER FSB 408% ‘This feature could be implemented by simply generating the re- lange increase inthe size jest progeem in Fig, 28 Propose a way ta implemen this new form of RESB without such a large increase in object program size. 6. Suppes: at you haved wopatsssemblr that swt seco ing the algorin In fig 24. Inthe cae ofa duplicate symbol, Execs 3 (his assembler would give an error message only forthe second (ie, duplicate) definition. For example it would give an error message only ofthe program below. 1 6 suse 1000 3 ME mmm mei 5 mR Worm 6 = ‘The waming messages should appear inthe assembly listing di Dbelow the line that contains the unreferenced label, as shown ab Deserbe the changes you would make inthe assmbler to ad cis,Capt? Assent new diagnostic feature, In making this modification, you should change the existing assembler as litle as possible. Section 2.2 Could the assembler decide for itself which instructions need to be scembled using extended format? (This would avoid the necessity the programmer to code + in such instructions.) statement simply gives informa- must also wete an instruction to the base register Could the as- tically generate the LDB instruction from the BASE ‘0, what would be the advantages and disadvantages of di 13, Generate the object code foreach statement in the following SIC/XE rogram: ox er ° om 0B coun RSW moe RES mm FES rom Fe 10 handle ail of the these modifica in Chapter 8? erie 6. Modify the algorithm described in Fig. 2 to handle relocatable pro- {grame, How would these modifications be reflected inthe assersbler ‘designs discussed in Chapter 8? 7. Suppose that you are writing a disasembler for SIC/XE (see Exercise 2.14) How would your disasembler deal with the various address- Jing modes end instruction formats? fSIC/XE Format instructions specified that the 9. Our Modification record forma is well suited for SIC/XE programs becart all address fields in instructions anc data words fall neatly information without this large increase in object program sza? nsonly program-counter relative addressing. rectaddzessing instrction formats and no base relative addressing) ‘Suppose that you wish to assemble an instruction whose operand is an absolute address in memory—for example, ia 100 to load register A ing an assembler for a machine on which instruction depends upon the type ofthe pear, Conde fer ample te flowing thre gents of am te 13) o nop aaa wR be P01 MA fC DI3.14155) In case (a), ALPHA isan integer operand the ADD instruction gener- |, ALPHA is a double-precision floating.point trction generates bytes of object code What special problems does such a machine present for an assem bier? Briefly describe how you woud solve these probiems—thats, hhow your assembler for this machine would be diffrent from the assectber structure deseribed in Section 21. Section 2.9, 1, Modify the algorithm described in Fig. 24to handle literals 2. In the program of Fig. 2 and 1452 Way might we} 3. With a minor extension to our literal notation, we could writ the in struction on line 55 of Fig. 29 8 vantages and disadvantages of ech? ta the other? 5, Suppose that you have a tworpass SIC/XE assembler that does not they are usd inthe assembler 6. Suppose we made the following changés to the program in Fig. 29: 1. Delete the LTORG statement online 93. ». Change the statement online 45 to #LDA. ‘Show the resulting object code for eral pool with addresses and data rsa the entire program te do sequences of statements? 17Chapter 2 Ascendo: a LDA ALPHA-BETA » LDA ALPHA sus BETA 8, What isthe difference between the following sequences of state- ments? a Loa #3 bo ouREE BQU 3 Tox THRE TREE BQU 3 ion THREE 9, Modify the algorithm described in Fig, 24 to handle multiple pro- grim blocks. 12, Which ofthe features described in Section 2.3 would create addi tional problems in the writing ofa disassembler (see Exercise 2.147? [Deseribe these problems, and discuss possible solutions. 13, When different control sections are assembled together, some refer ‘ences between them could be handled by the assembler (instead of (correspon ing to's. 213) 6. xeon Aesirable to separate the parts of that require intalization (eg, in- Instructions and initialized data items Reserved storage (uninitialized data ters) the rearrangement as described above Describe a way in which this separation ofthe program could be ac- complished by a two Suppose LENGTH is would be the differe ments? a OA umcrs sua #3 bo LDA momen Referring to the definitio type, and intuitive meaning (i ‘a. BUFFER-PIRS? Db. BUFFER+4095 KLEE di SBUPFERABEEEN-I i asnewont sogram of Fig. 29. What wing sequences of sate give the vale, the following expres usCapler? Assnbies fg reaueN-2 hb. sooen-BuFFER i. PIRST+sUFPER j. PIRS?-BUPPERSBUPEND 18, In the program of ig. 29, what i the advantage of writing (online 107) vos pS BIPRID-BORPER instead of wou py 4095 7 19, In the program of Fig, could we change line 190 to MUN BR SERD-BEER and line 133 to sur oa aswedid in Fig. 29? 20, The assembler could simply assume that any reference to a symbol not defined within @ contol section is an external reference. This ‘change would eliminate the need forthe EXTREF statement. Would thisbe a good idea? 21, How could an assembler seed for an EXIDEF sta dlisadvantages of doing this? references avoid the the advantages and 22, The assembler could automatically use extended format fr instruc ges and disadvantage of doing this? several difer- program blocks can. What problems does this pose 5? How might these problems be solved? 7 ee sa _ 2A, Assume thatthe symbols RDREC and COPY are defined asin Fig 218, According to our rules, the expression any data structures or slgorthms ir Section 2.4 1. The process of fixing up a fow forward references should is less overhead than making a complete socond pass of the program. Why don’t all assemblers use the one-pass technique for ficiency? 2. Suppose we wanted our assembler to produce a cross-reference list- ing forall symbols ured in the program. For the program of Fig. 25, sucha listing might look lke Symbol Defined online Used on tines1m Captor 2. Asembor ‘How might this be done by the aseriber? Indicate changes to the logic and tables discussed in Section 2.1 that would be required. 3 Could» one-pass assembler produce a elacatble object program and has wold be 44. How could literals be implemv 5. We discussed could only be de an instruction ike ugh instruction operands 23 one-pass assembler han mp BmeTS yetben defined? 6. Outline the loge flow for a simple one-pass load-and-go assembler 7. Using the methods outlined in Chapter 8, develop a modular design fora cne-pass assembler that produces object code in memory. 9, The proces of Fixing up forward references ina one-pass assembler juces an object program is very similar to the linking process in Section 2.35, Why didn't we just ze Modification up the forward references? 10. How could we extend the methods of Section 24.2 to handle forward references in ORG statements? Section 2.5 1. Consider the description of the VAX architecture in Section 1.41. es would you expect to find ina VAX assem description of the T3E in Section 1.5.3, actonstics Would You expect to find ina T3E assembler? Chapter 3 Loaders and Linkers [As we have seen, an object progratn contains translated instructions and data ‘alues from the source program, and specifies addresses in memory where these items are tobe loaded. Our discussions in Chapter 2 introduced the fol lowing three processes: 1. Loading, which brings the object program into memory for execution. hich modifies the cbjet program so that it can be loaded cess diferent from the Ieation originally specified (see Section 22.2) 13, Linking, which combines two or more separate object programs and supplies the information need to allow roterences between them (Gee Section 23.5). 1 Toading are closely related, this chapter s similar in structure tothe preceding one. Many of the same exam- in this chapter. ‘connections between program translar tion and loading(Chaplet nd Likert ‘As in the preceding chapter, we begin by discussing the most basic soft ‘ware function—in this case, loading an object program into memory for execs: ‘ton, Section 3.1 presents the design of an absolute loader and illustrates its operation. Such a Toader might be found on 2 simple SIC machine that uses the sort of assembler desribed in Section 2. Section 3.2 examines the issues of relocation and linking from the lader's point of view. We consider some possible alternatives fr objet program rep- resentation and examine how these are related to issues of machine architec- ‘more advanced type of somputing systems. ‘Of software tat ate elated ta hardware or software design decisions. 3.1 BASIC LOADER FUNCTIONS In this section we discuss the most fundamental functions ofa loader—bring- ing an object program into memory and starting its execution, You bly already familiar with how these basic functions are perfor section is intended a5 a review to set the stage fr our later discuss advanced lotder functions. Section 3.1.1 discusses the functions and design of fan absolute loader and gives the outline of an algorithm for sucha loader. Section 3.1.2 presents an example ofa very simple absolute loader for SIC/XE, to clafy the coding techniques that are involved 3.1.1 Dasign of an Absolute Loader ‘We consider the design of an absolute loser thet might be used with the sont of psembler described in Section 21, The objet program format used is the same as that deserbed In Section 21.1. An example of such an object program Isshown in Fig. 5.1()- 22, Rosie Laator FunctionsChapter Loder and Liers Figure 82 shows an algorithm forthe absolute loader we have discussed deserves fram), they will . execution, however, ths operation code must be stored in ‘Thus each pair of bytes fam the object program. ‘one byte during loading Is very img ‘nthe ater hand, ech printed character memory ie, a halt) both space and execution time, Therefore, most machines store object pro- toned as a single byte in the object program. In this type of representa tain any binary value. We must be sure tha inary object program. ‘Obviously object programs stored in binary form do not lend themselves swell o printing oF to Teading by human beings. Therefore, we confinuc to wse character representations of object programs in our examples in this book. Figure 32 Algeitim for an absolute loader SM Basic Lado Punctims 3.1.2 A Simple Bootstrap Loader ‘When a computer is fist turned on or restarted, a special type of absolute loader, caled'a bootsirap lander, 's executed. This bootstrap loads the fist pro- ‘to the value in register X. (Because we are not intrested in the ‘ond operand for this instruction) ww7” 52 Machine Dependent Loe Fetes mw diffrent kinds of error conditions that might arise ducing the loading, and how these could be handled. 3.2 MACHINE-DEPENDENT LOADER FEATURES sharing memory (and: ‘we do not know in al ff the machine requires130 Chapter 3 Leeder end Linkers Section 3.23 digcuases the data structures used by a typical linking (and re. locating) loader, and gives a description ofthe processing logic involved. The algorithm presented here serves a 8 stating point for discussion of some of the more advanced loader features in the following sections. part of the object that introduced in in part ofthe object ie afectd by 7 bject program corresponding to the source in “Modification record for each value that must jon records, which results in an object program nein Fig. 35. rare than twice as 285 Figure a 3.2, Machine Depdet Later Fetes Source statement ‘Objecteode com sme 0 tm saxon! Bee, ‘tne “ee em son ia a in 6 erm “ome” Eamon mew toon tet Biveen uso f036 Stee A reo “aro Sm hae > INN caer he Sa Bar one x08" {Example ofa SICIXE program (tom Fig. 26). sa 1B3.2, Machine Dende Lote Fetes 133 icteian Figure 37 shows this method applied to our SIC progr de are the same cord specifies that all 10 words of abject code ‘during relocation, These words contain the instructions cor- igh 53 in Fig, 3.6. The mask E00 in the second Text ‘record specifies thatthe fst three words are to be modified. The remainder of {he object code in this record represents data constants (and the RSUB instruc- it comrespords toa relocation bit. The a- semibled LDX ire modification because ofthe direct ad Gress, However if it were placed in the preceding Text recard, it would net be Figure 9.6. Relocetati program fort standart SIC machin edChapt 3 eaters and Linkers mask. use of the Hbyte data 1 mst bepiN a new ine the remainder ofthe object program in Fig 1d how the relocation bits are generated by the as 9.2.2 Program Linking “The basic concepts involved in program linking were introduced in Section 235, Before proceeding you may want to review that discussion andl the ex: amples in that section. ln this section we consider more complex examples of ‘extemal references betwoen programs and examine the relationship between jon and inking, The next section gives an algorithm fora linking and 32 Machine Depot oder Fates volved in the relocation and linking process are omitted. The same applies to tho generated object programs shown in Fg. 38. ‘ation o linking is necessary. In PROGB, on the other hand, the same operand refers to an external symbol. The assembler uses an extended-format instruc- tion with adress field sotto 00000, The abject program for PROG (ee Fi, 39) contains a Modification record instructing the loader to add the value of be the difference between 135,Odjectecode Figure 8 Same programs lusting tnking end relocation Figure 3.9 Object programs conesponding to Fig. 2.8 “7$32. Machine Dependent adr Fates ‘ofthe expression in RE except forthe value of LISTC. This results in an ini- | sure you understand how the objet cade and Modification records in ig. 39 shows these three programs as they(Chapter 3 Leader Linkos _eative) address ofthe nent instruction, We could also think ofthis proces as ‘automatically providing the needed relocation at execution time throug the target edaress calculation. In PROGB, onthe other hand, reference REPL is an fetended format instruction that con‘ains a direct (actual) address. Ths ad- Chess after linking, is 4040—the eame as tho target adciess for the same refer- ‘ence in PROGA. ‘You should work through the tals ofthe other references to see that the target addresses ((or REF2 and REF3) or the data values (for REFS through jams, You do not need to worry REFS) are the same in each ofthe three you are able to carry 0 ‘Structions that aze contained in the object programs) Figure .10(e) Programs fom Fig. 88 afer inkng and loading 32, Machine Dependent Cater Features Memory contents Figure 3.10(0) Relocation and linking operations perormad on Fou ing operations performed on REF 3.2.3 Algorithm and Data Structures for a Linking Loaderthe two passes of a linking loader are quite similar to the two passes ofan as- nal sym, and Pass 2 performs ‘the actual loading relocation, and linking, ‘The main data structure needed for our linking loader is an external sym- bol table ESTAB. This table, which is analogous to SYMTAI assembler algorithm, is used to store the name and address ofeach extemal symbol inthe ‘Sef of contol sections being loaded. The table also often {aol section the sytnbol is defined. A hashed onganization is typically used Chaplets an Linkers ‘anil the later control ssction is read). Thus a linking loader usually makes two passes over its input, just as an assembler does, In terms of general function, 32. Mace Cepondnt Late Fates section ame Length PROGA 068 usta ENDA PROGB owe ust ENDS proce 051 uste ENDC ‘ond (ville # °E") gu GSLIM to CSABUR {starting adcese for next control section) je BOE BOF) igor for Pass + of linking loader.us (Copter Lees and Linkers 32 Machine Depot Lander Features us “The ast step performed by the leader is usually the transferring of control to the loaded program to begin execution. (On some systems, the address Where execution isto begin i simply passed back to the operating system. The user must then enter a separate Execite command, ‘This convention is typical of those found transfer address would be placed in the odifcation is looked up in ESTAB, This value is then added to or subtract~d {rom the indicated location in memory.6 CChepler 9 Lenders an Links Figure 8.12 (conta) 3, Mecve dando! Lae eater programs from Fig. 39 with this change, The reference numbers are under- lined in the Refer and Modification records for easier reading. The common tse ofa technique such as this is one reason vse included Refer records in our object programs. You may have noticed that these records were not use in the algorithm of Fig 3.1. ‘The main advantage ofthis eference-number mechanism is that it avoids to develop an algorithm that includes this technique, together with any addi- tional data structures you may zequire 3.9 MACHINE-INDEPENDENT LOADER FEATURES In this section we discuss some loader features that are not directly related to ‘machine architecture and design. Loading and linking are often thought of as handling external dard subroutines without explicitly including them in the program to be loaded. The soutines are automatically retrieved from a libescy as they are needed during lining, ‘Section 3.32 presents some common Options that can be selected at the time of loading and linking. These Include such capabilites a specifying altr- native sources of input, changing or deleting external references, ancl control ling the automatic processing of external references ‘9.3.1 Automatic Library Search ‘Many linking loaders can automaticaly incorporate routines from a supro- {gram library into the system brary tha i “7Chior Loaders ant Lins automatically fetched from the Morary, inked with the main program, and oaded. The prograrimer does not need to take any action beyond mentioning, the subroutine names os external references in the source program. On some tems, this feature is referred to as aomatic brary el, We use the term brary search to avoid confusion with the ell eetre found in mast progr=m- ring languages Tiking loaders that support automatic library search must keep track of 4 defined, inthe primary input to sols from each Refer record ls are already present. These external symbols that are refered to, but the loader. One easy way to do thi itwould not be included in any ‘The libraries to be searched followed by ating systems ean Keep the directory for comeno Section 33 Machine ponent oat Features in memory. This can expedite the search proces if large number of extemal references ae to be resolved. 85 of brary search has been discussed asthe resolution of call ine. Obviously the same technique applies equally well to the res eternal roferonces to data items. 8.8.2 Loader Options. mip dia en ln ged et pan a posterior programs being loaded and linked. For example, the command DELETE ceactoname might instruct the loader to delete the named control section(s) from theo programs being loaded. The command eee 49 re(Chapter 3 Lenders and Linkers ‘might cause the external symbol namel to be change to mame2 wherever it ap- pears in the object programs, An ilstration of the use of such commands is given in the following example ‘Consider the source program in Fig 215 andthe corresponding object pro gram in Fig. 217. There is a main program (COPY) that uses two subprograms IF RDREC 2 loaded and linked with the progr tistical analysis is not to be performed in a pacticular execution of this pro- dotected during the load for example, unesolved extemal references). 3.4 LOADER DESIGN OPTIONS In this section we discuss seme common altematives for organizing the load- ing functions, including relocation and linking, Linking loaders, a describedChaper 3 Lar ont Linke in Section 3.2.3, perform all linking and relocation at load time. {wo alleratives to this: Linkage editors, which peeform linking 2 discusses linkage editors, which are found on many comput instead of or in alton tothe linking loader. A linkage editor ‘and some relocation; however, the linked program is written raty instead of being inumediately loaded into memory. This ap- proach reduces the overhead when the program is executed. All that i re- ‘doing the inking procs in Ne, However this approach usually involves more overhead than does a linking loader In Section 34.3 we discuss bootstrap loaders. Such loaders can be used to ‘un stand-alone programs independent ofthe operating system or the system loader. They can also be used to load the operating system or the loader itself intomemors 3.4.1 Linkage Editors ‘The essential difference between a linkage editor and linking loader is hus- A linking loader tomatic Rbary search if specified, and loads the linked program direty into ae dt on he te bad, pode «Ene loader can be used to load the p modification necessary isthe adit ‘ues within the program. The linkage editor performs reloce sictions relative to the start of the inked program. Thus, all be modified t load time have values that are relative tothe oan The mea tthe oding ib mtd on symbol table required. This involves much loss overhead than ws- 34. Laaer Design Options ‘of external references and library searching are only performed once (when ‘the program is link edited). In contrast, linking loader searches libraries and program ef and executed, Figure 3.13. Procassing ofan bject program using (a linking loador ‘and (t) Fokage eater.(Caper 3 Loader en Linkrs If the actual adece at which the program wil be Tondd is known in ad- ‘vance the linkage editor ean perform al ofthe needed relocation. The result is inked program thts next image ofthe way the program wl appt in fering extn The nts seg of eh ng Jute object program. Normally, however the added Linkage editors can also be used to bul packages of subroutines or other ‘used together. Ths canbe useful when dea BA Lesde Design Options Save FMMO(SUBLES) ‘The linked module named FINIO could be indexed inthe directory of SUBLIB vunder the same names ar the original subroutines. Thue a search of SUBLIB 34.2 Dynamie Linking Linkage editors perform linking operations before the program is loaded for is fist called. This typeof function is usually called dynamic loading ox io on cl, 155(Chapler 3 Lenders ond Lites Dynamic linking is often used to allow several executing programs to share one copy of a subroutine or Wbrary. Fr example, run-ime support rou tines for a high evel language like C could be stored in a dynamic link library. [A single copy ofthe routines in this Ubrary could be loaded into the memory ‘ofthe computer All C programs currently in execution could be linked to this ‘one copy, intend of inking a separate copy into exch object program. object-oriented system, dynamic linking is often used for references to software objects This allows the implementation of the object and its meth- substantial savings of tm ‘Similarly, suppose that in any ane execution a program uses only afew out of a lange numberof possible subroutines, but the exact routines needed can~ pot be predicted unt the program examines its input. This situation could oc- {for example, witha program that allows its use: to interactively call any of the subroutines ofa large mathematical and statistical library. Input data could ‘be supplied by the user, and results could be displayed a the terminal n this plish the actual fand inking of a called subro trates a method in which routines that are to be dynamical called via an operating system service request, This meth ‘also be ‘thought of as a request to 2 part ofthe loader that is kept in memory during ‘execution ofthe program. Figure 3.14 Loading and cafing ofa subroutine using dynam inking Re(Chapter 3. Landers an Linkers Instead of executing 2 JSUB instruction that refers to an extemal symbol, ine program makes a Toad-and-call service request to the operating system, “The parameter of this request isthe symbolic name ofthe routine to be calle. [See Fig. 3.14(a). The operating system examines its internal tables to deter- imine whether or not the routine i already loaded. W necessary, the routine is Toaded from the specified user or system libraries as shown in Fig. 3.14). CConizol i then passed from the operating system to the routine being called layed binding results in greater lexibility, as ‘quires more overhead since the operating system must process. In later chapters we sce other examples of ‘examples, to, delayed binding gives more ca 3.4.3 Bootstrap Loaders In our discussions of londers we have neglected to answer one important loader itself loaded into memory? OF course, we could gram relocation, We cen simply specify the absolute address for whatever pro- gram is frst loaded. Most often, this program will be the operating sysiem, 35 plomontain Examples ‘hich occupies a predefined location in memory. This means that we need some means of accomplishing the functions ofan absolute loader. Some early ‘computers required the operator to enter into memory the object code for an absolute loader, using switches on the computer console. However, this cee sere on rm is ins rte (On some computers, an absolute loader program is permancntly resident {na read-only memory (RO! ple, the operator pressing a ‘empty and ide system. Ths includes, for example, the operating system itsalf and al stand-alone programs that are tobe run without an operating sytem, 3.5 IMPLEMENTATION EXAMPLES In this section wo briefly examine linkers and loaders for actual computers. As in our previous discussions, we make no attempt to give a fll description of ‘examples we discuss are for may want o eview the desi* craptr 8 Leeder end inks 3.5. MS-DOS Linker TES} keettnintee oe ae icon Gop =, seh a veoh) pa nen ae are eee ogame Figure 3.15 MS-0US object module. 35 Implements ips ‘The PUBDEF record contain st of he ext symbols (cad publ LINK Performs its processing in two passes, following 2 similar approach to that descr segment in the program. In general, seme executaile program in memory. It ‘organized by segment, not by the 1614 (Chapter 3 Laude ant Liners 35. bnplenenttion Exper av onder ofthe object modules. Building a memory image is the most eflicient ‘way to handle the rearrangements caused by combining, and concatenating segmen, If there i not enough memory available to eoatain the entire exe cetable image, LINK uses a temporary disk file i addition to all of the avail ‘The symbol tables fom the input files are processed 0 mate tions and references, and relocation and linking operations wi ' dl suitable fo further ekg | wh all symbolic refeences bound and ready (0 | in which some symbol eference may need to 4 Ache oj, which provides series hat can be bound at un ime | {Wone or mre dynamic cecutabes ‘An object module contains one or more sections, which represent the Ip- sirtions and data ares from the source program. Each section has set of ee Sean” We eS ee(Chapter 3. Lander and Linkers After it locates and includes the necessary shared objects, the linker per- forms relocation an linking operations to prepare the program for execution. ‘These operations are specified inthe relocation and linking sections ofthe dy- namic executable and shared objects, They bind symbol to the actu ‘addresses at which the segments arc loaded. Binding of data references is per~ formed bef of proce dure call i ion. During link-eiting, roferences a procedure linkage table: When a procedure is called forthe ist tine, contol js posed via this tobe to the run-ime linker. The linker looks up the actual the linkage abe. Ths sub- execution, a program can dynamically bind to new shared objects by request ing the same services of the linker that we have just described. This feature al ‘a nuunber of shared objects, depending on particular run, 38.3 Cray MPP Linker “This section describes some ofthe features of the MPP linker tems, Further information can be found in Cray Research ’As we discuzeed in Chapter 1, a T3E system conta processing elements (PEs) Each PE has its own local memory In adlition, any PE can access the memory of all other PEs (this is sometimes refered to as remole memory). However, the fastest access time always resulls from a PE ac- cessing its own local memory “An epplication program on a T3E systom is normally allocated a prtton that consists of several PEs. [ti possible to run a program in a partition of ‘architecture ofthe mae chine) The work to be done by the program is pstition, One comenon method for doing TEs, For example, if partition conciss of 16 PES, the sle- fensional aray might be distributed as shown in Fig, progr zzecute tis loop for subscripts 1 through 16, PEL Peo Pet Pes tt ean) nal nee na oo aes) ne oo ese) could execute the lop for subscripts 17 through 32, of the PEs would share inthe array processing ray elements from its own local memory. Sec of sharing of data and work between PES are collected together, an adress i assigned to each block, and relocation and, linking operations are performed. The linker then writes an executable file ‘thot contain the relocated and linked blocks. This executable ile also species(Chapter 3 Loates ant ies Peo Pet Pen cee cose cote Prva Prete Prato a pe ia Stas ‘Stared Shae ‘sia et one Figure 3.17. TE program loaded on multiple PEs. lone targeted fora fixed numbor of PES EXERCISES Section 3.1, 1. Define a binary objet program format for SIC and write an absolute loader (in SIC assembler language) to load programs inthis format, 2. Describe a method for performing the packing required when load {ng an object program such as that in Fig 3.(), which uses character representation of assembled code. How could you implement this 3, Wha would Le loader using 2 progeamming language? What problems ‘might you encounter and how might these be solved? % i 32 Section Exercises 1L. Modify the algorithm given i Fig, 2.11 to use the bitemask approsch performed using Modification that PROGA, PROGB, and PROGC how how the object programs would cha added to each program: wero wD LISTE rerio MoD REL WD Lismore Berl? WoRD—ENDC-LSTC-100 RE] MRD LISTA-LISTE- BOAO 5. Apply the algorithm described in Fig. 311 to link and load the we ‘iced object programs you generated in Exerc 4 6. Using the methods outlined in Chapter 8, develop a modular design {or relocating and linking loader. Jnclude the detection of improper aggested in the lexi. Gee Section ‘What problems arise in per- described in Section 323, 167(Captor 3 Las nd Likes yorum equ 4036 and other control sections could refer tothe value of MAXLEN a an extemal symbol. Deseribe a way of implementing this new feature, {including any needed changes in the loader logic and abject program be loaded and executed. The computer system uses a e- location in memory that different fom where ‘Gohere XYZ fe an external reference) would be assembled as if it 1B. “ 15, where PXYZ isthe pointer word containing the addres of XYZ. ‘What would be the advantages and disadvantages of using such a method? Suggest a design fr ones linking loader. What restrictions Gt any) would be require? What would be the vantages and dised- ‘antagesofsuch a onepass onder? Sone progeamming languages allow data lems tobe placed incom ron arts Thece stay be move than one common are (with diferent dames) in a soure program. We may think of each common arenas sto ection nthe objet poy ‘memory. (These common areas may be of different lengths in the dif- ferent programs declaring them) This assignment of memory estab- lishes an equivalence between the variables that were declared in ‘common by the diferent programs. Any data value stored into « ‘common area by one program is thus available to the others, ow might the loader handle such common areas? (Suggest modif- cations to the algorithm of Fg. 3.1 that will perform the necessary processing) Suppose that you have a one-pass assembler that produces object code directly in memory, as described in Section 2.4. This assembler ‘was designed to assemble and run only one control section. Now you want to change itso that ican assemble and run a program that Consists of several diferent contol sections (as illustrated in Fig, 215. Describe the changes you would make io 109x0 (Chapter 3 Lear a Links In the object program, the assembled instructions are contained in type TI records, the variables in type TV record, and the constants in lied to the loader at the time the progr Describe how the assembler could separate the object program into “TL TV, and TC records as described above. Describe how the loader ‘would use the information in these records in loading the program, . Consider an extended version of SIC/XE that has a new register R The contents of R cannot be accessed or changed by the user pro- gram. When a program is loaded, however, the loader sets register R 50 that it contains the starting addcess ofthe program. For simplicity, assume that this version of SIC has no program-counter or base rela {ive addressing—thus, all instructions tht refer to memory must use Format 4 veces steuction would actualy refer to memory address 5800.1 R contains £800, executing the same instruction would actually refer to memory ‘adress 8800. ‘Consider the contol sections shown in Fig. 3.8 Assume that these ‘contol sections are being loaded and linked atthe addresses shown {in Fig. 210; thus the loader wil et register Rto the value 4000. What value should appear in the External Symbol Table of the loader for the symbol LISTE? What should the instruction labeled REF? in con- ‘rol section PROGC look like af ding and linking operations ‘nave been performed? 1, Modify the algorithm in ig, 3.11 to include astomatic brary search sume that the details of 3, Suppose that the loner isto produce a listing that shows not only the addresses assigned to external symbols, but also the crose- references between conte ‘What information might be how you might implement this feeture and include a description of any data structures needed. Section 3.4 1. Define a madtle format suit produced by a linkage edi to be reprocessed by the Yinka locating loader shat would programs inthis format.(Chapter 3 Lode nd Les 2. Dane « module fom util for mpremingHrked prograns te sopoctaed by fe lnkage editor Describe how you format al lows for both one-passloeding and relinking 1. Store the source and object versions ofthe program; use a linking loader each time the program is tobe executed. program and ferences to library subrou! loader each tine the progr Store 4. Store the soutee program and the linked version with all extemal references resolved. Use a relocating loader each time the pro igramis tobe executed. fe. Store the source program and a linked version that has all exter wed. Use an ab- chime the program sto be executed. ions might each of those approaches be appropri- ‘changes ate required in the source program. to tenet 4 Dynamic linking, as described in Section 34.2, works for transfers of control only. How could the implementation be extended so that to improve the efficiency of dynamic linking by for the operating system tobe involved inthe reuse the space). Will the method rise 5 still work? What problems arse, 17. What kinds of errors might oc ction shold the bootstrap Toa SIC/XE bootstrap loader show checking. Dootstrap loading? What such errors? Modify the to inchide such erro Section 3.5 the deserpti racers we VAX architecture in Section 141 lotto find in a VAX linker and leader? 2. Consider the aChapter 4 Macro Processors {implementation of macro processors ted to macro) is simply @ notational conve- save the register contents RECS) could be used to reload the register contents aft involve the substitution of cuss these more general uses of macros. Deseune erences ene re nen ann ECaper 4 Mac Proce Section 4: introduces the basi concepts of macro processing, including ‘macro definition and expansion. We also present an algorithm fora simple ‘macro processor. Section 42 discusses extended features that are commonly programming language. ‘which isnot ted to any pa found in the references cited throughout this chapter. 4.1 BASIC MACRO PROCESSOR FUNCTIONS: In this section we examine the fundamental functions that are common t al 41.4 Macro Definition and Expansion Figure 41 shows eof a SIC/XE program using macro instructions. ‘This program has the seme functions and logi asthe sample program in Tig. 25; however the numbering scheme used forthe source staements hes been changed. 41 aie Macro Paces Functions “this program defines and us WRBUFF, The funetions and logic GINDEV wherever it occurs in the body of the macro. Similarly, BUFFER is sulstituted for &RUPADR, and LENGTH s substituted for &RECLTH.be ine sce statemen! = |i cao a 904 or aK08 387 MAXIMIM RECORD LENGTH om 1902 D rn ‘TEST INPUT DEVICE Sam mm: ti«* «Cw m "3 or me nc s 4907 » xR AD Ginsaceme Dio ti A . 190% carr AS ‘esr FOR Be OF RECORD s 1904, = sa ‘ExCT LOOP IF HOR £ 1905 ‘STC BUFFER, (STORE CHARACTER IN BUFFER = es oo ‘tern, ur 1F me ron 1% 20 Vesorr Ge surname $Ru72 CORT rSAD 0 i, frame ar CMR rua merER wie = ae oper Bs, 2 —— fap ag ‘210E . x05 WRITE CHNRACTER 140, oe Sond padlgymee “WOOP UNTIL, ALL CHARACTERS Stems um anor 20n bea 7 = ¢ Se camera & S & ——— is aa Bo bore ae SS oe ca ve um Porat fr me i ssn tox ee xr comtcmen rock STR 180 First Th oo SEER 1204 D> =05" ‘TEST CUTPUT DEVICE So Ske awe FLcBrrm ners no MDD 2 e iow wn mee as ei pee ee ars are concn as = ar 3¢ sor oN os ma 7 {hor umn, me caer a ‘Sor Seemann we eos MD = ae oe nora, Mowe Shecesmas Sar HP aRER | ou ee ee ey mot oF HEGRE er 6-BITe UFTER ANA fore tam 186 {oes Ror MEA {os a = i Figure 42. Program fom Fig. 4.1 wit macs sxpanded. Eo Figure 41. Use of macros ina SICIXE pregramChaper 4 Macr Processors 4 , TE Bie tee Process Bits 181 walt a 2 Lines 190a through 190m show the complete expansion ofthe macro invo- a 4.1.2 Macro Processor Algorithm and Data ‘cation on line 190. The comment lines within the macro body have been a Ss a definitions are ‘only when an invocation of MACROS or MACROX ‘ments that form the expansion of a macro are generated (and assembled) each ¥ pees aa time the macro is invoked, Statements in subroutine appear only once, r= ‘A one-pass macro processor that can alternate between macro definition from the body af our macro defi- generally considered to be a poor programming | tis somewhat less objectionable within a macro defin- Thon, however it sil an incarvenient and error prone method. In Section 442.2 we discuss ways of avoiding this problem. instruction defined, NAMITAB contains pointers to the beginning and end of the definition in DEFTAB,(sicrm versien) io (eed of Bue? ian (ind of wrcrOn? o Figure 43 Example of the deinton of macros within & macro body. auras 441° Rise Macro Process unctions TENOR BUPA ARESLTHChapter Maer Proesors 41 sie Mac Proesr Functions “The macro processor algorithm itself is presented in Fig. 45. The proce- ‘dure DEFINE, which s called when the beginning of a macro definition is re ‘ognized, makes the appropriate entries in DEFTAB and NAMTAB. EXPAND is ‘rgument values in ARGTAB and expand a macro invoce- Figure 45° (canta) 7 eh —— oe oe 185Chapter Maro Proceso ‘You may want to apply this algorithm by hand te the program in Fig. 4.1 to be sure you understand its operation, The result should be the same as shown in Fig. 42. "Most macra processors allow the definitions of commonly used macro in- structions to appear in a standard system library, rather than inthe source pro- ‘macros much more convenient. Definitions they aze needed during macro processing Fig. 45 to include this sort of processing appears as an exercise atthe end ofthis chapter. 4.2 MACHINE-INDEPENDENT MACRO PROCESSOR FEATURES In this section we diseuss several extensions to the basic macro pr “Most macro processors allow parameters tobe concatenated with other char acter strings. Suppose, fr example, that a program contains one series of vari= smed by the symbols XAI, XA2, XAS, ., another series named by XE YXB2, XBS, et, If simular processing is tobe performed on each series -4 42. Machine Indopnden: Macro Proc Fetus Suppose thatthe parameter to such a macro instruction is named &ID. The body ofthe macro definition might contain a statement like ‘generation ofthese macro expansions for yours hhow the concatenation operators are handled. think about how the concatenation operator would be handled in a macro pro- cessing algorithm like the one given in Fig. 45. 4.2.2 Generation of Unique Labels fn line 195, this label would be defined ivice—once for each invocatics of 187: Chapter $ Mace Press xara yar092 i Figure 46 Concatenation of macro parameters. \WRBUFF. This duplicate definition would prevent correct assembly of the re 4.2. Machine inéenotont Macro Processr Features Figure 47 Mlustrates one technique for generating unique labels 428 Conditional Macro Expansion Inall of our previous examples of macro instructions, each invoc ‘expanded into the same saquence of by the substitution of parameters, but the form of the ‘The term condition! assembly is commonly used to describe features such as those discussed in this section. However, there are applications of macro in Fig, 4, Figure functions of which fiction of RDBUFF hast adonel parameters: &EOR, which species a(Caples Pesos hexadecimal character code that marks the end ofa record, and &MAXLTH, which specifies the maximum length record that can be read. (As we shal see, {tis possible for ether or both ofthese parameters tobe omitted in an invora- tion of RDBUFF) | SRarcesuasEses romrr acto sai enue, at can Ean tom cost e (EP lee sez wan com unin Smee Seeimer esr neon pence Bo “how toon ums tow tne Rass Qnascre io mas cam “RS fer For or Roc 3 co" fame re ne 1 sun 2 . Fie enonx rene cuupcren on snren @ 2 =a Else mrss mae Sate a br bow ae bt EAD s sect Sq soci save seco tars ® 3 ° 2 om » cus ceans toe exer, » ens » xin & cas 2 = Sees 5 sir samp ser xo nero LOSE i Se Smo “o Seruoe meor nevace & 0 S So “nice «or Gas & z= & BBE Fe Gomer ro reo 2 saxo “ OMPR AS ‘TEST FOR END OF RECORD = = Ze ferax Hons onmacren 01 orem s coun mn ‘ee eas on Le ® = a = ae eusor fe Them iS as Lo . 2s Swen * cre 4.7 Cowan ungu beiswin mac Heer et ete le Ah mecrneear Figure 4.8. Ucs of macrostime condional statementsChapler & Maers Poco 1 42. Machine indi Nir PrceorFtus or i he consponing argument was ot inthe macro nvocaton pce wwe appears on lines 26 through 28. In this case, however, os the statement led by the IF isnot a line to be generated into the macro su | expansion. it is another macro procestor directive (SET). This SET ome | Satoment assigns the ase I to CEORCK. The ste AEORCK ia mar a Fines (so ote led sy) which can be wo store rh 3 ‘alos ding the aco exparion Any symbol ha gis with he crater pons i 4 i l cueam Looe comTER ser BOR CHMRACTER Ser Wx LinoM + 4096 asgga ges ohabes oop vaLESe WeNeD! LENT ‘macro invocation statement. 1S BEEN REACHED ‘the conditional macro expansion features just de- specified Boolean expression is FALSE, the macro processor skips ahead is DEFTAB until it find the next ELSE or ENDIE statement. The macro processo: ‘hen resumes normal macro expansion. ee oyChapter 4 Macro Processors 185 garoeey sear 2, SUFFER, LENA, (00.03.08 CcuEAR 1ooP ConrER Ser vox um = 4096 oor wn. snow anpgugagagearigg i Figure 42 Use of macro-ime foping statemens.Chapter 4 Macro Proceers will be generated once for each member ofthe lst corresponding, to the para- meter &EOR. The value of &CTR is used as a subscript to select the proper ws on the frt iteration the on the second iteration it macro invocation statement using sine this example carefully to be “However ifa macro has a large number tre aver aloe ina pal ivocation, ferent foam of parameter speci S ‘large le spp i 1s, but in a particular invocation of the macro, only 42 Machined Mar Proesn Fares ‘and ninth parameters are to be specified. If positional parameters wore used, the macro invocation statement might looklike 4.3 MACRO PROCESSOR DESI In this section we discuss some major design options for a macro proces- sor. The algorthan presented in Fig. 45 does not work properly fa macro isumer Fx cane aE FeooeD BERTH Figure 440 Use of keyword paremstes in acre instuctins. - +- acter from 9 specified device into register 4, taChaps Maco Proceners testand-wait loop, The definition ofthis macro Fra NWeH0 TO READ CHARACTER DITO SASTSTER A 2 > em rest men DevICe 30 m8 roe WEIL READE 38 > een" BEAD CHRRACTER o ‘=D © Figure 411. Example of nosted macro invocation 43. Mace Proce Design Options ‘Unfortunatly, the macro procescor design we have discussed previously ‘The expansion of ROCHAR would also proceed normally: At the end of tis expansion, however, problem would appear. When the end ofthe definition A nee nee ene EE. AB(Chapler Mae Pacer 43) Mao Proctor Desig Opie Thee probes ae ot fic eve he macro proceso bln | structure, A general-purpose facility, on the other hand, must provide some 0 define the specifi set of rules tobe followed, ‘Should not occur. For example, com- Donovan (197) 43.2 General-Purpose Macro Processors, pense involved in Uaining are {general-purpose macro processor are somewhatChapler< Macro Procsors ‘general-purpose macro processor that isto be used with programming lan- {guages having different base statement forms. 1m Section 44.3 we briefly describe one example of a gens Kernighan and Plauger (1976), Brown (1974), and Carapbell-Kelley (1973) 43.8 Macro Processing within Language Translators guage translator ‘simplest method of achieving tis sort of combination i is approach, the macro processor reads functions as previously described. vantages tavoids making an ig and then reading the expanded source file) vasing a macro preprocessor. Some dfehe data structures required by the macro processor ancl the language trans- Iator can be combined, For example, OPTAB in an assembler and NAMTAB in rented in the same table. In addition, 43. Blase Press Dog Option to the other. It is possible to have even closer cooperation between the macro po 1003 =1 varity of characterises oft arguments. a 205apler Maer Process processor Compuset wit Himited memory In any Sud fo the overhead of langage translation. (Foe example, some a Sith integrated macro procesors consume more time per line of source cde than do some compilers on the same computing ‘what type of macro processor to use should be based on lity of macro processing that that is part of the mpase macro procescr that i not Sssociated with any paztcular programming language. 44 MASM Macro Processor processing features of the Microsoft jon about MASM can be found in 6. Iplementation Ezanpes 07 statements. MASM calls these conditional assembly statements. Although the SIZE with the string AX. If SIZE has the value E, the result is blank, the results simply AX. [Compare the macro expansions shows an example ofthe resulting m ane et pet Anica, (6-5) 2 (zen) = GES) FB) = CHD) Notice the similarity between this macro invocation and a function cll, CCearly, we could write @ function ABSDIFF to perform tis same operation. sone efficient, beeasse the amount of computation re- aasire(t, 3.14159) 44 InponenttionEsampes language. For example ifwe had written the definition of ABSDIFF a3 faofine mmsoIEr(.Y) X>vOK-Ys =k he macro invocation AnsoTPe(O + 1.10 - 8) would be expanded into seas pweesaea which would not produce the intend result (The fist alternative inthis case med within quoted (define DISRLATURER) prime (“EEmR = ¥a\n", BAER) ‘The macro invocation prsmartreset) would be expanded into printe("BEER = Sant, I°9e1) (However, some C compilers would perform the substitution for EXPR inside string is enclosed in quotes. For example, if we define ‘HeCine DISPLAY(EKPR) print (flAPe *= tan", BOR) 2Chapter Maro Prcsors then the invocation pispoaeingsn) ‘would be expanded into printet in ANSI C may contain definitions or invocations of other macros, cro i expanded, the macro processor rescans the text that has been Hooking for more macro definitions ar invocations. For example, he snvocation DISPLAY (ABSOIFF(S,8)) would be expanded into Prince ("ARSOIRP(S, 0)" “= Rant, ABSDTEP(3,8)) After reacanning, this would become eines ras6oH (Notice that the ABSDIFF within the quoted string is not teat invocation) When executed, this statement would produce the output ASSDIFF(3,8) = 5 “The rescanning process behaves somewhat differently from the macro pro- cessing we discussed earlier in thls chapter. If the body of a macro contains a ken isnot replaced during rescanning. Thusa macro exnnot invoke! ‘The ANSI-C preprocessor also provides scan be used tobe sure that a macro (or other name) is For example, in the sequence surrn sice ine BUFFER SIGE 1028 the #define will be processed only if BUFFER SIZE has not already been defined. In this case, the printf would be included ifa #efinestatoment for DEBUG ‘ppeared inthe cour = program. 4.4.3 The ELENA Macro Processor* This section describes some of tte feature of the ELENA general-purpose ‘most macro processors: However, the header isnot required to have any spe- “oo Slt Pole tad Epo, Te 23ep Mao Fre 7" meter marker. A macro invocation is @ sequence of tokens that macro header For example, a macro withthe header could be invoked as and a macro with header ‘0p #1 70 THE VALATE OP 82 could be invoked as shown in Fig. 414(). If this mac body might be defined as shown in ‘macro invocation and expansion using this body apy & identifies &STOR as a local label sor appends a numeric value to ‘44 Inpenestation Eves ‘The macro-time instructions in ELENA representa different type of ap fa t= aBSOIP(A2,43) m= cai > (3) 2 02) ee ABSOIRPCR.D) L >a Shag 2 om RBSOIRR(E YD B88 <— g « Figure 414 Examples of ELENA mac216 Chapter Mar Process ano €1 To THE FIRST #2 ELRERITS OF v o Figure 415 Example of ELENA macrtie instructions. “The ELENA macro processor uses a macro definition table thats sila to the process of matching 2 macro invo- poo 1 10 2 ADD 6170 "ME PIRSD ELEMENT OF #2 , ite not even dear from a macro invocs (keywords and which are parameters. A sq: rsmay mB = 4 taplementato: pes | ‘cond be an invocation ofa macro with header entioned), I there are two or mre mate number of parameters, the most recently defined a7CCayler ¢ Maes Pad EXERCISES Section 4.1 1. Apply the algorithm in Fig. 45 to process the source program in Fig. 4.1 the results should be the same as shown in Fig. 42 2, Using the methods outined in Chapter 8, develop a modular design {fora one-pass macro processor 3. Macro invocation statements area part of the source program. In ‘many cases, the programmer may not be concerned with the state: ‘ments in the macro expansion. How could the macro processor and ‘assembler cooperate to list only the macro invocation, and not the ‘expanded version? 4. Suppose we want macro definitions to appear as a part ofthe assem= ‘ly listing, How could the macro processor and the assembler secomplish tis? ccumments shuld not be happen to aiatch a macro fon in comments be 6, How should a programmer decide whether to use a macro ora sub- routine to accomplish a given logical function? 7. Suppose tht a certain places in an assembler Ianguage program. This task could be mented either as a ‘where using a macro would take less central memory than using 2 subroutine 8. Some macros simply expand into instructions tht call « subroutine ‘What are the advantages ofthis approach, as compared to using which all, E te 10 allow for macto definitions or invocations within macros. 20. Modify the algorithm in Fig. 4.5 to allow macro definitions to be retrieved from a ibraty if they ace ot specifed by the programmer Bares TL Suggest appropriate ways of organizing and accessing the tables DEFTAB and NAMTAB. 12, Suppose thatthe occurrences of macro paremeters in DEFTAB were the program being assembled should be expanded as macro ior ‘ations. Ifthe progeammer does not define a macro named ‘CLEAR, then any CLEAR statements should be assembled as ma- ‘chine instructions. Describe how this cul be implemented 14. Suppose, asin part (9) that macros are allowed to have the same. 1, The macto definitions in ig. 4.1 cant ‘macro pachmeters are concatenated ‘ple, lines 59 and 73) Wh ‘oprestorsin these statement —. 219Chapter ¢ Maer Procsre 2. Modify the algorithm in ig. 45 to inchude the handling of concate- nation operators 3, Modify the algorithm in Fig. 4.5 to include the generation of unique labels within macro expansions. 4 Suppose that we want to allow labels within macro expansions with- 5, What is the most important difference between the following two sequences of statements? [Expand the following macro invocation statements, using the macro definition in Fig. 44a): Exercises m1 | ‘he sateen beeen IFDEF at ENDIF ato be ger | applied to macro parameter, and returns pied by the corresponding argument. Cons following program: move actoChapters Maes Pracssors at cangs woul you have maine macro proce in how your new macro program shown above. Important diference between the following two . ur #8 00? wm ar emt 412, Using the definition in Fig 45(a), expand the following macro invo- Even 2 ‘What value should the funtion ®INITEMS(&HOR) return in the lat newer to Exercise 9 to include WHILE statements, You Some macro processo the parameters are Keyword parameters and some are positional pa- rameters. Hove could a macro processor handle sich mixed-mode {no wale specified for &BUFADR) 4. mmUeP 73, Race, BOF {arguments specified in wrong order}Opler Maers ase Section 4.3, 1 ‘of EXPANDING and ARGTAB when making a recur sive call to EXPAND. Depending upon how the algorithm is imple- mented, what other values might also be necessary to save? ld a recursive macro processor be implemented in assem level programming languages with which ferences between these languages might be ‘4 macro processor that is intended for use with the language? Seloct one hig with which you are {guages might be sign tse with the language? 6 Qutline an algorithm for combining & line-y-line macro processor with an assembler 7. List utility functions and routines that might be shared by an assem bier and an integrated niacro processor. ', Using the methods outlined in Chapter 8, develop « modular design fora two-pass assembler with an integrated macro processor Chapter 5 Compilers In this chapter we discuss the design and operation of compilers for high-level tbooks and courses are entzely devoted 9 presented in Section 5.1. These extensions are mainly in the ars of objet code {generation and optimization. Section 53 describes some machine-independent extensions tothe basic scheme. Section 5.4 describes some compiler design alternatives. These include ig systoms, and relates them to the concepts introduced In previous ‘ection 8.1 BASIC COMPILER FUNCTIONS ‘We use as an example the Pascal pprosches that we discuss can ton of program in ather languages. nailer construction, a high-level programming lan gage is usually described in teems ofa gran.a. This grammar specifies the