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Cadence Simulation Technology For PCB Design
Cadence Simulation Technology For PCB Design
Cadence Simulation Technology For PCB Design
DATASHEET
PCB D E S I G N
Features
CIRCUIT SIMULATION ANALOG ANALYSIS
Cadence simulation technology for PCB
design integrates seamlessly with the Users can easily set up and run simula- Explore circuit behavior using DC, AC,
Cadence front-to-back PCB design flow, tions, and then cross-probe simulation noise, transient, parameter sweeps,
making it possible to have a single, results from Probe, an industry-standard Monte Carlo, and DC sensitivity analyses.
unified design environment for both waveform viewer. Support for multiple Allegro AMS Simulator and PSpice
simulation and PCB design. simulation profiles enables users to recall technology include interactive simulation
and run different simulations on the same controllers and two simulation solvers.
Design Entry and Editing schematic. Simulation bias results can be
viewed directly on the schematic including GRAPHICAL RESULTS AND
Select from a library of more than 18,000
symbols and models for simulation to node voltages, device power calculations, DATA DISPLAY
design with Cadence PCB schematic and pin and subcircuit current. Support Probe Windows allows users to choose from
design entry technology. It provides for Checkpoint Restart allows designers to an expanded set of mathematical functions
many features that allow you to easily reduce simulation times when the same to apply to simulation output variables.
capture and simulate analog designs. circuit is simulated multiple times with Designers can create plot window
Both integrations include one-button minor changes. templates and use them to easily make
simulation and cross-probing, and many complex measurements by simply placing
MIXED ANALOG/DIGITAL markers directly on the desired pins, nets,
other simulation utilities.
SIMULATION and parts in the schematic.
STIMULUS CREATION Integrated analog and event-driven digital
The tools also enable users to measure
Access built-in functions that can be simulations improve speed without loss of
performance characteristics of a circuit
described parametrically or draw piece- accuracy. A single graphical waveform
using built-in measurement functions
wise linear (PWL) signals freehand with analyzer displays mixed analog and digital
and creation of custom measurements.
the mouse to create any shape stimulus. simulation results on the same time axis.
For data display, additional capabilities
Create digital stimuli for signals, clocks, Digital functions support 5 logic levels and
allow plotting of both real and complex
and buses; click-and-drag to introduce 64 strengths, load-dependent delays, and
functions of circuit voltage, current, and
and move transitions. hazard/race checking. Allegro AMS
power consumption, including Bodé plots
Simulator and PSpice simulation also
for gain and phase margin and derivatives
feature propagation modeling for digital
for small-signal characteristics. (See Figure 2.)
gates and constraint checking (such as
setup and hold timing).
Sensitivity
The sensitivity option identifies which
component parameters are critical to Figure 4: Smoke compares simulated values with
the goals of a circuit’s performance by manufacturers’ limits to highlight devices operating
outside safe operating rages.
examining how each component affects
circuit behavior by itself and in comparison
to the other components. It allows design- Monte Carlo
ers to identify sensitive components and Monte Carlo predicts the behavior of a
export them to the optimizer to fine-tune circuit statistically when part values are
circuit behavior. varied within their tolerance range.
Monte Carlo also calculates yield, which
Optimizer
can be used for mass manufacturing
The optimizer analyzes analog circuits and predictions. Use Monte Carlo for
systems, fine-tuning designs faster than calculating yield based on your specifica-
trial-and-error bench testing. It helps find tions calculating statistical data, displaying
the best component values to meet per- results in a probability density histogram,
formance goals and constraints. Designers and displaying results in a cumulative
distribution graph.
© 2007 Cadence Design Systems, Inc. All rights reserved. Cadence, Allegro, OrCAD, PSpice, and SourceLink are registered trademarks and the Cadence logo
is a trademark of Cadence Design Systems, Inc. All others are properties of their respective holders.
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