Cadence Simulation Technology For PCB Design

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CAD E N C E S I M U L AT I O N F O R

DATASHEET
PCB D E S I G N

On larger designs especially, PCB design teams need fast


and reliable simulation to achieve convergence.
Cadence® simulation technology for PCB design offers a
­single, unified design environment for both simulation and
PCB design. With integrated analog and event-driven digital
simulation, teams benefit from improved speed without
­sacrificing accuracy. Using advanced analysis capabilities,
designers can automatically maximize the performance
of circuits.

Cadence simulation Cadence simulation technology for PCB


Cadence simulation technology technology for design is available in the following products:
for PCB design is available in the
following products:
PCB design • Cadence Allegro® AMS Simulator
Cadence simulation technology for PCB • Cadence PSpice® simulation
• Cadence Allegro AMS Simulator
design provides a full-featured analog
• Cadence PSpice Simulation simulator with support for digital The products are tightly integrated with
­elements to help solve virtually any design Allegro Design Entry HDL and Cadence
challenge—from high-frequency systems OrCAD® Capture. The simulation technol-
to low-power IC designs. The powerful ogy can also interface with MathWorks’
simulation engine integrates easily with MATLAB Simulink package in a powerful
Cadence PCB schematic entry solutions, co-simulation environment (SLPS).­
improving time to market and keeping (See Figure 1.)
operating costs in check. An interactive,
easy-to-use graphical user interface BENEFITS
­provides complete control over the design • Improves simulation times, reliability,
process. Availability of resources such and convergence on larger designs
as models from many vendors, built-in
mathematical functions, and behavioral • Improves speed without loss of ­accuracy
modeling techniques make for an efficient via integrated analog and event-driven
design process. Advanced analysis digital simulations
­features (Sensitivity, Monte Carlo, Smoke, • Explores circuit behavior using basic DC,
and an optimizer with multiple engines) AC, noise, and transient analyses
are built on top of the simulator to
improve design performance, cost-effe- • Allows system-level interfaces to be
tiveness, and reliability. tested with actual electrical designs
using SLPS
• Offers library selection of more than
Device
20,000 analog and mixed-signal models BSIM1, BSIM3,
AMS Simulator
Model Library
Analog or
mixed-signal
equations
Custom
EKV models simulator with semiconductor models
probe graphical
• Allows for automatic identification of post-processor

analog and digital signals and applies Datasheet AMS Simulator


A-to-D and D-to-A interfaces specifications Measurements
advanced analysis
- Smoke analysis
- Sensitivity analysis
• Explores design relationships with Vendor models
AMS Simulator
Model Editor
Parameters - Optimizer
- Monte Carlo analysis
“what if” scenarios before committing
to hardware Symbols Netlist, stimuli,
from models, simulation settings,
Allegro Design Entry HDL bias info cross-probing
• Maximizes circuit performance auto-
matically using Optimizer Part Manager PCB layout

• Identifies and simulates functional Verified


Gerber/NC Drill,
GenCAM/GenCAD,
DE-HDL netlists
blocks of complex circuitry using math- Interface
to part data
pick & place reports

ematical expressions, functions, and Part table file


Part Browser Variant Editor
Purchasing/ Fabrication,
behavioral devices Verified
inventory
Parts
assembly & test
BOMs
Place part
• Determines which components are Variant reports for board assembly and BOMs

overstressed using Smoke analysis and Released BOMs


MRP/ERP/PDM
by observing component yields using system

Monte Carlo analysis


Figure 1: Cadence simulation technology for PCB design

Features
CIRCUIT SIMULATION ANALOG ANALYSIS
Cadence simulation technology for PCB
design integrates seamlessly with the Users can easily set up and run simula- Explore circuit behavior using DC, AC,
Cadence front-to-back PCB design flow, tions, and then cross-probe simulation noise, transient, parameter sweeps,
making it possible to have a single, results from Probe, an industry-standard Monte Carlo, and DC sensitivity analyses.
­unified design environment for both waveform viewer. Support for multiple Allegro AMS Simulator and PSpice
­simulation and PCB design. simulation profiles enables users to recall ­technology include interactive simulation
and run different simulations on the same controllers and two simulation solvers.
Design Entry and Editing schematic. Simulation bias results can be
viewed directly on the schematic including GRAPHICAL RESULTS AND
Select from a library of more than 18,000
symbols and models for simulation to node voltages, device power calculations, DATA DISPLAY
design with Cadence PCB schematic and pin and subcircuit current. Support Probe Windows allows users to choose from
design entry technology. It provides for Checkpoint Restart allows designers to an expanded set of mathematical functions
many features that allow you to easily reduce simulation times when the same to apply to simulation output variables.
capture and simulate analog designs. circuit is simulated multiple times with Designers can create plot ­window
Both integrations include one-button minor changes. ­templates and use them to easily make
simulation and cross-probing, and many complex measurements by simply placing
MIXED ANALOG/DIGITAL markers directly on the desired pins, nets,
other simulation utilities.
SIMULATION and parts in the schematic.
STIMULUS CREATION Integrated analog and event-driven digital
The tools also enable users to measure
Access built-in functions that can be simulations improve speed without loss of
performance characteristics of a circuit
described parametrically or draw piece- accuracy. A single graphical waveform
using built-in measurement functions
wise linear (PWL) signals freehand with analyzer displays mixed analog and digital
and creation of custom measurements.
the mouse to create any shape stimulus. simulation results on the same time axis.
For data display, additional capabilities
Create digital stimuli for signals, clocks, Digital functions support 5 logic levels and
allow plotting of both real and complex
and buses; click-and-drag to introduce 64 strengths, load-dependent delays, and
functions of circuit voltage, current, and
and move transitions. hazard/race checking. Allegro AMS
power consumption, including Bodé plots
Simulator and PSpice simulation also
for gain and phase margin and derivatives
feature propagation modeling for digital
for small-signal characteristics. (See Figure 2.)
gates and constraint checking (such as
setup and hold timing).

www.cadence.com CADENCE SIMULATION FOR PCB DESIGN 


MODEL LIBRARY magnetic transformers and DC inductors,
and generate simulation models for trans-
Users can select from more than 18,000
formers and inductors that can then be
analog and mixed-signal models of
used in Allegro AMS Simulator circuits.
devices made in North America, Japan,
The Magnetic Parts Editor also allows
and Europe. Also included are more than
designers to generate data required for
4,500 parameterized models for BJTs,
manufacturing the transformers or
JFETs, MOSFETs, IGBTs, SCRs, magnetic
­inductors. The manufacturer’s report
cores and toroids, power diodes and
that is generated by MagDesigner after
bridges, operational amplifiers, optocou-
the completion of the design process
plers, regulators, PWM controllers,
contains the complete data required by
­multipliers, timers, and sample-and-holds.
a vendor to develop the transformer for
MODEL EDITING commercial use.

It’s easy to extract a model of a supported ENCRYPTION


device type—simply enter the required
The encryption feature allows models to
Figure 2: Cadence simulation technology for
data from the device’s datasheet.
be encrypted using 56-bit DES algorithm.
PCB design provides a complete simulation
environment including simulation waveform BEHAVIORAL MODELING
analysis with cross-probing and bias results SLPS
displayed on the schematic Functional blocks are described using
Cadence simulation technology and the
mathematical expressions and functions,
MathWorks’ MATLAB Simulink package
MODELS which allows designers to leverage a full
integrate two industry-leading simulation
set of mathematical operators, nonlinear
Included are a large variety of accurate tools into a powerful co-simulation
functions, and filters. Circuit behavior
internal models—which typically include ­environment (SLPS). Simulink is a platform
can be defined in the time or frequency
temperature effects—that add flexibility for multi-domain simulation and model-
domain, by formula (including Laplace
to simulations. Models are available with based design of dynamic systems. The
transforms), or by look-up tables. Error
R, L, C, and bipolar transistors plus: SLPS integration allows designers to
and warning messages can be specified
­perform system-level simulations that
• Built-in IGBTs in different conditions. Users can easily
include realistic electrical models of actual
select parameters, which have been
• Seven MOSFET models, including components. Design and integration
passed to subcircuits in a hierarchy, and
­industry-standard BSIM3v3.2 and problems can be discovered much earlier
insert them into transfer functions. New
the new EKV 2.6 model in the design process, reducing the
behavioral capabilities include mathematical
­number of prototypes needed to execute
• Five GaAsFET models, including functions like in(x), exp(x), and sqrt(x).
the design. SLPS integration also lets
Parker-Skellern and TriQuint TOM-2,
MAGNETIC PARTS EDITING designers of electro-mechanical systems—
TOM-3 models
such as control blocks, sensors, and
The Magnetic Parts Editor helps designers
• Nonlinear magnetic models complete power converters—perform integrated
overcome issues involved in manually
with saturation and hysteresis system and circuit simulation.
designing transformers. Users can design
(See Figure 3.)
• Transmission line models that incorpo-
rate delay, reflection, loss, dispersion,
and crosstalk

• Digital primitives, including bi-directional


transfer gates with analog I/O models

• Two battery models, which allow


­accurate simulation of the discharge
cycle and operating conditions

A device equations developer’s kit


(DEDK) allows implementation of new
internal model equations that can be
used with Allegro AMS Simulator and
PSpice simulation.
Figure 3: SLPS integration allows designers to interface the Allegro AMS Simulator / PSpice circuit with Simulink
and then observe the waveforms after Simulink-Allegro AMS Simulator / PSpice co-simulation

www.cadence.com CADENCE SIMULATION FOR PCB DESIGN 


CHECKPOINT RESTART can use the optimizer to improve design Parametric Plotter
performance, update designs to meet Once a circuit is created and simulated,
This feature allows designer to store
new specifications, optimize behavioral the parametric plotter is used for
­simulation states at various time-points
models for top-down design and model ­sweeping multiple parameters. Any
and then restart simulations from any of
generation, and tune a circuit to match ­number of design and model parameters
the simulation states, which saves time.
known results in the form of measure- (in any combination) can be swept and
Designer can modify simulation settings
ments or curves. The optimizer includes results viewed in tabular or plot form.
and design parameters before starting a
four engines: least squares quadratic (LSQ), Designers can use the parametric plotter
simulation from a pre-recorded time-state.
modified LSQ, random, and discrete. for allowing device/model parameters to
AUTO-CONVERGENCE OPTION be swept, displaying sweep results in
Smoke
This option makes the simulator automati- spreadsheet format, allotting measure-
The Smoke option warns of stressed ment results in probe UI, and evaluating
cally change tolerances limits of
­components due to power dissipation, post-analysis measurement.
­convergence to make the design
increases in junction temperature, secondary
­converge. Designers can use this option
breakdowns, or violations of voltage/current
to achieve convergence and then fine-
limits. Over time, these components can
SYSTEM REQUIREMENTS
tune simulations by further modifying • Pentium 4 (32-bit) equivalent or faster
cause circuit failure. Designers can use
simulator options. This option is recom-
Smoke to compare circuit simulation
mended for power electronic designs. • Windows XP Professional,
results to a component’s safe operating
Vista Enterprise
limits. If limits are exceeded, Smoke
ADVANCED ANALYSIS
­identifies the problem parameters. It can • Minimum 512MB (1G or more
CAPABILITIES ­recommended for XP and
also be used for creating, modifying, and
Using advanced analysis capabilities, configuring derate files for use with Vista Enterprise requirements)
designers can automatically maximize Smoke analysis. (See Figure 4.)
• 300MB swap space (or more)
the performance of circuits. Four impor-
tant capabilities—sensitivity analysis, • CD-ROM drive
optimization, Smoke (stress analysis),
• 65,000 color Windows display
and Monte Carlo (yield analysis)—enable
with minimum 1024 x 768
engineers to create virtual prototypes of
(1280 x 1024 recommended)
designs and maximize circuit performance
automatically. Measurements across
­multiple simulation profiles can be
­processed together.

Sensitivity
The sensitivity option identifies which
component parameters are critical to Figure 4: Smoke compares simulated values with
the goals of a circuit’s performance by manufacturers’ limits to highlight devices operating
outside safe operating rages.
examining how each component affects
circuit behavior by itself and in comparison
to the other components. It allows design- Monte Carlo
ers to identify sensitive components and Monte Carlo predicts the behavior of a
export them to the optimizer to fine-tune circuit statistically when part values are
circuit behavior. varied within their tolerance range.
Monte Carlo also calculates yield, which
Optimizer
can be used for mass manufacturing
The optimizer analyzes analog circuits and predictions. Use Monte Carlo for
systems, fine-tuning designs faster than ­calculating yield based on your specifica-
trial-and-error bench testing. It helps find tions calculating statistical data, displaying
the best component values to meet per- results in a probability density histogram,
formance goals and constraints. Designers and displaying results in a cumulative
distribution graph.

www.cadence.com CADENCE SIMULATION FOR PCB DESIGN 


CADENCE SERVICES
AND SUPPORT
• Cadence application engineers can
answer your technical questions by
telephone, email, or Internet—they can
also provide technical assistance and
custom training

• Cadence certified instructors teach


more than 70 courses and bring
their real-world experience into
the classroom

• More than 25 Internet Learning Series


(iLS) online courses allow you the
­flexibility of training at your own
­computer via the Internet

• SourceLink® online customer support


gives you answers to your technical
questions—24 hours a day, 7 days a
week—including the latest in quarterly
software rollups, product change
release information, technical
­documentation, solutions, software
updates, and more

For more information,


contact Cadence sales at:
+1.408.943.1234
or log on to:
www.cadence.com/
contact_us

© 2007 Cadence Design Systems, Inc. All rights reserved. Cadence, Allegro, OrCAD, PSpice, and SourceLink are registered trademarks and the Cadence logo
is a trademark of Cadence Design Systems, Inc. All others are properties of their respective holders.
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