Asic Homecode

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module and_gate(a,b,y);

input a,b;
output y;
and(y,a,b);
endmodule

module not_gate(y,a);
input a;
output y;
not(y,a);
endmodule

module counter(enable,rst,clk,count,alarm);
input enable,rst,clk;
output reg [1:0]count;
output alarm;
reg alarm;
always @ (posedge clk)
begin
if(rst)
count=1'b0;
else if (enable)
count=count+1;
else
count=0;
end
always @ (posedge clk)
begin
if(count==3)
alarm=1'b1;
else
alarm=1'b0;
end
endmodule

module comp1(y,a);
input [3:0]a;
output y;
reg y;
always @ (a)
begin
if(a==4'b0101)
y=1'b1;
else
y=1'b0;
end
endmodule

module comp2(y,a);
input a;
output y;
reg y;
always @ (a)
begin
if(a==1'b1)
y=1'b1;
else
y=1'b0;
end
endmodule

module comp3(y,a);
input [5:0]a;
output y;
reg y;
always @ (a)
begin
if(a<6'b001111)
y=1'b1;
else
y=1'b0;
end
endmodule

module comp4(y,a);
input [5:0]a;
output y;
reg y;
always @ (a)
begin
if(a>6'b011111)
y=1'b1;
else
y=1'b0;
end
endmodule

/* module comp5(y,a);
input [1:0]a;
output y;
reg y;
always @ (a)
begin
if(a==2'b11)
y=1'b1;
else
y=1'b0;
end
endmodule*/

module
topmodule(rst,clk,pswd,lumen,temp,sensor1,sensor2,sensor3,sensor4,loff,lon,ac,heat,
alarm1,alarm2,alarm3,alarm4,alarm5);
input[5:0]temp,lumen;
input rst,clk;
input[3:0]pswd;
input sensor1,sensor2,sensor3,sensor4;
output lon,loff,ac,heat,alarm1,alarm2,alarm3,alarm4,alarm5;
wire w1,w2,w3,w4,w5,w6,w7,w8,w9,w10,w11;
wire [1:0] w12;
and_gate f1 (.y(loff),.a(w1),.b(w8));
and_gate f2 (.y(lon),.a(w1),.b(w9));
and_gate f3 (.y(ac),.a(w1),.b(w10));
and_gate f4 (.y(heat),.a(w1),.b(w11));
and_gate f5 (.y(alarm2),.a(w2),.b(w3));
and_gate f6 (.y(alarm3),.a(w2),.b(w4));
and_gate f7 (.y(alarm4),.a(w2),.b(w5));
and_gate f8 (.y(alarm5),.a(w2),.b(w6));

not_gate n1(.y(w7),.a(w1));
not_gate n2(.y(w9),.a(w8));
not_gate n3(.y(w11),.a(w10));
not_gate n4(.y(w2),.a(w1));

comp1 c1(.y(w1),.a(pswd));
comp2 c2(.y(w3),.a(sensor1));
comp2 c3(.y(w4),.a(sensor2));
comp2 c4(.y(w5),.a(sensor3));
comp2 c5(.y(w6),.a(sensor4));
comp3 c6(.y(w8),.a(lumen));
comp4 c7(.y(w10),.a(temp));
//comp5 c8(.y(alarm1),.a(w12));

counter r1(.enable(w7),.rst(rst),.clk(clk),.count(w12),.alarm(alarm1));

endmodule

module home_tst();
reg [3:0]pswd;
reg[5:0]temp,lumen;
reg rst,clk;
reg sensor1,sensor2,sensor3,sensor4;
wire lon,loff,ac,heat,alarm1,alarm2,alarm3,alarm4,alarm5;
topmodule
t1(.rst(rst),.clk(clk),.pswd(pswd),.lumen(lumen),.temp(temp),.sensor1(sensor1),.sen
sor2(sensor2),.sensor3(sensor3),.sensor4(sensor4),.loff(loff),.lon(lon),.ac(ac),.he
at(heat),.alarm1(alarm1),.alarm2(alarm2),.alarm3(alarm3),.alarm4(alarm4),.alarm5(al
arm5));
initial
begin
rst=1'b0;
clk=1'b0;
pswd= 4'b0101;
temp= 6'b100001;
lumen=6'b010101;
sensor1=1'b1;
sensor2=1'b1;
sensor3=1'b1;
sensor4=1'b1;
#200;
rst=1'b0;
clk=1'b0;
pswd= 4'b0001;
temp= 6'b010001;
lumen=6'b010101;
sensor1=1'b1;
sensor2=1'b1;
sensor3=1'b1;
sensor4=1'b1;
#200;
pswd= 4'b0011;
temp= 6'b010001;
lumen=6'b010101;
sensor1=1'b1;
sensor2=1'b1;
sensor3=1'b1;
sensor4=1'b1;
#200;
pswd= 4'b0101;
temp= 6'b010001;
lumen=6'b010101;
sensor1=1'b1;
sensor2=1'b1;
sensor3=1'b1;
sensor4=1'b1;
end
initial
$monitor("rst=%b, clk=%b, pswd=%b, lumen=%b, temp=%b, sensor1=%b, sensor2=%b,
sensor3=%b, sensor4=%b, loff=%b, lon=%b, ac=%b, heat=%b, alarm1=%b, alarm2=%b,
alarm3=%b, alarm4=%b, alarm5=%b",
rst,clk,pswd,lumen,temp,sensor1,sensor2,sensor3,sensor4,loff,lon,ac,heat,alarm1,ala
rm2,alarm3,alarm4,alarm5);
always
#10 clk=~clk;
endmodule

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