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14 I-V Analysis of BJT
14 I-V Analysis of BJT
Muhammad Adeel
M.Sc. Electronics (KU)
M.Phil. ISPA (KU)
Current & Voltage Analysis
Saturation
•The bottom of the load line is at ideal cutoff where Ic = 0 and VCE = Vcc.
•The top of the load line is at saturation where Ic = IC(sat) and VCE = VCE(sat) (which
is most likely to be approximately 0.7 volts in the above given configuration).
•In between cutoff and saturation along the load line is the active region of the
transistor's operation.
Conditions in Cutoff