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BGR Bipolar JSSC 1976 Integrated
BGR Bipolar JSSC 1976 Integrated
BGR Bipolar JSSC 1976 Integrated
~20mV/div (lo)
oscdlator
outputsignal (11)
(9) becomes
lOOx magnified
top part of the O(t) @(e)
upper trace
iO.2mVldiv
g+(t) =
H
@(o) 0(0)
g+(~(v)) dO(n) dqMO). (12)
frequency shift from 2.4kHz to 240HZ After differentiating ( 12) twice with respect to ~(t), its solu-
tion is known [6] to be
Fig.4. Oscillator’s output signal shifted in frequency over onedecade
from 2.4 kHz to 240 Hz. g+(t) = A sin (~(t) + @o). (13)
Using (10) and (11 ) backwards, we get
to 100 kHz (Fig. 4) shows the output signal of the oscillator (14)
gti~(t) ‘Ae-f~b(’)d7 sin ‘wd~+~o .
shift ed in frequency over one decade. This picture shows that (J o )
there is only a very small amplitude deviation, even when the
automatic amplitude control is working with a sampling time Equation ( 14) shows that the two-integrator oscillator is a
of two periods and the frequency shift takes place just after a S1S0 as defined in Section 11.
sampled top.
In Section V it has already been mentioned that the output REFERENCES
signal of the oscillator contains about 1 percent distortion. [1] “8038 wave form generator/voltage controlled oscillator,” Data
Further, the oscillator has an upper frequency limit at about sheet, Intersil, Inc., Cupertino, CA.
200 kHz. This limit is caused by the application of sc~mep-n-p [2] A. Grebene, “Monolithic wave form generation,” IEEE Spectrum,
current mirrors because these p-n-p current mirrors have a very pp. 34-40, Apr. 1972.
small bandwidth. In particular, this holds for a multiple out- [3] F. Doorenbosch, “Synthesis of a semi ideal sine oscillator (S1S0),”
put p-n-p current mirror (not shown in Fig. 2) that connects to be published.
the integrator with the other parts. A realization that avoids [4] B. Gilbert, “A new wide-band amplifier technique,” IEEE J.
Solid-State Circuits, vol. SC-3, pp. 353-365, Dec. 1968.
the use of these current mirrors is being designed using p-n-p
[5] —, “A precise four quadrant multiplier with subnanosecond re-
transistors only in constant current sources. Other specifica- sponse,” IEEE J. Solid-State Circuits, vol. SC-3, pp. 365-373,
tions like frequency and amplitude stability have not yet been Dec. 1968.
considered. As this moment we are integrating the oscillator [6] G. A. Kern and T. M. Kern, Mathematical Handbook for Scientists ..
block by block. After all blocks worlk satisfactorily, we will and Engineers, 2nd ed. New York: McGraw-Hill, 1968, p. 251J,
attempt to unite them on one chip. p. 266.
APPENDIX
The fact that the two-integrator oscillator is a S1S0, as de-
fined in Section II, can be shown as follows.
From the block diagram in Fig. 1 we can write down two
equations:
f-t et
gul (~) = - I b(T) gul (7) ~i- - I @)guz(T) G!7- (5)
JO Jo
H
I C2 ‘Xlnn. (3)
J=A TQnA
qR ~
I L
A Q3
B
I
v’
0’ Q, Q, Q2
because of
R2 AVbe
1) the influence of the temperature-dependent base currents;
i 1 2) the influence of the temperature-dependent collector-
(a) (b) base voltages of Q2 and Q4;
3) the temperature dependency caused by the loading of the
a
ICI
where ~ is a parameter related to the doping level (q - 2.2) icl = nic2, (4)
and V& is the linearly extrapolated gap voltage at O K.
The output voltage can be adjusted to the value determined Ubel ‘(gml )-’ icl, (5)
from (1) by trimming the resistor R ~ or by adjusting the
current magnitude. A number of possible implementations and
for bandgap references are given in [ 1 ] -[3].
This correspondence describes a new configuration with
L2 ‘g~z(l +gm2R2)-1‘be 1, (6)
improved performance with respect to the temperature coef- where
ficient and low-frequency noise in comparison with the
versions described in [ 2 ] and [ 3 ] . In contrast with that given dIc
gm. —
in [ 1 ], this circuit can be implemented as a single-chip mono- a Vbe Vce“
lithic IC, using two thin-film resistors only.
It follows from (3) and (6), taking into account gm = qlc/kT,
that
II. CIRCUIT CONSIDERATIONS CONCERNING THE
TEMPERATURE COEFFICIENT icz =gm2(l +lnn)-l Ubel. (7)
Equations (4), (5), and (7) are represented in the flow graph of
The principle of the configuration is as shown in Fig. 1(b). Fig. 1(c). To complete this flow graph also the expression for
Initially, neglecting the base currents and the base widening
the output voltage U. = R ~icl + Ubel is represented. There is
effects, the collector current of Q4 is proportional to the
positive feedback in the circuit. This feedback is located in
temperature which can be seen as follows. Due to the action
the loop indicated in Fig. 1(c) by a broken line. The loop gain
of the current mirror Q3 and Q4, the collector currents of
AL corresponding to it amounts to
QI and Q2 have a fixed ratio n. If n >1 and if QI and Q2 are
identical transistors, the cliff erence A Vbe in the base-emitter AL =(1 +Inn)-l. (8)
voltages can be written as
Due to this positive feedback the influence of each noise
source on the output signal is multiplied by a factor
AVbe=~lnrz. (2) (1 - AL)-l = (1 + in n) (ln n)-l . This factor which is only a
function of the current gain n is listed in Table I for a few
The collector-current IC2 of Q2 is approximately values of n. Hence, it is advantageous to choose n >> 1. It
CORRESPONDENCE 405
TABLE I
MULTIPLICATIONFACTORFORTHERELATIVEINFLUENCEOFTHENOISE
SOURCE!IDUE TO THEPOSITIVEFEEDBACK
l-tlnn
n
lnn
1 M (circuit unstable)
2 2.44
1.62
1: 1.43
v+c!- 1 1 1 I 1 1 1 1 (
O’k’ooom:
0“801’801’801’8
Q19
17
output
)-l
1
( Q 20
V.
RI
2’
J--+T
Q13
Q1l
Q 10 I ‘+
I
f---!-h
2
100 k
Q2L
Q22
’23
100 k
o
“~
Fig.2. Cncuit with good performance with respect to the temperature
dependency and low-frequency noise.
can be shown that in this case there is also a small reduction of The current mirror is replaced by an improved one contain-
the current mirror noise. In our configuration we have chosen ing the transistors Qs, Q4, “ “ “ , Q9. The mirror transistors
n=5. Q3 and Qa are cascoded by the transistor combinations
Q5 and Q6. The collector-base volt ages of Q3 and Q4 are
IV. PRACTICAL REALIZATION small and almost equal. So the early effect has only a very
A circuit with good performance with respect to the tem- small influence on the current gain n. The high-current gain
perature dependency and low-frequency noise is shown in of the transistor combinations Qs and Q6 is necessary in order
Fig. 2. In comparison with t he circuit in Fig. 1(b), the permis- to keep their base currents small and, consequently, the low-
sible output current is increased by a factor(?21, where ~ is the frequency noise low. Using single transistors for Q5 and Q6,
common-emitter dc forward-current gain. The output voltage the current mirror (f)-l noise would be two times as high.
is two times as large. The influence of the base currents of The base currents are supplied by the Darlington pair Q8.
QZO, Q 1, and Q2 is compensated for by the base current Of Only a small fraction of these currents is subtracted from the
Q16 which is supplied by the current mirror Q ~~-Q ~~ to the mirror input current. The emitter resistors are added in order
bases of QI and Qz. The influence of the collector-base to make the current ratio n less dependent on the bulk resis-
volt age variations of Q2 is sufficiently reduced by cascoding tances. The transistors Q22, Q2s, and Q24 form a starting
Q2 with the Darlington pair Q lo -Q 11. circuit.
406 IEEE JOURNAL OF SOLID-STATE CIRCUITS, JUNE 1976
11
Test Condition Output Voltage Variation VO
V. EXPERIMENTAL RESULTS
A bread-board model of the circuit of Fig. 2 has been tested. I I
T
Using thin-film resistors for R ~ and R2, typical results of the
measurements were as indicat ed in Table II. An implementation
with diffused resistors instead of thin-film resistors is under
investigation. A one-chip integrated version of the configura-
tion is presently in preparation.
The remaining small imperfection with respect to the tem- Fig. 1. Emitterdriven current mirror as a current splitter.
perature coefficient is at zero load current mainly caused by
the current mirror. The mirror gain n is slightly dependent on
the temperature if there is some difference between the ratio
of the emitter resistors of Q3 and Q4 and the ratio of the ef- could be variable over several decades, into two precisely
fective emitter areas of these transistors. Because of the un- equal parts. The normal requirement for high incremental
predict abie character of this difference, prior compensation output resistance precludes the use of matched resistor net-
for this error source is not possible. Consequently, the devia- works by themselves and necessitates the use of active devices.
tion from the optimum performance is chip-dependent. The proposed circuit configuration employs BJT’s as the active
devices. These are used in what is essentially an emitter cur-
REFERENCES rent driven Wilson current mirror circuit in order to minimize
possible errors in the splitting function. The addition of an
[1] K. E. Kuijk, “A precision reference voltage source,” IEEE J Solid-
op amp defines accurately the potential at the input node and
State Circuits, VOLSC-8, pp. 222-226, June 1973.
[2] A. P. Brokaw, “A simple three-terminal IC bandgap reference,” minimizes the incremental input resistance by its “virtual-
IEEE J. Solid-State Circuits, VOLSC-9, pp. 388-393, Dec. 1974. earth” action. A matched field-effect transistor (FET) pair,
[3] R. J. Widlar, “New developments in IC voltage regulators,” IEEE with their gates controlled by the op amp output, ensures that
J. SolU-State Circuits, VOLSC-6, pp. 2-7, Feb. 1971. the incremental output resistance is very high at both output
points.
CIRCUIT DESCRIPTION
The basic current-splitting action can be performed by
means of the emitter-driven current mirror shown in Fig. 1.
Routine circuit analysis shows that the output currents 10 ~,
10 ~ are given b y
101 =(1/2)(1 +.5) (1)
A Precision Active Current-Splitting Circuit Technique I ~, = (1/2)(1 -e) (2)
R. W. J. BARKER AND B. L. HART where e, the error fraction, is given by
(3)
Abstract-The interconnection of a modified Wilson current mirror– where ~ is the common-emitter, dc current gain of Q2; vo~ is
operating in the emitter-drive mode–an operational amplifier and a the base-emitter offset volt age of Q ~, Q2; VT is the thermal
matched field-effect transistor (FET) pair realizes an analog current
voltage, KT/q, (~ 26 mV at 300 K).
divider that splits a dc input current, 1, into two parts that are equal to
The splitting error can be reduced if the simple current mir-
within * 0.4 percent, for 2 MA<1< 2 mA. The iueremental output ror is replaced by the “Wilson” current-mirror [ 1J shown in
resistance is in the G ~ region. The scheme is primarily intended for
Fig. 2. The error, designated ew, is now given by
discrete circuit implementation,
Ew = f (l/@) (A/3//3)* (vo~/2 VT) (4)
INTRODUCTION where, in addition to the terms previously defined, (A/-3//3)
Certain types of circuit and system test instrumentation, refers to the fractional ~ mismatch of Q2 and Qs. If it can be
e.g., off set parameter measurements on matched transistor arranged that Q2, Q3 have high, well-matched 13values; then
arrays, call for a unit which splits a direct current, which cw in (4) becomes
(5)
Manuscript received ApriJ 6, 1976.
R. W. J, Barker is with the Department of Electronic and Electrical A drawback of the scheme shown in Fig. 2 is the fact that
Engineering, University of Sheffield, Sheffield, England. Q ~ and Q2 operate with a collector-base voltage differential of
B. L. Hart is with the Department of Electrical Engineering, North one diode drop. This can, depending on the output resistance
East London Polytechnic, Essex, England. of Q2, lead to a further splitting error component of the order