Index of /ds/IR/

Name Last modified Size Description

Parent Directory

IRF340.pdf 22-Dec-99 00:09 232K

IRF510A.pdf 22-Dec-99 00:09 247K

IRF520A.pdf 22-Dec-99 00:09 243K

IRF530A.pdf 22-Dec-99 00:09 254K

IRF540A.pdf 22-Dec-99 00:09 256K

IRF550A.pdf 22-Dec-99 00:09 261K

IRF610A.pdf 22-Dec-99 00:09 250K

IRF614.pdf 22-Dec-99 00:09 242K

IRF614A.pdf 16-Apr-99 13:01 229K

IRF614S.pdf 22-Dec-99 00:09 240K

IRF620A.pdf 22-Dec-99 00:09 256K

IRF624.pdf 22-Dec-99 00:09 246K

IRF624A.pdf 16-Apr-99 13:01 232K

IRF630A.pdf 22-Dec-99 00:09 256K

IRF634.pdf 22-Dec-99 00:09 237K

IRF634A.pdf 16-Apr-99 13:01 224K

IRF634S.pdf 22-Dec-99 00:09 234K

IRF640A.pdf 22-Dec-99 00:09 260K

IRF644.pdf 16-Feb-00 00:00 237K

IRF644A.pdf 16-Apr-99 13:01 226K

IRF650A.pdf 22-Dec-99 00:09 257K

IRF654.pdf 22-Dec-99 00:09 482K

IRF654A.pdf 16-Apr-99 13:01 2M

IRF710.pdf 22-Dec-99 00:09 236K

IRF710A.pdf 16-Apr-99 13:01 223K

IRF720.pdf 22-Dec-99 00:09 237K

IRF720A.pdf 16-Apr-99 13:01 224K

IRF730.pdf 22-Dec-99 00:09 239K

IRF730A.pdf 16-Apr-99 13:01 226K

IRF740.pdf 22-Dec-99 00:09 242K

IRF740A.pdf 16-Apr-99 13:01 228K

IRF750.pdf 22-Dec-99 00:09 243K

IRF750A.pdf 16-Apr-99 13:01 230K

IRF820.pdf 22-Dec-99 00:09 239K

IRF820A.pdf 16-Apr-99 13:01 226K

IRF820S.pdf 22-Dec-99 00:09 237K

IRF830.pdf 22-Dec-99 00:09 258K

IRF830A.pdf 16-Apr-99 13:01 220K

IRF830S.pdf 22-Dec-99 00:09 232K

IRF840.pdf 22-Dec-99 00:09 236K

IRF840A.pdf 16-Apr-99 13:01 223K

IRF840S.pdf 22-Dec-99 00:09 234K

IRFI510A.pdf 22-Dec-99 00:09 253K

IRFI520A.pdf 22-Dec-99 00:09 252K

IRFI530A.pdf 22-Dec-99 00:09 259K

IRFI540A.pdf 22-Dec-99 00:09 261K

IRFI550A.pdf 22-Dec-99 00:09 266K

IRFI610A.pdf 22-Dec-99 00:09 255K

IRFI614A.pdf 16-Apr-99 13:01 230K

IRFI620A.pdf 22-Dec-99 00:09 261K

IRFI624A.pdf 22-Dec-99 00:09 233K

IRFI630A.pdf 22-Dec-99 00:09 261K

IRFI634A.pdf 16-Apr-99 13:01 224K

IRFI640A.pdf 22-Dec-99 00:09 265K

IRFI644A.pdf 16-Apr-99 13:01 227K

IRFI710A.pdf 16-Apr-99 13:01 224K

IRFI720A.pdf 16-Apr-99 13:01 225K

IRFI730A.pdf 16-Apr-99 13:01 227K

IRFI740A.pdf 16-Apr-99 13:01 229K

IRFI820A.pdf 16-Apr-99 13:01 227K

IRFI830A.pdf 16-Apr-99 13:01 222K

IRFI840A.pdf 16-Apr-99 13:01 224K

IRFIZ14A.pdf 22-Dec-99 00:09 217K

IRFIZ24A.pdf 22-Dec-99 00:09 220K

IRFIZ34A.pdf 22-Dec-99 00:09 225K

IRFIZ44A.pdf 22-Dec-99 00:09 228K

IRFM014A.pdf 22-Dec-99 00:09 258K

IRFM110A.pdf 22-Dec-99 00:09 263K

IRFM120A.pdf 22-Dec-99 00:09 268K

IRFM210A.pdf 22-Dec-99 00:09 266K

IRFM220A.pdf 22-Dec-99 00:09 273K

IRFP140A.pdf 22-Dec-99 00:09 256K

IRFP150A.pdf 22-Dec-99 00:09 261K

IRFP240A.pdf 22-Dec-99 00:09 263K

IRFP244.pdf 22-Dec-99 00:09 472K

IRFP244A.pdf 16-Apr-99 13:01 1000K

IRFP250A.pdf 22-Dec-99 00:09 256K

IRFP254.pdf 22-Dec-99 00:09 244K

IRFP254A.pdf 16-Apr-99 13:01 1M

IRFP340P.pdf 16-Apr-99 13:01 224K

IRFP350.pdf 22-Dec-99 00:09 240K

IRFP350P.pdf 16-Apr-99 13:01 232K

IRFP440.pdf 22-Dec-99 00:09 232K

IRFP440A.pdf 16-Apr-99 13:01 224K

IRFP450.pdf 22-Dec-99 00:09 238K

IRFP450A.pdf 16-Apr-99 13:01 230K

IRFP460.pdf 22-Dec-99 00:09 240K

IRFR014.pdf 22-Dec-99 00:09 219K

IRFR014A.pdf 22-Dec-99 00:09 215K

IRFR024A.pdf 22-Dec-99 00:09 217K

IRFR034.pdf 22-Dec-99 00:09 229K

IRFR034A.pdf 16-Apr-99 13:01 225K

IRFR110A.pdf 22-Dec-99 00:09 255K

IRFR120A.pdf 22-Dec-99 00:09 256K

IRFR130A.pdf 22-Dec-99 00:09 261K

IRFR210A.pdf 22-Dec-99 00:09 257K

IRFR214.pdf 22-Dec-99 00:09 233K

IRFR214A.pdf 16-Apr-99 13:01 229K

IRFR220A.pdf 22-Dec-99 00:09 255K

IRFR224.pdf 22-Dec-99 00:09 235K

IRFR224A.pdf 16-Apr-99 13:01 231K

IRFR230A.pdf 30-Dec-99 00:00 257K

IRFR234.pdf 22-Dec-99 00:09 222K

IRFR234A.pdf 16-Apr-99 13:01 218K

IRFR310.pdf 22-Dec-99 00:09 226K

IRFR310A.pdf 16-Apr-99 13:01 222K

IRFR320.pdf 16-Apr-99 13:01 227K

IRFR320A.pdf 16-Apr-99 13:01 223K

IRFR330.pdf 22-Dec-99 00:09 231K

IRFR330A.pdf 16-Apr-99 13:01 227K

IRFR420.pdf 22-Dec-99 00:09 228K

IRFR420A.pdf 16-Apr-99 13:01 224K

IRFR430.pdf 22-Dec-99 00:09 224K

IRFR430A.pdf 16-Apr-99 13:01 220K

IRFR9024.pdf 22-Dec-99 00:09 379K

IRFR_U110A.pdf 22-Dec-99 00:09 255K

IRFR_U120A.pdf 22-Dec-99 00:09 256K

IRFR_U130A.pdf 22-Dec-99 00:09 261K

IRFR_U210A.pdf 22-Dec-99 00:09 257K

IRFR_U220A.pdf 22-Dec-99 00:09 255K

IRFR_U230A.pdf 30-Dec-99 00:00 257K

IRFS140A.pdf 22-Dec-99 00:09 256K

IRFS150A.pdf 22-Dec-99 00:09 259K

IRFS240A.pdf 22-Dec-99 00:09 258K

IRFS244.pdf 22-Dec-99 00:09 234K

IRFS244A.pdf 16-Apr-99 13:01 226K

IRFS250A.pdf 22-Dec-99 00:09 255K

IRFS254.pdf 22-Dec-99 00:09 243K

IRFS254A.pdf 16-Apr-99 13:01 235K

IRFS340.pdf 22-Dec-99 00:09 231K

IRFS340A.pdf 16-Apr-99 13:01 222K

IRFS350.pdf 22-Dec-99 00:09 249K

IRFS350A.pdf 16-Apr-99 13:01 231K

IRFS440.pdf 22-Dec-99 00:09 231K

IRFS440A.pdf 16-Apr-99 13:01 222K

IRFS450.pdf 22-Dec-99 00:09 238K

IRFS450A.pdf 16-Apr-99 13:01 229K

IRFS460.pdf 22-Dec-99 00:09 240K

IRFS510A.pdf 22-Dec-99 00:09 253K

IRFS520A.pdf 22-Dec-99 00:09 251K

IRFS530A.pdf 22-Dec-99 00:09 261K

IRFS540A.pdf 22-Dec-99 00:09 259K

IRFS550A.pdf 22-Dec-99 00:09 264K

IRFS610A.pdf 22-Dec-99 00:09 257K

IRFS620A.pdf 22-Dec-99 00:09 259K

IRFS630A.pdf 22-Dec-99 00:09 261K

IRFS640A.pdf 22-Dec-99 00:09 264K

IRFS650A.pdf 22-Dec-99 00:09 258K

IRFS710A.pdf 22-Dec-99 00:09 260K

IRFS720A.pdf 22-Dec-99 00:09 258K

IRFS730A.pdf 22-Dec-99 00:09 264K

IRFS740A.pdf 22-Dec-99 00:09 263K

IRFS750A.pdf 22-Dec-99 00:09 274K

IRFS820A.pdf 22-Dec-99 00:09 260K

IRFS830A.pdf 09-Jan-00 00:00 255K

IRFS840A.pdf 22-Dec-99 00:09 264K

IRFSZ14A.pdf 22-Dec-99 00:09 252K

IRFSZ24A.pdf 22-Dec-99 00:09 256K

IRFSZ34A.pdf 22-Dec-99 00:09 262K

IRFSZ44A.pdf 22-Dec-99 00:09 266K

IRFU014A.pdf 22-Dec-99 00:09 215K

IRFU024A.pdf 22-Dec-99 00:09 217K

IRFU034A.pdf 16-Apr-99 13:01 225K

IRFU110A.pdf 22-Dec-99 00:09 255K

IRFU120A.pdf 22-Dec-99 00:09 256K

IRFU130A.pdf 22-Dec-99 00:09 261K

IRFU210A.pdf 22-Dec-99 00:09 257K

IRFU214A.pdf 16-Apr-99 13:01 229K

IRFU220A.pdf 22-Dec-99 00:09 255K

IRFU224A.pdf 16-Apr-99 13:01 231K

IRFU230A.pdf 30-Dec-99 00:00 257K

IRFU234A.pdf 16-Apr-99 13:01 218K

IRFU310A.pdf 16-Apr-99 13:01 222K

IRFU320A.pdf 16-Apr-99 13:01 223K

IRFU330A.pdf 16-Apr-99 13:01 227K

IRFU410A.pdf 22-Dec-99 00:09 190K

IRFU420A.pdf 16-Apr-99 13:01 224K

IRFU430A.pdf 16-Apr-99 13:01 220K

IRFW20A.pdf 03-Dec-99 15:46 261K

IRFW510A.pdf 22-Dec-99 00:09 253K

IRFW520A.pdf 22-Dec-99 00:09 252K

IRFW530A.pdf 22-Dec-99 00:09 259K

IRFW540A.pdf 22-Dec-99 00:09 261K

IRFW550A.pdf 22-Dec-99 00:09 266K

IRFW610A.pdf 22-Dec-99 00:09 255K

IRFW614A.pdf 16-Apr-99 13:01 230K

IRFW620A.pdf 22-Dec-99 00:09 261K

IRFW624A.pdf 22-Dec-99 00:09 233K

IRFW630A.pdf 22-Dec-99 00:09 261K

IRFW634A.pdf 16-Apr-99 13:01 224K

IRFW640A.pdf 22-Dec-99 00:09 265K

IRFW644A.pdf 16-Apr-99 13:01 227K

IRFW710A.pdf 16-Apr-99 13:01 224K

IRFW710S.pdf 22-Dec-99 00:09 234K

IRFW720A.pdf 16-Apr-99 13:01 225K

IRFW720S.pdf 22-Dec-99 00:09 235K

IRFW730A.pdf 16-Apr-99 13:01 227K

IRFW730S.pdf 22-Dec-99 00:09 237K

IRFW740A.pdf 16-Apr-99 13:01 229K

IRFW740S.pdf 22-Dec-99 00:09 239K

IRFW820A.pdf 16-Apr-99 13:01 227K

IRFW830A.pdf 16-Apr-99 13:01 222K

IRFW840A.pdf 16-Apr-99 13:01 224K

IRFWZ14.pdf 22-Dec-99 00:09 227K

IRFWZ14A.pdf 22-Dec-99 00:09 217K

IRFWZ24.pdf 22-Dec-99 00:09 436K

IRFWZ24A.pdf 22-Dec-99 00:09 220K

IRFWZ34.pdf 22-Dec-99 00:09 235K

IRFWZ34A.pdf 22-Dec-99 00:09 225K

IRFWZ44.pdf 22-Dec-99 00:09 238K

IRFWZ44A.pdf 22-Dec-99 00:09 228K

IRFW_I510A.pdf 22-Dec-99 00:09 253K

IRFW_I520A.pdf 22-Dec-99 00:09 252K

IRFW_I530A.pdf 22-Dec-99 00:09 259K

IRFW_I540A.pdf 22-Dec-99 00:09 261K

IRFW_I550A.pdf 22-Dec-99 00:09 266K

IRFW_I610A.pdf 22-Dec-99 00:09 255K

IRFW_I620A.pdf 22-Dec-99 00:09 261K

IRFW_I630A.pdf 22-Dec-99 00:09 261K

IRFW_I640A.pdf 22-Dec-99 00:09 265K

IRFW_IZ24A.pdf 22-Dec-99 00:09 220K

IRFZ14.pdf 22-Dec-99 00:09 229K

IRFZ14A.pdf 22-Dec-99 00:09 216K

IRFZ24.pdf 22-Dec-99 00:09 433K

IRFZ24A.pdf 22-Dec-99 00:09 219K

IRFZ34.pdf 22-Dec-99 00:09 237K

IRFZ34A.pdf 22-Dec-99 00:09 227K

IRFZ44.pdf 22-Dec-99 00:09 240K

IRFZ44A.pdf 22-Dec-99 00:09 227K

IRL510.pdf 22-Dec-99 00:09 236K

IRL510A.pdf 22-Dec-99 00:09 223K

IRL520A.pdf 22-Dec-99 00:09 227K

IRL520S.pdf 22-Dec-99 00:09 238K

IRL530.pdf 22-Dec-99 00:09 241K

IRL530A.pdf 22-Dec-99 00:09 228K

IRL540.pdf 22-Dec-99 00:09 238K

IRL540A.pdf 22-Dec-99 00:09 225K

IRL610.pdf 22-Dec-99 00:09 248K

IRL610A.pdf 22-Dec-99 00:09 235K

IRL610S.pdf 22-Dec-99 00:09 245K

IRL620.pdf 22-Dec-99 00:09 235K

IRL620A.pdf 22-Dec-99 00:09 222K

IRL620S.pdf 22-Dec-99 00:09 232K

IRL630.pdf 22-Dec-99 00:09 237K

IRL630A.pdf 22-Dec-99 00:09 224K

IRL630S.pdf 22-Dec-99 00:09 234K

IRL640.pdf 22-Dec-99 00:09 239K

IRL640A.pdf 22-Dec-99 00:09 226K

IRL640S.pdf 22-Dec-99 00:09 237K

IRLI510A.pdf 22-Dec-99 00:09 223K

IRLI530A.pdf 22-Dec-99 00:09 230K

IRLI540A.pdf 22-Dec-99 00:09 226K

IRLI610A.pdf 22-Dec-99 00:09 236K

IRLI620A.pdf 22-Dec-99 00:09 222K

IRLI630A.pdf 22-Dec-99 00:09 225K

IRLI640A.pdf 22-Dec-99 00:09 227K

IRLII520A.pdf 16-Apr-99 00:00 995K

IRLR110A.pdf 22-Dec-99 00:09 222K

IRLR120A.pdf 22-Dec-99 00:09 225K

IRLR120N.pdf 22-Dec-99 00:09 229K

IRLR130A.pdf 22-Dec-99 00:09 226K

IRLR210.pdf 22-Dec-99 00:09 237K

IRLR210A.pdf 22-Dec-99 00:09 234K

IRLR220.pdf 22-Dec-99 00:09 224K

IRLR220A.pdf 22-Dec-99 00:09 220K

IRLR230.pdf 22-Dec-99 00:09 233K

IRLR230A.pdf 22-Dec-99 00:09 229K

IRLU110A.pdf 22-Dec-99 00:09 222K

IRLU120A.pdf 22-Dec-99 00:09 225K

IRLU130A.pdf 22-Dec-99 00:09 226K

IRLU210A.pdf 22-Dec-99 00:09 234K

IRLU220A.pdf 22-Dec-99 00:09 220K

IRLU230A.pdf 22-Dec-99 00:09 229K

IRLW510A.pdf 22-Dec-99 00:09 223K

IRLW520A.pdf 16-Apr-99 00:00 995K

IRLW530A.pdf 22-Dec-99 00:09 230K

IRLW540A.pdf 22-Dec-99 00:09 226K

IRLW610A.pdf 22-Dec-99 00:09 236K

IRLW620A.pdf 22-Dec-99 00:09 222K

IRLW630A.pdf 22-Dec-99 00:09 225K

IRLW640A.pdf 22-Dec-99 00:09 227K

 $GYDQFHG 3RZHU 026)(7 IRF340
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 11 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3P
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 11
ID A
Continuous Drain Current (TC=100°C) 7
IDM Drain Current-Pulsed (1) 44 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 553 mJ
IAR Avalanche Current (1) 11 A
EAR Repetitive Avalanche Energy (1) 16.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 162 W
PD
Linear Derating Factor 1.3 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.77
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF340 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=5.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.01 -- VDS=50V,ID=5.5A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 11 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 44 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=11A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=11A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF340
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF340 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102
is Limited by R DS(on)
10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
8
101 1 ms
10 ms
DC 6

4
100
@ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.77 o C/W Max.
10- 1 2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
t1
0.01 single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF340
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF340 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF510A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 5.6 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.289 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C ) 5.6
ID Ο
A
Continuous Drain Current (TC=100 C) 4
IDM Drain Current-Pulsed O
1 20 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 63 mJ
IAR Avalanche Current O1 5.6 A
EAR Repetitive Avalanche Energy O1 3.3 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Ο
Total Power Dissipation (TC=25 C ) 33 W
PD
Linear Derating Factor 0.22 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 ” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 4.51
RθCS Case-to-Sink 0.5 -- Ο
C /W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF510A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 A
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C ID=250µA
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=2.8A O
4
On-State Resistance
gfs Forward Transconductance -- 3.49 -- Ω VDS=40V,ID=2.8A O
4

Ciss Input Capacitance -- 190 240

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 21 25
td(on) Turn-On Delay Time -- 10 30
VDD=50V,ID=5.6A,
tr Rise Time -- 14 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 28 70
tf --
See Fig 13 O
4 O
5
Fall Time 18 50
Qg Total Gate Charge -- 8.5 12 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 1.6 -- nC ID=5.6A
Qgd Gate-Drain(“Miller”) Charge -- 4.1 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 20 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=5.6A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns Ο
TJ=25 C ,IF=5.6A
Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=3mH, I AS=5.6A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5.6A, di/dt <_ 250A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF510A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
15V
Top :
[A]

[A]
1001 V 1 101
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100 100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.8
IDR , Reverse Drain Current

101

0.6 VGS = 10 V
RDS(on) , [Ω]

0.4
100

VGS = 20 V
0.2
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
350
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

280 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

210
C oss

140 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
70

@ Notes : ID = 5.6 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF510A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.8 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 6
[A]

[A]

Operation in This Area

is Limited by R DS(on)
5
ID , Drain Current

ID , Drain Current

100 µs
101 4
1 ms
10 ms
3
DC

100 2
@ Notes :
1. TC = 25 oC
1
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

@ Notes :
100 0.2 1. Zθ J C (t)=4.51 o
C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Z (t)
θJ C

0.05
Z JC(t) ,

PDM
0.02
0.01 t1
10- 1 single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF510A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF510A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF520A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.2 Ω
Lower Input Capacitance ID = 9.2 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.155 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 9.2
ID Ο
A
Continuous Drain Current (TC=100 C ) 6.5
IDM Drain Current-Pulsed O
1 37 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O2 113 mJ
IAR Avalanche Current O1 9.2 A
EAR Repetitive Avalanche Energy O1 4.5 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Ο
Total Power Dissipation (TC=25 C ) 45 W
PD
Linear Derating Factor 0.3 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θ JC Junction-to-Case -- 3.31
R θ CS Case-to-Sink 0.5 -- Ο
C /W
R θ JA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF520A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/
∆ TJBreakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µ A Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.2 Ω VGS=10V,ID=4.6A O
4
On-State Resistance
gfs Forward Transconductance -- 6.35 -- Ω VDS=40V,ID=4.6A O
4

Ciss Input Capacitance -- 370 480

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 14 40
VDD=50V,ID=9.2A,
tr Rise Time -- 14 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 36 90
tf --
See Fig 13 O
4 O
5
Fall Time 28 70
Qg Total Gate Charge -- 16 22 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=9.2A
Qgd Gate-Drain(“Miller”) Charge -- 7.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 37 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=9.2A,VGS=0V
trr Reverse Recovery Time -- 98 -- ns Ο
TJ=25 C ,IF=9.2A
Qrr Reverse Recovery Charge -- 0.34 -- µ C diF/dt=100A/ µ s O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
L=2mH, IAS=9.2A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 _
< µ _ BVDSS , Starting T J =25 oC
_ 9.2A, di/dt 300A/ s, V DD <
ISD <
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF520A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100
0
10 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

[A]
Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

101
0.3 VGS = 10 V
RDS(on) , [Ω ]

0.2

100
VGS = 20 V
0.1
@ Notes :
175 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

400 VDS = 80 V
Capacitance

C oss

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 9.2 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF520A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.6 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
[A]

102 Operation in This Area [A]

is Limited by R DS(on)
8
ID , Drain Current

ID , Drain Current

100 µs

101 1 ms 6
10 ms
DC
4

100
@ Notes :
1. TC = 25 oC 2
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100
@ Notes :
0.2
1. Zθ J C (t)=3.31 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
ZθJC(t) ,

PDM
0.02
10- 1
0.01 single pulse t1
t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF520A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF520A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF530A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.11 Ω
Lower Input Capacitance ID = 14 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.092 Ω(Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
14
ID A
Continuous Drain Current (TC=100 C) Ο
9.9
IDM Drain Current-Pulsed O
1 56 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 261 mJ
IAR Avalanche Current O1 14 A
EAR Repetitive Avalanche Energy O1 5.5 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
55 W
PD
Linear Derating Factor 0.36 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 2.74
Ο
R θCS Case-to-Sink 0.5 -- C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF530A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C ID=250 µA
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.11 Ω VGS=10V,ID=7A O
4
On-State Resistance
gfs Forward Transconductance -- 10.25 -- Ω VDS=40V,ID=7A O
4

Ciss Input Capacitance -- 610 790

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 62 72
td(on) Turn-On Delay Time -- 13 40
VDD=50V,ID=14A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 55 110
tf --
See Fig 13 O
4 O
5
Fall Time 36 80
Qg Total Gate Charge -- 27 36 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 4.5 -- nC ID=14A
Qgd Gate-Drain(“Miller”) Charge -- 12.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 56 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=14A,VGS=0V
trr Reverse Recovery Time -- 109 -- ns Ο
TJ=25 C ,IF=14A
Qrr Reverse Recovery Charge -- 0.41 -- ¥ìC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=14A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 14A, di/dt <_ 350A/µs, VDD<_ BVDSS , Starting T J =25oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF530A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
101 5.0 V
Bottom : 4.5 V
175 oC

100
25 oC
@ Notes :
1. VGS = 0 V
0 @ Notes :
10 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
IDR , Reverse Drain Current

VGS = 10 V
0.15
101
RDS(on) , [Ω]

0.10

100
VGS = 20 V
0.05
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 15 30 45 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V
750
VDS = 80 V
Capacitance

C oss
500
5
@ Notes :
1. VGS = 0 V
C rss
250 2. f = 1 MHz

@ Notes : ID = 14.0 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF530A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
12
ID , Drain Current

ID , Drain Current

10 µs
100 µs
1 ms 9
101
10 ms
DC
6

0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
@ Notes :
0.2 o C/W
1. Z J C (t)=2.74 Max.
θ
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

10- 1 0.02 PDM

0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF530A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF530A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF540A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.052 Ω
Lower Input Capacitance ID = 28 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.041 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
28
ID A
Continuous Drain Current (TC=100 C) Ο
19.8
IDM Drain Current-Pulsed O
1 110 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 523 mJ
IAR Avalanche Current O1 28 A
EAR Repetitive Avalanche Energy O1 10.7 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
107 W
PD
Linear Derating Factor 0.71 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.4
R θCS Case-to-Sink 0.5 -- Ο
C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF540A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V C Ο
ID=250 µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.052 Ω VGS=10V,ID=14A O
4
On-State Resistance
gfs Forward Transconductance -- 22.56 -- Ω VDS=40V,ID=14A O
4

Ciss Input Capacitance -- 1320 1710

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 325 380 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 148 170
td(on) Turn-On Delay Time -- 18 50
VDD=50V,ID=28A,
tr Rise Time -- 18 50
ns RG=9.1 Ω
td(off) Turn-Off Delay Time -- 90 180
tf --
See Fig 13 O
4 O
5
Fall Time 56 120
Qg Total Gate Charge -- 60 78 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 10.8 -- nC ID=28A
Qgd Gate-Drain(“Miller”) Charge -- 27.9 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 28 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 110 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=28A,VGS=0V
trr Reverse Recovery Time -- 132 -- ns Ο
TJ=25 C ,IF=28A
Qrr Reverse Recovery Charge -- 0.63 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=28A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 28A, di/dt <_ 400A/ µs, V DD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF540A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V 175 oC
5.0 V
Bottom : 4.5 V
101
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
1. 250 µs Pulse Test
3. 250 µs Pulse Test
100 2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.08
102
IDR , Reverse Drain Current

0.06 VGS = 10 V
RDS(on) , [Ω]

0.04 101

VGS = 20 V
0.02
@ Notes :
175 oC
1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 100
0 30 60 90 120 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

2000 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

1500
C oss

1000 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
500

@ Notes : ID =28.0 A
00 0
10 101 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF540A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 14.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 30
[A]

[A]

Operation in This Area

is Limited by R DS(on)
25
ID , Drain Current

ID , Drain Current

102 10 µs
100 µs 20
1 ms
10 ms
101 15
DC

10
@ Notes :
100
1. TC = 25 oC
5
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.4 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.05

PDM
Z JC(t) ,

0.02
0.01 single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF540A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF540A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF550A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.04 Ω
Lower Input Capacitance ID = 40 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.032 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
40
ID A
Continuous Drain Current (TC=100 C) Ο
28.3
IDM Drain Current-Pulsed O
1 160 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 640 mJ
IAR Avalanche Current O1 40 A
EAR Repetitive Avalanche Energy O1 16.7 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C)Ο
167 W
PD
Linear Derating Factor 1.11 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 0.9
R θCS Case-to-Sink 0.5 -- Ο
C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF550A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=20A O
4
On-State Resistance
gfs Forward Transconductance -- 27.44 -- Ω VDS=40V,ID=20A O
4

Ciss Input Capacitance -- 1750 2270

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 420 485 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 185 215
td(on) Turn-On Delay Time -- 17 50
VDD=50V,ID=40A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 80 160
tf -- 100
See Fig 13 O
4 O
5
Fall Time 45
Qg Total Gate Charge -- 75 97 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 13.2 -- nC ID=40A
Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 40 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 160 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.6 V Ο
TJ=25 C ,IS=40A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns Ο
TJ=25 C ,IF=40A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=0.6mH, I AS=40A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF550A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
102 Top : 15V 102
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V 175 oC
Bottom : 4.5 V
1
10
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
100 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.06
IDR , Reverse Drain Current

102
0.05
VGS = 10 V
RDS(on) , [Ω]

0.04

0.03
101
VGS = 20 V
0.02

@ Notes :
0.01 175 oC
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 175 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

2000 VDS = 80 V
Capacitance

C oss

5
@ Notes :
1000 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID =40.0 A
00 0
10 101 0 10 20 30 40 50 60 70 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF550A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 20.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 50
[A]

[A]

Operation in This Area

is Limited by R DS(on)

10 µs 40
ID , Drain Current

ID , Drain Current

102
100 µs
1 ms
30
10 ms
101 DC

20

@ Notes :
100
1. TC = 25 oC 10
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.9 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
0.01 t1
single pulse
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF550A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF550A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF610A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 1.5 Ω
Lower Input Capacitance ID = 3.3 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220
Low RDS(ON) : 1.169 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 3.3
ID A
Continuous Drain Current (TC=100 oC) 2.1
IDM Drain Current-Pulsed O
1 10 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 44 mJ
IAR Avalanche Current O1 3.3 A
EAR Repetitive Avalanche Energy O1 3.8 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC) 38 W
PD o
Linear Derating Factor 0.31 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.28
o
R θCS Case-to-Sink 0.5 -- C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF610A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250 µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.23 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.65A O
4
On-State Resistance
gfs Forward Transconductance -- 1.31 -- Ω VDS=40V,ID=1.65A O
4

Ciss Input Capacitance -- 160 210

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 44 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=3.3A,
tr Rise Time -- 10 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 20 50
See Fig 13 4 O
tf Fall Time -- 12 35 O 5

Qg Total Gate Charge -- 7 10 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 1.5 -- nC ID=3.3A
4 O
O 5
Qgd Gate-Drain( “Miller”) Charge -- 3.5 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 10 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=3.3A,VGS=0V
trr Reverse Recovery Time -- 107 -- ns TJ=25oC ,IF=3.3A
Qrr Reverse Recovery Charge -- 0.33 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=6mH, I AS=3.3A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 3.3A, di/dt <_ 140A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µ s, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF610A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
101 101
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
100 Bottom : 4.5 V
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : - 55 oC 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4 101
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V
3
RDS(on) , [Ω]

2 100

1
150 oC @ Notes :
VGS = 20 V
1. VGS = 0 V
25 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC

0 10-1
0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 100 V

C iss VDS = 160 V

200
Capacitance

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 3.3 A
00 0
10 101 0 2 4 6 8
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF610A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

101 3
100 µs
1 ms
10 ms
100 DC 2

@ Notes :
10-1 1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.28 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01
single pulse PDM

t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF610A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF610A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF614
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0Ω
♦ Lower Input Capacitance ID = 2.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Lower RDS(ON): 1.393Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.8
ID A
Continuous Drain Current (TC=100°C) 1.8
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 49 mJ
IAR Avalanche Current (1) 2.8 A
EAR Repetitive Avalanche Energy (1) 4.0 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 40 W
PD
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.14
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF614 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.59 -- VDS=40V,ID=1.4A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.8A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=2.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF614
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF614 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0
10 ms
100 DC
1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.14 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
0.01 PDM
Z JC(t) ,

single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF614
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF614 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF614A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0Ω
♦ Lower Input Capacitance ID = 2.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Lower RDS(ON): 1.393Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.8
ID A
Continuous Drain Current (TC=100°C) 1.8
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 49 mJ
IAR Avalanche Current (1) 2.8 A
EAR Repetitive Avalanche Energy (1) 4.0 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 40 W
PD
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.14
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF614A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.59 -- VDS=40V,ID=1.4A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.8A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=2.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF614A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF614A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0
10 ms
100 DC
1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.14 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
0.01 PDM
Z JC(t) ,

single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF614A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF614A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF614S
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0 Ω
♦ Lower Input Capacitance ID = 2.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 1.393Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.8
ID A
Continuous Drain Current (TC=100°C) 1.8
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 49 mJ
IAR Avalanche Current (1) 2.8 A
EAR Repetitive Avalanche Energy (1) 4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 40 W
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.14
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF614S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.59 -- VDS=40V,ID=1.4A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.8A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=2.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF614S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF614S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0
10 ms
100 DC
1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.14 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
0.01 PDM
Z JC(t) ,

single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF614S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF614S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF620A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 5 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220
Low RDS(ON) : 0.626 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 5
ID A
Continuous Drain Current (TC=100 oC) 3.2
IDM Drain Current-Pulsed O
1 18 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 67 mJ
IAR Avalanche Current O
1 5 A
EAR Repetitive Avalanche Energy O
1 4.7 mJ
dv/dt Peak Diode Recovery dv/dt O
3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 47 W
PD o
Linear Derating Factor 0.38 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering o
TL 300 C
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.65
o
RθCS Case-to-Sink 0.5 -- C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF620A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=2.5A O
4
On-State Resistance
gfs Forward Transconductance -- 2.41 -- Ω VDS=40V,ID=2.5A O
4

Ciss Input Capacitance -- 275 360

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 25 30
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=5A,
tr Rise Time -- 11 30
ns RG=18Ω
td(off) Turn-Off Delay Time -- 26 60
See Fig 13 4 O
tf Fall Time -- 15 40 O 5

Qg Total Gate Charge -- 12 17 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 2.4 -- nC ID=5A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 6.2 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 18 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC ,IS=5A,VGS=0V
trr Reverse Recovery Time -- 122 -- ns TJ=25oC ,IF=5A
Qrr Reverse Recovery Charge -- 0.51 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximumo Junction Temperature
1
O2 L=4mH, I AS=5A, VDD=50V, R G=27Ω, Starting T J =25 C
O3 ISD<_ 5A, di/dt <_ 180A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250µ s, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF620A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15V
101
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
10-1 - 55 oC
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

101

1.5 VGS = 10 V
RDS(on) , [Ω]

1.0
100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.0 10-1
0 3 6 9 12 15 18 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

400 Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
C iss
VDS = 160 V
Capacitance

300

200 C oss 5
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
100

@ Notes : ID = 5.0 A
00 0
10 101 0 3 6 9 12
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF620A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
5
ID , Drain Current

ID , Drain Current

101 100 µs
4
1 ms
10 ms
DC 3
100

2
@ Notes :
-1
10 1. TC = 25 oC
2. TJ = 150 oC 1
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
o
1. Zθ J C (t)=2.65
C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF620A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF620A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF624
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.1Ω
♦ Lower Input Capacitance ID = 4.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Low RDS(ON): 0.742Ω(Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 4.1
ID A
Continuous Drain Current (TC=100°C) 2.6
IDM Drain Current-Pulsed (1) 16 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 84 mJ
IAR Avalanche Current (1) 4.1 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.54
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF624 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.30 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.1 Ω VGS=10V,ID=2.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.69 -- VDS=40V,ID=2.05A (4)
Ciss Input Capacitance -- 335 430
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 23 28
td(on) Turn-On Delay Time -- 11 30
VDD=125V,ID=4.1A,
tr Rise Time -- 12 35
ns RG=18Ω
td(off) Turn-Off Delay Time -- 32 75
See Fig 13 (4) (5)
tf Fall Time -- 15 40
Qg Total Gate Charge -- 14 20 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 2.8 -- nC ID=4.1A
Qgd Gate-Drain ( Miller ) Charge -- 6.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 16 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=4.1A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns TJ=25°C,IF=4.1A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=4.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.1A, di/dt ≤ 170A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF624
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15 V 101
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
-1
10 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5
1
10

IDR , Reverse Drain Current [A]

2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5 100

1.0
VGS = 20 V 10-1

0.5 @ Notes :
1. VGS = 0 V
@ Note : TJ = 25 C o 150 oC 2. 250 µs Pulse Test
25 oC
0.0 10-2
0 2 4 6 8 10 12 14 16 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
C iss Crss= Cgd 10
400
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

300 VDS = 200 V

200 C oss @ Notes : 5

1. VGS = 0 V
2. f = 1 MHz
100 C rss

@ Notes : ID = 4.1 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF624 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs
1 ms
10 ms 3
DC
100
2

@ Notes :
10-1
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.54 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF624
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF624 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF624A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.1Ω
♦ Lower Input Capacitance ID = 4.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Low RDS(ON): 0.742Ω(Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 4.1
ID A
Continuous Drain Current (TC=100°C) 2.6
IDM Drain Current-Pulsed (1) 16 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 84 mJ
IAR Avalanche Current (1) 4.1 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.54
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF624A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.30 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.1 Ω VGS=10V,ID=2.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.69 -- VDS=40V,ID=2.05A (4)
Ciss Input Capacitance -- 335 430
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 23 28
td(on) Turn-On Delay Time -- 11 30
VDD=125V,ID=4.1A,
tr Rise Time -- 12 35
ns RG=18Ω
td(off) Turn-Off Delay Time -- 32 75
See Fig 13 (4) (5)
tf Fall Time -- 15 40
Qg Total Gate Charge -- 14 20 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 2.8 -- nC ID=4.1A
Qgd Gate-Drain ( Miller ) Charge -- 6.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 16 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=4.1A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns TJ=25°C,IF=4.1A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=4.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.1A, di/dt ≤ 170A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF624A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15 V 101
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
-1
10 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5
1
10

IDR , Reverse Drain Current [A]

2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5 100

1.0
VGS = 20 V 10-1

0.5 @ Notes :
1. VGS = 0 V
@ Note : TJ = 25 C o 150 oC 2. 250 µs Pulse Test
25 oC
0.0 10-2
0 2 4 6 8 10 12 14 16 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
C iss Crss= Cgd 10
400
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

300 VDS = 200 V

200 C oss @ Notes : 5

1. VGS = 0 V
2. f = 1 MHz
100 C rss

@ Notes : ID = 4.1 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF624A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs
1 ms
10 ms 3
DC
100
2

@ Notes :
10-1
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.54 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF624A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF624A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF630A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 9 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220
Low RDS(ON) : 0.333 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 9
ID o A
Continuous Drain Current (TC=100 C ) 5.7
IDM Drain Current-Pulsed O
1 36 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 162 mJ
IAR Avalanche Current O1 9 A
EAR Repetitive Avalanche Energy O1 7.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 72 W
PD
Linear Derating Factor 0.57 W/ oC
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.74
R o
θCS Case-to-Sink 0.5 -- C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF630A POWER MOSFET

Electrical Characteristics (TC=25 oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250 µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.21 -- V/ oC ID=250 µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=4.5A O
4
On-State Resistance
gfs Forward Transconductance -- 3.87 -- Ω VDS=40V,ID=4.5A O
4

Ciss Input Capacitance -- 500 650

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 45 55
td(on) Turn-On Delay Time -- 13 40
VDD=100V,ID=9A,
tr Rise Time -- 13 40
ns RG=12 Ω
td(off) Turn-Off Delay Time -- 30 70
See Fig 13
tf Fall Time -- 18 50 O
4 O
5

Qg Total Gate Charge -- 22 29 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 4.3 -- nC ID=9A
Qgd Gate-Drain( “Miller” ) Charge -- 10.9 -- See Fig 6 & Fig 12
O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 36 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25 oC ,IS=9A,VGS=0V
o
trr Reverse Recovery Time -- 137 -- ns TJ=25 C ,IF=9A
Qrr Reverse Recovery Charge -- 0.68 -- µC diF/dt=100A/ µs O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
2 L=3mH, I =9A, V =50V, R =27 Ω, Starting T =25 C
o
O AS DD G J

O3 ISD <_ 9A, di/dt < 220A/ µs, VDD < BVDSS , Starting T J =25 oC
_ _
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF630A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
101 101
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V 101
0.75
RDS(on) , [Ω]

0.50

100

0.25 @ Notes :
VGS = 20 V
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 5 10 15 20 25 30 35 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
800
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

C iss Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
600
VDS = 160 V
Capacitance

400
C oss
5
@ Notes :
1. VGS = 0 V
200 C rss 2. f = 1 MHz

@ Notes : ID = 9.0 A
00 0
10 101 0 5 10 15 20 25
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF630A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
8
ID , Drain Current

ID , Drain Current

100 µs
101 1 ms
10 ms 6

DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

@ Notes :
0.2 o C/W
1. Z J C (t)=1.74 Max.
θ
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF630A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF630A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF634
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 8.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Lower RDS(ON): 0.327Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 8.1
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 205 mJ
IAR Avalanche Current (1) 8.1 A
EAR Repetitive Avalanche Energy (1) 7.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 74 W
PD
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.69
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF634 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=4.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.1 -- VDS=40V,ID=4.05A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.1A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=5mH, IAS=8.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF634
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF634 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101
1 ms
6
10 ms
DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.69 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF634
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF634 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF634A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 8.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Lower RDS(ON): 0.327Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 8.1
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 205 mJ
IAR Avalanche Current (1) 8.1 A
EAR Repetitive Avalanche Energy (1) 7.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 74 W
PD
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.69
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF634A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=4.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.1 -- VDS=40V,ID=4.05A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.1A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=5mH, IAS=8.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF634A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF634A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101
1 ms
6
10 ms
DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.69 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF634A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF634A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF634S
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 8.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.327Ω(Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 8.1
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 205 mJ
IAR Avalanche Current (1) 8.1 A
EAR Repetitive Avalanche Energy (1) 7.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 74 W
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.69
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF634S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=4.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.1 -- VDS=40V,ID=4.05A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.1A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=5mH, IAS=8.1A, VDD=50V, RG=27Ω Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF634S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF634S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101
1 ms
6
10 ms
DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.69 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF634S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF634S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF640A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.18 Ω
Lower Input Capacitance ID = 18 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220
Lower RDS(ON) : 0.144 Ω(Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 18
ID A
Continuous Drain Current (TC=100 oC) 11.4
IDM Drain Current-Pulsed O
1 72 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 216 mJ
IAR Avalanche Current O1 18 A
EAR Repetitive Avalanche Energy O1 13.9 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 139 W
PD o
Linear Derating Factor 1.11 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.9
o
R θCS Case-to-Sink 0.5 -- C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF640A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.26 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.18 Ω VGS=10V,ID=9A O
4
On-State Resistance
gfs Forward Transconductance -- 9.61 -- Ω VDS=40V,ID=9A O
4

Ciss Input Capacitance -- 1160 1500

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 250 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 94 110
td(on) Turn-On Delay Time -- 17 40
VDD=100V,ID=18A,
tr Rise Time -- 16 40
ns RG=9.1 Ω
td(off) Turn-Off Delay Time -- 48 110
See Fig 13 4 O
tf Fall Time -- 24 60 O 5

Qg Total Gate Charge -- 44 58 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 10.4 -- nC ID=18A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 27.1 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 18 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 72 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=18A,VGS=0V
trr Reverse Recovery Time -- 195 -- ns TJ=25oC ,IF=18A
Qrr Reverse Recovery Charge -- 1.35 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=18A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 18A, di/dt <_260A/ µs, V DD <_BVDSS , Starting T J =25oC

O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF640A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
101 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
@ Notes :
25 oC
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

VGS = 10 V
0.3
101
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 20 40 60 80 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss VDS = 100 V

1500
VDS = 160 V
Capacitance

1000

C oss 5
@ Notes :
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 18.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF640A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 9.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
[A]

[A]

Operation in This Area

is Limited by R DS(on)
102
ID , Drain Current

ID , Drain Current

15
100 µs
1 ms
101 10 ms
10
DC

100 @ Notes :
5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5

0.2 @ Notes :
o
-1
1. Zθ J C (t)=0.9 C/W Max.
10 0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Z (t)
θJC
Z JC(t) ,

0.02
PDM
0.01
single pulse t1
10- 2
θ

t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 IRF640A

N-CHANNEL
POWER MOSFET

Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF640A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF644S
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 14 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.214Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 14
ID A
Continuous Drain Current (TC=100°C) 8.9
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 490 mJ
IAR Avalanche Current (1) 14 A
EAR Repetitive Avalanche Energy (1) 13.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 139 W
Linear Derating Factor 1.11 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.9
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF644S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=7A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.65 -- VDS=40V,ID=7A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=14A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=4mH, IAS=14A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF644S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF644S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
102 is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms
9
101 10 ms
DC
6
0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.9 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF644S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF644S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF644A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 14 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Lower RDS(ON): 0.214Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 14
ID A
Continuous Drain Current (TC=100°C) 8.9
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 490 mJ
IAR Avalanche Current (1) 14 A
EAR Repetitive Avalanche Energy (1) 13.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 139 W
PD
Linear Derating Factor 1.11 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.9
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF644A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=7A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.65 -- VDS=40V,ID=7A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=14A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=4mH, IAS=14A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF644A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF644A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
102 is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms
9
101 10 ms
DC
6
0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.9 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF644A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF644A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRF650A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.085 Ω
Lower Input Capacitance ID = 28 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µ A (Max.) @ VDS = 200V
TO-220
Low RDS(ON) : 0.071 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 28
ID A
Continuous Drain Current (TC=100 oC) 17.7
IDM Drain Current-Pulsed O
1 112 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 523 mJ
IAR Avalanche Current O1 28 A
EAR Repetitive Avalanche Energy O1 15.6 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC) 156 W
PD o
Linear Derating Factor 1.25 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
Rθ JC Junction-to-Case -- 0.8
o
RθCS Case-to-Sink 0.5 -- C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF650A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.085 Ω VGS=10V,ID=14A O
4
On-State Resistance
gfs Forward Transconductance -- 18.44 -- Ω VDS=40V,ID=14A O
4

Ciss Input Capacitance -- 2300 3000

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 410 475 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 200 230
td(on) Turn-On Delay Time -- 21 50
VDD=100V,ID=32A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 77 160
See Fig 13 4 O
tf Fall Time -- 38 90 O 5

Qg Total Gate Charge -- 95 123 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 18 -- nC ID=32A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 45.3 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 28 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 112 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=28A,VGS=0V
trr Reverse Recovery Time -- 203 -- ns TJ=25oC ,IF=32A
Qrr Reverse Recovery Charge -- 1.52 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=28A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 32A, di/dt <_320A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRF650A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
101
150 oC
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
100 1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
2
IDR , Reverse Drain Current

10

0.15
VGS = 10 V
RDS(on) , [Ω]

0.10
101

0.05 VGS = 20 V
150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss
3000 VDS = 100 V
Capacitance

VDS = 160 V

2000
C oss 5
@ Notes :
1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 32.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRF650A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 16.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 30
[A]

[A]

Operation in This Area

is Limited by R DS(on) 25
ID , Drain Current

ID , Drain Current

102 10 µs
100 µs 20
1 ms
10 ms
101 15
DC

10
@ Notes :
100
1. TC = 25 oC
2. TJ = 150 oC 5

3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2
@ Notes :
10- 1 1. Zθ J C (t)=0.8 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02
PDM
0.01
single pulse
t1
10- 2
θ

t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRF650A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRF650A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
$GYDQFHG 3RZHU 026)(7 IRF654
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 21 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 21
ID A
Continuous Drain Current (TC=100°C) 13.3
IDM Drain Current-Pulsed (1) 84 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 551 mJ
IAR Avalanche Current (1) 21 A
EAR Repetitive Avalanche Energy (1) 15.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 156 W
PD
Linear Derating Factor 1.25 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.8
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF654 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=10.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 15.7 -- VDS=40V,ID=10.5A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 21 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 84 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=21A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=2mH, IAS=21A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF654
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
o
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF654 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
Operation in This Area
is Limited by R DS(on)
102 20
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 15
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2
1. Zθ J C (t)=0.8 o C/W Max.
10- 1 0.1
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF654
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF654 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
$GYDQFHG 3RZHU 026)(7 IRF654A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 21 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-220
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 21
ID A
Continuous Drain Current (TC=100°C) 13.3
IDM Drain Current-Pulsed (1) 84 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 551 mJ
IAR Avalanche Current (1) 21 A
EAR Repetitive Avalanche Energy (1) 15.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 156 W
PD
Linear Derating Factor 1.25 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.8
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF654A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=10.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 15.7 -- VDS=40V,ID=10.5A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 21 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 84 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=21A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=2mH, IAS=21A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF654A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
o
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF654A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
Operation in This Area
is Limited by R DS(on)
102 20
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 15
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2
1. Zθ J C (t)=0.8 o C/W Max.
10- 1 0.1
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF654A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF654A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF710
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.6Ω
♦ Lower Input Capacitance ID = 2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Low RDS(ON): 2.815Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 2
ID A
Continuous Drain Current (TC=100°C) 1.3
IDM Drain Current-Pulsed (1) 6 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 114 mJ
IAR Avalanche Current (1) 2 A
EAR Repetitive Avalanche Energy (1) 3.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 36 W
PD
Linear Derating Factor 0.29 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.44
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF710 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.53 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.6 Ω VGS=10V,ID=1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.29 -- VDS=50V,ID=1A (4)
Ciss Input Capacitance -- 215 280
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 42 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 13 17
td(on) Turn-On Delay Time -- 11 30
VDD=200V,ID=2A,
tr Rise Time -- 15 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 38 90
See Fig 13 (4) (5)
tf Fall Time -- 13 35
Qg Total Gate Charge -- 10 14 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 6 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2A,VGS=0V
trr Reverse Recovery Time -- 224 -- ns TJ=25°C,IF=2A
Qrr Reverse Recovery Charge -- 0.87 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2A, di/dt ≤ 80A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF710
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

100

ID , Drain Current [A]

6.0 V 100
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

10-1 10-1
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-2 -2
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

6 VGS = 10 V
100
RDS(on) , [ Ω ]

VGS = 20 V 10-1

2
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0 10-2
0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
400
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

300
Capacitance [pF]

C iss VDS = 320 V

200
5
@ Notes :
C oss 1. VGS = 0 V
100 2. f = 1 MHz
C rss
@ Notes : ID = 2.0 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF710 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101
2.0
ID , Drain Current [A]

100 µs
ID , Drain Current [A]
1 ms
10 ms 1.5
100
DC

1.0

-1 @ Notes :
10
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
0
10
0.2 @ Notes :
1. Zθ J C (t)=3.44 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1
0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF710
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF710 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF710A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.6Ω
♦ Lower Input Capacitance ID = 2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Low RDS(ON): 2.815Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 2
ID A
Continuous Drain Current (TC=100°C) 1.3
IDM Drain Current-Pulsed (1) 6 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 114 mJ
IAR Avalanche Current (1) 2 A
EAR Repetitive Avalanche Energy (1) 3.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 36 W
PD
Linear Derating Factor 0.29 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.44
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF710A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.53 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.6 Ω VGS=10V,ID=1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.29 -- VDS=50V,ID=1A (4)
Ciss Input Capacitance -- 215 280
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 42 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 13 17
td(on) Turn-On Delay Time -- 11 30
VDD=200V,ID=2A,
tr Rise Time -- 15 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 38 90
See Fig 13 (4) (5)
tf Fall Time -- 13 35
Qg Total Gate Charge -- 10 14 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 6 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2A,VGS=0V
trr Reverse Recovery Time -- 224 -- ns TJ=25°C,IF=2A
Qrr Reverse Recovery Charge -- 0.87 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2A, di/dt ≤ 80A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF710A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

100

ID , Drain Current [A]

6.0 V 100
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

10-1 10-1
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-2 -2
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

6 VGS = 10 V
100
RDS(on) , [ Ω ]

VGS = 20 V 10-1

2
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0 10-2
0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
400
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

300
Capacitance [pF]

C iss VDS = 320 V

200
5
@ Notes :
C oss 1. VGS = 0 V
100 2. f = 1 MHz
C rss
@ Notes : ID = 2.0 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF710A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101
2.0
ID , Drain Current [A]

100 µs
ID , Drain Current [A]
1 ms
10 ms 1.5
100
DC

1.0

-1 @ Notes :
10
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
0
10
0.2 @ Notes :
1. Zθ J C (t)=3.44 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1
0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF710A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF710A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF720
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.8Ω
♦ Lower Input Capacitance ID = 3.3 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 1.408Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 3.3
ID A
Continuous Drain Current (TC=100°C) 2.1
IDM Drain Current-Pulsed (1) 13 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 249 mJ
IAR Avalanche Current (1) 3.3 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF720 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.54 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.8 Ω VGS=10V,ID=1.65A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.25 -- VDS=50V,ID=1.65A (4)
Ciss Input Capacitance -- 385 500
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 60 70 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 27 33
td(on) Turn-On Delay Time -- 12 35
VDD=200V,ID=3.3A,
tr Rise Time -- 17 45
ns RG=18Ω
td(off) Turn-Off Delay Time -- 51 110
See Fig 13 (4) (5)
tf Fall Time -- 18 45
Qg Total Gate Charge -- 19 26 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=3.3A
Qgd Gate-Drain ( Miller ) Charge -- 11.1 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 13 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.3A,VGS=0V
trr Reverse Recovery Time -- 230 -- ns TJ=25°C,IF=3.3A
Qrr Reverse Recovery Charge -- 1.16 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=40mH, IAS=3.3A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 3.3A, di/dt ≤ 110A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF720
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1
10 VGS 101
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
150 oC
100 Bottom : 4.5 V

100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
5
1
10

IDR , Reverse Drain Current [A]

4
Drain-Source On-Resistance
RDS(on) , [ Ω ]

VGS = 10 V
3

100
2

VGS = 20 V
1 150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0 10-1
0 3 6 9 12 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
C iss
VDS = 200 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400 VDS = 320 V

5
C oss
200 @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 3.3 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF720 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
0 2
10 DC

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF720
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF720 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF720A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.8Ω
♦ Lower Input Capacitance ID = 3.3 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 1.408Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 3.3
ID A
Continuous Drain Current (TC=100°C) 2.1
IDM Drain Current-Pulsed (1) 13 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 249 mJ
IAR Avalanche Current (1) 3.3 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF720A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.54 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.8 Ω VGS=10V,ID=1.65A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.25 -- VDS=50V,ID=1.65A (4)
Ciss Input Capacitance -- 385 500
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 60 70 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 27 33
td(on) Turn-On Delay Time -- 12 35
VDD=200V,ID=3.3A,
tr Rise Time -- 17 45
ns RG=18Ω
td(off) Turn-Off Delay Time -- 51 110
See Fig 13 (4) (5)
tf Fall Time -- 18 45
Qg Total Gate Charge -- 19 26 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=3.3A
Qgd Gate-Drain ( Miller ) Charge -- 11.1 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 13 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.3A,VGS=0V
trr Reverse Recovery Time -- 230 -- ns TJ=25°C,IF=3.3A
Qrr Reverse Recovery Charge -- 1.16 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=40mH, IAS=3.3A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 3.3A, di/dt ≤ 110A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF720A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1
10 VGS 101
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
150 oC
100 Bottom : 4.5 V

100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
5
1
10

IDR , Reverse Drain Current [A]

4
Drain-Source On-Resistance
RDS(on) , [ Ω ]

VGS = 10 V
3

100
2

VGS = 20 V
1 150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0 10-1
0 3 6 9 12 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
C iss
VDS = 200 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400 VDS = 320 V

5
C oss
200 @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 3.3 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF720A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
0 2
10 DC

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF720A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF720A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF730
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.0Ω
♦ Lower Input Capacitance ID = 5.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 0.765Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 5.5
ID A
Continuous Drain Current (TC=100°C) 3.5
IDM Drain Current-Pulsed (1) 22 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 346 mJ
IAR Avalanche Current (1) 5.5 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.58 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.71
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF730 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.52 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.0 Ω VGS=10V,ID=2.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 4.03 -- VDS=50V,ID=2.75A (4)
Ciss Input Capacitance -- 675 880
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 43 52
td(on) Turn-On Delay Time -- 15 40
VDD=200V,ID=5.5A,
tr Rise Time -- 18 50
ns RG=12Ω
td(off) Turn-Off Delay Time -- 62 140
See Fig 13 (4) (5)
tf Fall Time -- 22 60
Qg Total Gate Charge -- 32 42 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 4.6 -- nC ID=5.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 22 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=5.5A,VGS=0V
trr Reverse Recovery Time -- 259 -- ns TJ=25°C,IF=5.5A
Qrr Reverse Recovery Charge -- 1.81 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=5.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 5.5A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF730
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
101 10 V 101
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V 150 oC

100
100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
10-1 2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5

IDR , Reverse Drain Current [A]

101
2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5

1.0 100

VGS = 20 V

0.5 @ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 5 10 15 20 25 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
C iss Crss= Cgd 10
800
VGS , Gate-Source Voltage [V]

VDS = 200 V
Capacitance [pF]

600 VDS = 320 V

400 @ Notes : 5
C oss 1. VGS = 0 V
2. f = 1 MHz

200 C rss

@ Notes : ID = 5.5 A
00 1
0
10 10 0 5 10 15 20 25 30 35
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF730 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.75 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6.0
102 Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 4.5
101 100 µs
1 ms
10 ms
DC 3.0
100

@ Notes :
10-1 1.5
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.71 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
-1 0.05 3. TJ M -TC =PD M *Zθ J C (t)
10
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF730
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF730 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF730A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.0Ω
♦ Lower Input Capacitance ID = 5.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 0.765Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 5.5
ID A
Continuous Drain Current (TC=100°C) 3.5
IDM Drain Current-Pulsed (1) 22 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 346 mJ
IAR Avalanche Current (1) 5.5 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.58 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.71
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF730A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.52 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.0 Ω VGS=10V,ID=2.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 4.03 -- VDS=50V,ID=2.75A (4)
Ciss Input Capacitance -- 675 880
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 43 52
td(on) Turn-On Delay Time -- 15 40
VDD=200V,ID=5.5A,
tr Rise Time -- 18 50
ns RG=12Ω
td(off) Turn-Off Delay Time -- 62 140
See Fig 13 (4) (5)
tf Fall Time -- 22 60
Qg Total Gate Charge -- 32 42 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 4.6 -- nC ID=5.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 22 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=5.5A,VGS=0V
trr Reverse Recovery Time -- 259 -- ns TJ=25°C,IF=5.5A
Qrr Reverse Recovery Charge -- 1.81 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=5.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 5.5A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF730A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
101 10 V 101
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V 150 oC

100
100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
10-1 2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5

IDR , Reverse Drain Current [A]

101
2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5

1.0 100

VGS = 20 V

0.5 @ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 5 10 15 20 25 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
C iss Crss= Cgd 10
800
VGS , Gate-Source Voltage [V]

VDS = 200 V
Capacitance [pF]

600 VDS = 320 V

400 @ Notes : 5
C oss 1. VGS = 0 V
2. f = 1 MHz

200 C rss

@ Notes : ID = 5.5 A
00 1
0
10 10 0 5 10 15 20 25 30 35
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF730A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.75 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6.0
102 Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 4.5
101 100 µs
1 ms
10 ms
DC 3.0
100

@ Notes :
10-1 1.5
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.71 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
-1 0.05 3. TJ M -TC =PD M *Zθ J C (t)
10
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF730A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF730A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF740
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 10 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 10
ID A
Continuous Drain Current (TC=100°C) 6.3
IDM Drain Current-Pulsed (1) 40 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 457 mJ
IAR Avalanche Current (1) 10 A
EAR Repetitive Avalanche Energy (1) 13.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 134 W
PD
Linear Derating Factor 1.08 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.93
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF740 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.78 -- VDS=50V,ID=5A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 40 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=10A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF740
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF740 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102 is Limited by R DS(on) 10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
8
101 1 ms
10 ms
DC 6
100
4
@ Notes :
-1
10 1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2
@ Notes :
1. Zθ J C (t)=0.93 o C/W Max.
-1
10 0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
θ

t2
10- 2 - 5 -4 -3 -2 -1
10 10 10 10 10 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF740
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF740 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF740A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 10 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 10
ID A
Continuous Drain Current (TC=100°C) 6.3
IDM Drain Current-Pulsed (1) 40 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 457 mJ
IAR Avalanche Current (1) 10 A
EAR Repetitive Avalanche Energy (1) 13.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 134 W
PD
Linear Derating Factor 1.08 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.93
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF740A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.78 -- VDS=50V,ID=5A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 40 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=10A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF740A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF740A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102 is Limited by R DS(on) 10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
8
101 1 ms
10 ms
DC 6
100
4
@ Notes :
-1
10 1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2
@ Notes :
1. Zθ J C (t)=0.93 o C/W Max.
-1
10 0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
θ

t2
10- 2 - 5 -4 -3 -2 -1
10 10 10 10 10 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF740A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF740A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF750
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 15 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 15
ID A
Continuous Drain Current (TC=100°C) 9.5
IDM Drain Current-Pulsed (1) 60 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1157 mJ
IAR Avalanche Current (1) 15 A
EAR Repetitive Avalanche Energy (1) 15.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 156 W
PD
Linear Derating Factor 1.25 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.8
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF750 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=7.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.1 -- VDS=50V,ID=7.5A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 15 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 60 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=15A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=9mH, IAS=15A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF750
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF750 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20

Operation in This Area

is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

15
10 µs
100 µs
1 ms
101
10 ms 10
DC

100 @ Notes : 5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.8 o C/W Max.
10- 1
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF750
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF750 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF750A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 15 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-220
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 15
ID A
Continuous Drain Current (TC=100°C) 9.5
IDM Drain Current-Pulsed (1) 60 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1157 mJ
IAR Avalanche Current (1) 15 A
EAR Repetitive Avalanche Energy (1) 15.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 156 W
PD
Linear Derating Factor 1.25 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.8
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF750A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=7.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.1 -- VDS=50V,ID=7.5A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 15 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 60 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=15A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=9mH, IAS=15A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF750A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF750A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20

Operation in This Area

is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

15
10 µs
100 µs
1 ms
101
10 ms 10
DC

100 @ Notes : 5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.8 o C/W Max.
10- 1
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF750A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF750A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF820
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 2.000Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.5
ID A
Continuous Drain Current (TC=100°C) 1.6
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 208 mJ
IAR Avalanche Current (1) 2.5 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF820 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.06 -- VDS=50V,ID=1.25A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.5A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=60mH, IAS=2.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF820
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF820 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0

0
10 ms
10 DC 1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF820
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF820 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF820A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 2.000Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.5
ID A
Continuous Drain Current (TC=100°C) 1.6
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 208 mJ
IAR Avalanche Current (1) 2.5 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 49 W
PD
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF820A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.06 -- VDS=50V,ID=1.25A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.5A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=60mH, IAS=2.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF820A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF820A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0

0
10 ms
10 DC 1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF820A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF820A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF820S
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 2.000Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.5
ID A
Continuous Drain Current (TC=100°C) 1.6
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 208 mJ
IAR Avalanche Current (1) 2.5 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF820S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.06 -- VDS=50V,ID=1.25A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.5A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=60mH, IAS=2.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF820S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF820S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0

0
10 ms
10 DC 1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF820S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF820S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF830
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 1.169Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 338 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.58 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.71
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRF830 POWER MOSFET

Electrical Characteristics(TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
gfs Forward Transconductance -- 3.87 -- Ω VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF830
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF830 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
101 100 µs
1 ms
10 ms 3
0 DC
10
2

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.71 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF830
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF830 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF830A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 1.169Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 338 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.58 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.71
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF830A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.87 -- VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF830A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF830A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
101 100 µs
1 ms
10 ms 3
0 DC
10
2

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.71 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF830A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF830A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF830S
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 1.169Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 338 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 80 W
Linear Derating Factor 0.64 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.57
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF830S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250 A
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250 A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V V DS =5V,ID =250 A
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.87 -- VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF830S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF830S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
10 µs 4
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs
1 ms
10 ms 3
DC
100
2

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5
@ Notes :
0.2 1. Zθ J C (t)=1.57 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF830S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF830S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF840
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 13.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 134 W
PD
Linear Derating Factor 1.08 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.93
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF840 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.8 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=18mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF840
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF840 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8

ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.93 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF840
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF840 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF840A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-220
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 13.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 134 W
PD
Linear Derating Factor 1.08 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.93
RθCS Case-to-Sink 0.5 -- °C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF840A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.8 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=18mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF840A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF840A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8

ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.93 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF840A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF840A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRF840S
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 0.638Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 14.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 142 W
Linear Derating Factor 1.14 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.88
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRF840S 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.8 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=18mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRF840S
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRF840S 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.88 o C/W Max.
10- 1 0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRF840S
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRF840S 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I510A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 5.6 A
Improved Gate Charge
Extended Safe Operating Area
Ο
D2-PAK I2-PAK
175 C Operating Temperature
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V 2

Lower RDS(ON) : 0.289 Ω (Typ.) 1

1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 5.6
ID Ο
A
Continuous Drain Current (TC=100 C) 4
IDM Drain Current-Pulsed O
1 20 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 63 mJ
IAR Avalanche Current O1 5.6 A
EAR Repetitive Avalanche Energy O1 3.3 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C) *Ο
3.8 W
PD Total Power Dissipation (TC=25 C) Ο
33 W
Linear Derating Factor 0.22 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο

Maximum Lead Temp. for Soldering C

TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 4.51
R θJA Junction-to-Ambient * -- 40 Ο
C/ /W
R θJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I510A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=2.8A O
4
On-State Resistance
gfs Forward Transconductance -- 3.49 -- Ω VDS=40V,ID=2.8A O
4

Ciss Input Capacitance -- 190 240

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 21 25
td(on) Turn-On Delay Time -- 10 30
VDD=50V,ID=5.6A,
tr Rise Time -- 14 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 28 70
See Fig 13 4 O
O 5
tf Fall Time -- 18 50
Qg Total Gate Charge -- 8.5 12 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 1.6 -- nC ID=5.6A
Qgd Gate-Drain(“Miller”) Charge -- 4.1 -- See Fig 6 & Fig 12 4 O
O 5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 20 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=5.6A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns Ο
TJ=25 C ,IF=5.6A
Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=3mH, I AS=5.6A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5.6A, di/dt <_ 250A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I510A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
101 10 V 101
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100 100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.8
IDR , Reverse Drain Current

101

0.6 VGS = 10 V
RDS(on) , [Ω ]

0.4
100

VGS = 20 V
0.2
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
350
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

280 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

210
C oss

140 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
70

@ Notes : ID = 5.6 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I510A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.8 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 6
[A]

[A]

Operation in This Area

is Limited by R DS(on)
5
ID , Drain Current

ID , Drain Current

100 µs
101 4
1 ms
10 ms
3
DC

100 2
@ Notes :
1. TC = 25 oC
1
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

@ Notes :
100 0.2 1. Zθ J C (t)=4.51 o
C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)

0.05
ZθJC(t) ,

PDM
0.02
0.01 t1
10- 1 single pulse
t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I510A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I510A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I520A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.2 Ω
Lower Input Capacitance ID = 9.2 A
Improved Gate Charge
Extended Safe Operating Area
Ο
D2-PAK I2-PAK
175 C Operating Temperature
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V 2

Lower RDS(ON) : 0.155 Ω (Typ.) 1

1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 9.2
ID Ο
A
Continuous Drain Current (TC=100 C) 6.5
IDM Drain Current-Pulsed O
1 37 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 113 mJ
IAR Avalanche Current O
1 9.2 A
EAR Repetitive Avalanche Energy O
1 4.5 mJ
dv/dt Peak Diode Recovery dv/dt O
3 6.5 V/ns
Total Power Dissipation (TA=25 C ) *
Ο
3.8 W
PD Total Power Dissipation (TC=25 C ) Ο
45 W
Linear Derating Factor 0.3 W/ CΟ

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.31
R θ JA Junction-to-Ambient * -- 40 Ο
C /W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I520A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.2 Ω VGS=10V,ID=4.6A O
4
On-State Resistance
gfs Forward Transconductance -- 6.35 -- Ω VDS=40V,ID=4.6A O
4

Ciss Input Capacitance -- 370 480

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 14 40
VDD=50V,ID=9.2A,
tr Rise Time -- 14 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 36 90
tf --
See Fig 13 O
4 O
5
Fall Time 28 70
Qg Total Gate Charge -- 16 22 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=9.2A
Qgd Gate-Drain(“Miller”) Charge -- 7.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 37 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=9.2A,VGS=0V
trr Reverse Recovery Time -- 98 -- ns Ο
TJ=25 C ,IF=9.2A
Qrr Reverse Recovery Charge -- 0.34 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, IAS=9.2A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 9.2A, di/dt <_ 300A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I520A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100
100 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

101
0.3 VGS = 10 V
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

400 VDS = 80 V
Capacitance

C oss

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 9.2 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I520A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.6 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
8
ID , Drain Current

ID , Drain Current

100 µs

101 1 ms 6
10 ms
DC
4

100
@ Notes :
1. TC = 25 oC 2
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100
@ Notes :
0.2
1. Zθ J C (t)=3.31 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
10- 1
0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I520A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I520A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I530A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.11 Ω
Lower Input Capacitance ID = 14 A
Improved Gate Charge
Extended Safe Operating Area
D2-PAK I2-PAK
175 C Operating Temperature
Ο

Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V 2

Lower RDS(ON) : 0.092 Ω(Typ.) 1

1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 14
ID Ο
A
Continuous Drain Current (TC=100 C) 9.9
IDM Drain Current-Pulsed O
1 56 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 261 mJ
IAR Avalanche Current O1 14 A
EAR Repetitive Avalanche Energy O1 5.5 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C) *Ο
3.8 W
PD Total Power Dissipation (TC=25 C ) Ο
55 W
Linear Derating Factor 0.36 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 2.74
R θJA Junction-to-Ambient * -- 40 Ο
C /W
R θJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I530A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.11 Ω VGS=10V,ID=7A O
4
On-State Resistance
gfs Forward Transconductance -- 10.25 -- Ω VDS=40V,ID=7A O
4

Ciss Input Capacitance -- 610 790

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 62 72
td(on) Turn-On Delay Time -- 13 40
VDD=50V,ID=14A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 55 110
tf --
See Fig 13 O
4 O
5
Fall Time 36 80
Qg Total Gate Charge -- 27 36 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 4.5 -- nC ID=14A
Qgd Gate-Drain(“Miller”) Charge -- 12.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 56 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=14A,VGS=0V
trr Reverse Recovery Time -- 109 -- ns Ο
TJ=25 C ,IF=14A
Qrr Reverse Recovery Charge -- 0.41 -- µC diF/dt=100A/ µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=14A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 14A, di/dt <_ 350A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I530A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
101 5.0 V
Bottom : 4.5 V
175 oC

100
25 oC
@ Notes :
1. VGS = 0 V
0 @ Notes :
10 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
IDR , Reverse Drain Current

VGS = 10 V
0.15
101
RDS(on) , [Ω]

0.10

100
VGS = 20 V
0.05
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 15 30 45 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V
750
VDS = 80 V
Capacitance

C oss
500
5
@ Notes :
1. VGS = 0 V
C rss
250 2. f = 1 MHz

@ Notes : ID = 14.0 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I530A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
12
ID , Drain Current

ID , Drain Current

10 µs
100 µs
1 ms 9
101
10 ms
DC
6

0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
@ Notes :
0.2 o C/W
1. Z J C (t)=2.74 Max.
θ
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

10- 1 0.02 PDM

0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I530A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I530A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I540A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.052 Ω
Lower Input Capacitance ID = 28 A
Improved Gate Charge
Extended Safe Operating Area
Ο
D2-PAK I2-PAK
175 C Operating Temperature
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V 2

Lower RDS(ON) : 0.041 Ω (Typ.) 1

1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 28
ID Ο
A
Continuous Drain Current (TC=100 C) 19.8
IDM Drain Current-Pulsed O
1 110 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 523 mJ
IAR Avalanche Current O1 28 A
EAR Repetitive Avalanche Energy O1 10.7 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C) *Ο
3.8 W
PD Total Power Dissipation (TC=25 C ) Ο
107 W
Linear Derating Factor 0.71 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.4
R θJA Junction-to-Ambient * -- 40 Ο
C /W
R θJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I540A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.052 Ω VGS=10V,ID=14A O
4
On-State Resistance
gfs Forward Transconductance -- 22.56 -- Ω VDS=40V,ID=14A O
4

Ciss Input Capacitance -- 1320 1710

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 325 380 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 148 170
td(on) Turn-On Delay Time -- 18 50
VDD=50V,ID=28A,
tr Rise Time -- 18 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 90 180
tf --
See Fig 13 O
4 O
5
Fall Time 56 120
Qg Total Gate Charge -- 60 78 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 10.8 -- nC ID=28A
Qgd Gate-Drain(“Miller”) Charge -- 27.9 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 28 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 110 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C,IS=28A,VGS=0V
trr Reverse Recovery Time -- 132 -- ns Ο
TJ=25 C,IF=28A
Qrr Reverse Recovery Charge -- 0.63 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=28A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 28A, di/dt <_ 400A/ µs, V DD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I540A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V 175 oC
5.0 V
Bottom : 4.5 V
101
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
1. 250 µs Pulse Test
3. 250 µs Pulse Test
100 2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.08
102
IDR , Reverse Drain Current

0.06 VGS = 10 V
RDS(on) , [Ω]

0.04 101

VGS = 20 V
0.02
@ Notes :
175 oC
1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 100
0 30 60 90 120 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

2000 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

1500
C oss

1000 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
500

@ Notes : ID =28.0 A
00 0
10 101 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I540A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 14.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 30
[A]

[A]

Operation in This Area

is Limited by R DS(on)
25
ID , Drain Current

ID , Drain Current

102 10 µs
100 µs 20
1 ms
10 ms
101 15
DC

10
@ Notes :
100
1. TC = 25 oC
5
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.4 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.05

PDM
Z JC(t) ,

0.02
0.01 single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I540A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS140A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I550A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.04 Ω
Lower Input Capacitance ID = 40 A
Improved Gate Charge
Extended Safe Operating Area
Ο
D2-PAK I2-PAK
175 C Operating Temperature
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V 2

Lower RDS(ON) : 0.032 Ω (Typ.) 1

1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 40
ID Ο
A
Continuous Drain Current (TC=100 C) 28.3
IDM Drain Current-Pulsed O
1 160 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 640 mJ
IAR Avalanche Current O1 40 A
EAR Repetitive Avalanche Energy O1 16.7 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C) *Ο
3.8 W
PD Total Power Dissipation (TC=25 C ) Ο
167 W
Linear Derating Factor 1.11 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 0.9
R θJA Junction-to-Ambient * -- 40 Ο
C /W
R θJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I550A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=20A O
4
On-State Resistance
gfs Forward Transconductance -- 27.44 -- Ω VDS=40V,ID=20A O
4

Ciss Input Capacitance -- 1750 2270

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 420 485 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 185 215
td(on) Turn-On Delay Time -- 17 50
VDD=50V,ID=40A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 80 160
tf -- 100
See Fig 13 O
4 O
5
Fall Time 45
Qg Total Gate Charge -- 75 97 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 13.2 -- nC ID=40A
Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 40 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 160 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.6 V Ο
TJ=25 C ,IS=40A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns Ο
TJ=25 C ,IF=40A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=0.6mH, I AS=40A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I550A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
102 Top : 15V 102
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V 175 oC
Bottom : 4.5 V
1
10
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
100 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.06
IDR , Reverse Drain Current

102
0.05
VGS = 10 V
RDS(on) , [Ω]

0.04

0.03
101
VGS = 20 V
0.02

@ Notes :
0.01 175 oC
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 175 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

2000 VDS = 80 V
Capacitance

C oss

5
@ Notes :
1000 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID =40.0 A
00 0
10 101 0 10 20 30 40 50 60 70 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I550A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 20.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 50
[A]

[A]

Operation in This Area

is Limited by R DS(on)

10 µs 40
ID , Drain Current

ID , Drain Current

102
100 µs
1 ms
30
10 ms
101 DC

20

@ Notes :
100
1. TC = 25 oC 10
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.9 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
0.01 t1
single pulse
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I550A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I550A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I610A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 1.5 Ω
Lower Input Capacitance ID = 3.3 A
Improved Gate Charge
Extended Safe Operating Area
D2-PAK I2-PAK
Lower Leakage Current : 10µA (Max.) @ VDS = 200V
Low RDS(ON) : 1.169 Ω (Typ.) 2

1
1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 3.3
ID o A
Continuous Drain Current (TC=100 C ) 2.1
IDM Drain Current-Pulsed O
1 10 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 44 mJ
IAR Avalanche Current O1 3.3 A
EAR Repetitive Avalanche Energy O1 3.8 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 3.1 W
PD Total Power Dissipation (TC=25oC ) 38 W
o
Linear Derating Factor 0.31 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.28
o
RθJA Junction-to-Ambient * -- 40 C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I610A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250 µA
∆B V/ ∆TJ Breakdown Voltage Temp. Coeff. V/ C ID=250 µ A
o
-- 0.23 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.65A O
4
On-State Resistance
gfs Forward Transconductance -- 1.31 -- Ω VDS=40V,ID=1.65A O
4

Ciss Input Capacitance -- 160 210

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 44 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=3.3A,
tr Rise Time -- 10 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 20 50
See Fig 13 4 O
tf Fall Time -- 12 35 O 5

Qg Total Gate Charge -- 7 10 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 1.5 -- nC ID=3.3A
4 O
O 5
Qgd Gate-Drain( “ Miller “ ) Charge -- 3.5 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 10 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC ,IS=3.3A,VGS=0V
trr Reverse Recovery Time -- 107 -- ns TJ=25oC ,IF=3.3A
Qrr Reverse Recovery Charge -- 0.33 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=6mH, I AS=3.3A, V DD=50V, R G=27 Ω , Starting T J =25 C
o
O2

O3 ISD <_ 3.3A, di/dt <_ 140A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µ s, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I610A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
101 101
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
100 Bottom : 4.5 V
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : - 55 oC 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4 101
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V
3
RDS(on) , [Ω]

2 100

1
150 oC @ Notes :
VGS = 20 V
1. VGS = 0 V
25 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC

0 10-1
0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 100 V

C iss VDS = 160 V

200
Capacitance

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 3.3 A
00 0
10 101 0 2 4 6 8
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I610A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

101 3
100 µs
1 ms
10 ms
100 DC 2

@ Notes :
10-1 1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.28 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01
single pulse PDM

t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I610A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I610A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I614A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0 Ω
♦ Lower Input Capacitance ID = 2.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 1.393Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.8
ID A
Continuous Drain Current (TC=100°C) 1.8
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 49 mJ
IAR Avalanche Current (1) 2.8 A
EAR Repetitive Avalanche Energy (1) 4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 40 W
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.14
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I614A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.59 -- VDS=40V,ID=1.4A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.8A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=2.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I614A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I614A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0
10 ms
100 DC
1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.14 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
0.01 PDM
Z JC(t) ,

single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I614A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I614A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I620A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 5 A
Improved Gate Charge
Extended Safe Operating Area
D2-PAK I2-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 0.626 Ω (Typ.) 2

1
1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 5
ID o A
Continuous Drain Current (TC=100 C ) 3.2
IDM Drain Current-Pulsed O
1 18 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 67 mJ
IAR Avalanche Current O1 5 A
EAR Repetitive Avalanche Energy O1 4.7 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 3.1 W
PD Total Power Dissipation (TC=25oC ) 47 W
o
Linear Derating Factor 0.38 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.65
o
RθJA Junction-to-Ambient * -- 40 C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I620A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆ TJ V/ C ID=250µ A
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=2.5A O
4
On-State Resistance
gfs Forward Transconductance -- 2.41 -- Ω VDS=40V,ID=2.5A O
4

Ciss Input Capacitance -- 275 360

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 25 30
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=5A,
tr Rise Time -- 11 30
ns RG=18Ω
td(off) Turn-Off Delay Time -- 26 60
See Fig 13 4 O
tf Fall Time -- 15 40 O 5

Qg Total Gate Charge -- 12 17 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 2.4 -- nC ID=5A
4 O
O 5
Qgd Gate-Drain( “ Miller “ ) Charge -- 6.2 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 18 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC ,IS=5A,VGS=0V
trr Reverse Recovery Time -- 122 -- ns TJ=25oC,IF=5A
Qrr Reverse Recovery Charge -- 0.51 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximumo Junction Temperature
1
O2 L=4mH, I AS=5A, VDD=50V, R G=27 Ω, Starting T J =25 C
O3 ISD <_ 5A, di/dt <_180A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µ s, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I620A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15V
101
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
10-1 - 55 oC
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

101

1.5 VGS = 10 V
RDS(on) , [Ω]

1.0
100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.0 10-1
0 3 6 9 12 15 18 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

400 Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
C iss
VDS = 160 V
Capacitance

300

200 C oss 5
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
100

@ Notes : ID = 5.0 A
00 0
10 101 0 3 6 9 12
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I620A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
5
ID , Drain Current

ID , Drain Current

101 100 µs
4
1 ms
10 ms
DC 3
100

2
@ Notes :
-1
10 1. TC = 25 oC
2. TJ = 150 oC 1
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
o
1. Zθ J C (t)=2.65
C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 IRFW/I620A

N-CHANNEL
POWER MOSFET

Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I620A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I624A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.1Ω
♦ Lower Input Capacitance ID = 4.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Low RDS(ON): 0.742Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 4.1
ID A
Continuous Drain Current (TC=100°C) 2.6
IDM Drain Current-Pulsed (1) 16 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 84 mJ
IAR Avalanche Current (1) 4.1 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.54
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I624A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.30 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.1 Ω VGS=10V,ID=2.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.69 -- VDS=40V,ID=2.05A (4)
Ciss Input Capacitance -- 335 430
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 23 28
td(on) Turn-On Delay Time -- 11 30
VDD=125V,ID=4.1A,
tr Rise Time -- 12 35
ns RG=18Ω
td(off) Turn-Off Delay Time -- 32 75
See Fig 13 (4) (5)
tf Fall Time -- 15 40
Qg Total Gate Charge -- 14 20 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 2.8 -- nC ID=4.1A
Qgd Gate-Drain ( Miller ) Charge -- 6.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 16 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=4.1A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns TJ=25°C,IF=4.1A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=4.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.1A, di/dt ≤ 170A/µs, VDD ≤ BVDSS , Starting TJ =25 °C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I624A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15 V 101
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
-1
10 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5
1
10

IDR , Reverse Drain Current [A]

2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5 100

1.0
VGS = 20 V 10-1

0.5 @ Notes :
1. VGS = 0 V
@ Note : TJ = 25 C o 150 oC 2. 250 µs Pulse Test
25 oC
0.0 10-2
0 2 4 6 8 10 12 14 16 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
C iss Crss= Cgd 10
400
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

300 VDS = 200 V

200 C oss @ Notes : 5

1. VGS = 0 V
2. f = 1 MHz
100 C rss

@ Notes : ID = 4.1 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I624A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs
1 ms
10 ms 3
DC
100
2

@ Notes :
10-1
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.54 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I624A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I624A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I630A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 9 A
Improved Gate Charge
Extended Safe Operating Area
D2-PAK I2-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 0.333 Ω (Typ.) 2

1
1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 9
ID o A
Continuous Drain Current (TC=100 C ) 5.7
IDM Drain Current-Pulsed O
1 36 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 162 mJ
IAR Avalanche Current O1 9 A
EAR Repetitive Avalanche Energy O1 7.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 3.1 W
PD Total Power Dissipation (TC=25oC ) 72 W
Linear Derating Factor o
0.57 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.74
o
RθJA Junction-to-Ambient * -- 40 C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I630A POWER MOSFET

Electrical Characteristics (TC=25 oCunless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.21 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=4.5A O
4
On-State Resistance
gfs Forward Transconductance -- 3.87 -- Ω VDS=40V,ID=4.5A O
4

Ciss Input Capacitance -- 500 650

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 45 55
td(on) Turn-On Delay Time -- 13 40
VDD=100V,ID=9A,
tr Rise Time -- 13 40
ns RG=12 Ω
td(off) Turn-Off Delay Time -- 30 70
See Fig 13 4 O
tf Fall Time -- 18 50 O 5

Qg Total Gate Charge -- 22 29 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 4.3 -- nC ID=9A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 10.9 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 36 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC ,IS=9A,VGS=0V
trr Reverse Recovery Time -- 137 -- ns TJ=25oC ,IF=9A
Qrr Reverse Recovery Charge -- 0.68 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximumo Junction Temperature
1
O2 L=3mH, I AS=9A, VDD=50V, R G=27 Ω, Starting T J =25 C
O3 ISD <_ 9A, di/dt <_220A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I630A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
101 101
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V 101
0.75
RDS(on) , [Ω]

0.50

100

0.25 @ Notes :
VGS = 20 V
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 5 10 15 20 25 30 35 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
800
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

C iss Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
600
VDS = 160 V
Capacitance

400
C oss
5
@ Notes :
1. VGS = 0 V
200 C rss 2. f = 1 MHz

@ Notes : ID = 9.0 A
00 0
10 101 0 5 10 15 20 25
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I630A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
8
ID , Drain Current

ID , Drain Current

100 µs
101 1 ms
10 ms 6

DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

@ Notes :
0.2 o C/W
1. Z J C (t)=1.74 Max.
θ
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I630A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I630A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I634A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 8.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.327Ω(Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 8.1
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 205 mJ
IAR Avalanche Current (1) 8.1 A
EAR Repetitive Avalanche Energy (1) 7.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 74 W
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.69
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I634A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=4.05A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.1 -- VDS=40V,ID=4.05A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.1A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=5mH, IAS=8.1A, VDD=50V, RG=27Ω Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I634A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I634A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101
1 ms
6
10 ms
DC
100
4

@ Notes :
10-1 1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.69 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10 -1 0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I634A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I634A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFW/I640A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.18 Ω
Lower Input Capacitance ID = 18 A
Improved Gate Charge
Extended Safe Operating Area
D2-PAK I2-PAK
Lower Leakage Current : 10 µ A (Max.) @ VDS = 200V
Lower RDS(ON) : 0.144 Ω (Typ.) 2

1
1
2
3
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 18
ID o A
Continuous Drain Current (TC=100 C) 11.4
IDM Drain Current-Pulsed O
1 7.2 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 216 mJ
IAR Avalanche Current O1 18 A
EAR Repetitive Avalanche Energy O1 13.9 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 3.1 W
PD Total Power Dissipation (TC=25oC) 139 W
Linear Derating Factor o
1.11 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.9
o
RθJA Junction-to-Ambient * -- 40 C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFW/I640A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆TJ V/ C ID=250 µ A
o
Breakdown Voltage Temp. Coeff. -- 0.26 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.18 Ω VGS=10V,ID=9A O
4
On-State Resistance
gfs Forward Transconductance -- 9.61 -- Ω VDS=40V,ID=9A O
4

Ciss Input Capacitance -- 1160 1500

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 250 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 94 110
td(on) Turn-On Delay Time -- 17 40
VDD=100V,ID=18A,
tr Rise Time -- 16 40
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 48 110
See Fig 13 4 O
tf Fall Time -- 24 60 O 5

Qg Total Gate Charge -- 44 58 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 10.4 -- nC ID=18A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 27.1 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 18 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 72 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC ,IS=18A,VGS=0V
trr Reverse Recovery Time -- 195 -- ns TJ=25oC ,IF=18A
Qrr Reverse Recovery Charge -- 1.35 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=18A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 18A, di/dt <_ 260A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250µ s, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFW/I640A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
101 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
@ Notes :
25 oC
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

VGS = 10 V
0.3
101
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 20 40 60 80 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss VDS = 100 V

1500
VDS = 160 V
Capacitance

1000

C oss 5
@ Notes :
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 18.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFW/I640A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 9.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
[A]

[A]

Operation in This Area

is Limited by R DS(on)
102
ID , Drain Current

ID , Drain Current

15
100 µs
1 ms
101 10 ms
10
DC

100 @ Notes :
5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5

0.2 @ Notes :
o
-1
1. Zθ J C (t)=0.9 C/W Max.
10 0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Z (t)
θJC
Z JC(t) ,

0.02
PDM
0.01
single pulse t1
10- 2
θ

t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFW/I640A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFW/I640A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I644A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 14 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.214Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 14
ID A
Continuous Drain Current (TC=100°C) 8.9
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 490 mJ
IAR Avalanche Current (1) 14 A
EAR Repetitive Avalanche Energy (1) 13.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 139 W
Linear Derating Factor 1.11 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.9
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I644A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=7A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.65 -- VDS=40V,ID=7A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=14A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=4mH, IAS=14A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I644A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I644A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
102 is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms
9
101 10 ms
DC
6
0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5
@ Notes :
0.2 1. Zθ J C (t)=0.9 o C/W Max.
2. Duty Factor, D=t1 /t2
10- 1 0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I644A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I644A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I710A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.6Ω
♦ Lower Input Capacitance ID = 2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Low RDS(ON): 2.815Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 2
ID A
Continuous Drain Current (TC=100°C) 1.3
IDM Drain Current-Pulsed (1) 6 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 114 mJ
IAR Avalanche Current (1) 2 A
EAR Repetitive Avalanche Energy (1) 3.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 36 W
Linear Derating Factor 0.29 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.44
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I710A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.53 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.6 Ω VGS=10V,ID=1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.29 -- VDS=50V,ID=1A (4)
Ciss Input Capacitance -- 215 280
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 42 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 13 17
td(on) Turn-On Delay Time -- 11 30
VDD=200V,ID=2A,
tr Rise Time -- 15 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 38 90
See Fig 13 (4) (5)
tf Fall Time -- 13 35
Qg Total Gate Charge -- 10 14 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 6 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2A,VGS=0V
trr Reverse Recovery Time -- 224 -- ns TJ=25°C,IF=2A
Qrr Reverse Recovery Charge -- 0.87 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2A, di/dt ≤ 80A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I710A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

100

ID , Drain Current [A]

6.0 V 100
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

10-1 10-1
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-2 -2
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

6 VGS = 10 V
100
RDS(on) , [ Ω ]

VGS = 20 V 10-1

2
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0 10-2
0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
400
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

300
Capacitance [pF]

C iss VDS = 320 V

200
5
@ Notes :
C oss 1. VGS = 0 V
100 2. f = 1 MHz
C rss
@ Notes : ID = 2.0 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I710A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101
2.0
ID , Drain Current [A]

100 µs
ID , Drain Current [A]
1 ms
10 ms 1.5
100
DC

1.0

-1 @ Notes :
10
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
0
10
0.2 @ Notes :
1. Zθ J C (t)=3.44 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1
0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I710A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I710A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I720A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.8Ω
♦ Lower Input Capacitance ID = 3.3 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 1.408Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 3.3
ID A
Continuous Drain Current (TC=100°C) 2.1
IDM Drain Current-Pulsed (1) 13 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 249 mJ
IAR Avalanche Current (1) 3.3 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I720A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.54 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.8 Ω VGS=10V,ID=1.65A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.25 -- VDS=50V,ID=1.65A (4)
Ciss Input Capacitance -- 385 500
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 60 70 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 27 33
td(on) Turn-On Delay Time -- 12 35
VDD=200V,ID=3.3A,
tr Rise Time -- 17 45
ns RG=18Ω
td(off) Turn-Off Delay Time -- 51 110
See Fig 13 (4) (5)
tf Fall Time -- 18 45
Qg Total Gate Charge -- 19 26 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=3.3A
Qgd Gate-Drain ( Miller ) Charge -- 11.1 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 13 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.3A,VGS=0V
trr Reverse Recovery Time -- 230 -- ns TJ=25°C,IF=3.3A
Qrr Reverse Recovery Charge -- 1.16 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=40mH, IAS=3.3A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 3.3A, di/dt ≤ 110A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I720A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1
10 VGS 101
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
150 oC
100 Bottom : 4.5 V

100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
5
1
10

IDR , Reverse Drain Current [A]

4
Drain-Source On-Resistance
RDS(on) , [ Ω ]

VGS = 10 V
3

100
2

VGS = 20 V
1 150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0 10-1
0 3 6 9 12 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
C iss
VDS = 200 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400 VDS = 320 V

5
C oss
200 @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 3.3 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I720A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
0 2
10 DC

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I720A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I720A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I730A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.0Ω
♦ Lower Input Capacitance ID = 5.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 0.765Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 5.5
ID A
Continuous Drain Current (TC=100°C) 3.5
IDM Drain Current-Pulsed (1) 22 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 346 mJ
IAR Avalanche Current (1) 5.5 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 73 W
Linear Derating Factor 0.58 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.71
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I730A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.52 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.0 Ω VGS=10V,ID=2.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 4.03 -- VDS=50V,ID=2.75A (4)
Ciss Input Capacitance -- 675 880
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 43 52
td(on) Turn-On Delay Time -- 15 40
VDD=200V,ID=5.5A,
tr Rise Time -- 18 50
ns RG=12Ω
td(off) Turn-Off Delay Time -- 62 140
See Fig 13 (4) (5)
tf Fall Time -- 22 60
Qg Total Gate Charge -- 32 42 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 4.6 -- nC ID=5.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 5.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 22 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=5.5A,VGS=0V
trr Reverse Recovery Time -- 259 -- ns TJ=25°C,IF=5.5A
Qrr Reverse Recovery Charge -- 1.81 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=5.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 5.5A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I730A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
101 10 V 101
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V 150 oC

100
100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
-1
10 2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5

IDR , Reverse Drain Current [A]

101
2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5

1.0 100

VGS = 20 V

0.5 @ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0.0 10-1
0 5 10 15 20 25 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
C iss Crss= Cgd 10
800
VGS , Gate-Source Voltage [V]

VDS = 200 V
Capacitance [pF]

600 VDS = 320 V

400 @ Notes : 5
C oss 1. VGS = 0 V
2. f = 1 MHz

200 C rss

@ Notes : ID = 5.5 A
00 0
10 101 0 5 10 15 20 25 30 35
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I730A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.75 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
6.0
2
10 Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 4.5
101 100 µs
1 ms
10 ms
DC 3.0
100

@ Notes :
10-1 1.5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.71 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
-1 0.05 3. TJ M -TC =PD M *Zθ J C (t)
10
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I730A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I730A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I740A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 10 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 0.437Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 10
ID A
Continuous Drain Current (TC=100°C) 6.3
IDM Drain Current-Pulsed (1) 40 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 457 mJ
IAR Avalanche Current (1) 10 A
EAR Repetitive Avalanche Energy (1) 13.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 134 W
Linear Derating Factor 1.08 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.93
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I740A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.78 -- VDS=50V,ID=5A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 40 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=10A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I740A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I740A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102 is Limited by R DS(on) 10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
8
101 1 ms
10 ms
DC 6
100
4
@ Notes :
-1
10 1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2
@ Notes :
1. Zθ J C (t)=0.93 o C/W Max.
-1
10 0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
θ

t2
10- 2 - 5 -4 -3 -2 -1
10 10 10 10 10 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I740A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I740A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I820A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 2.000Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.5
ID A
Continuous Drain Current (TC=100°C) 1.6
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 208 mJ
IAR Avalanche Current (1) 2.5 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.57
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I820A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.06 -- VDS=50V,ID=1.25A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.5A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=60mH, IAS=2.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I820A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I820A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
3.0
Operation in This Area
is Limited by R DS(on)
101 2.5
ID , Drain Current [A]

ID , Drain Current [A]

100 µs
1 ms 2.0

0
10 ms
10 DC 1.5

1.0
10-1 @ Notes :
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.57 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I820A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I820A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I830A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 1.169Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 338 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 80 W
Linear Derating Factor 0.64 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.57
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I830A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250 A
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250 A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V V DS =5V,ID =250 A
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.87 -- VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I830A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I830A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
10 µs 4
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs
1 ms
10 ms 3
DC
100
2

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5
@ Notes :
0.2 1. Zθ J C (t)=1.57 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I830A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I830A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/I840A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 0.638Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 32 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 14.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 3.1 W
PD Total Power Dissipation (TC=25°C) 142 W
Linear Derating Factor 1.14 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.88
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/I840A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.8 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 32 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=18mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/I840A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/I840A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.88 o C/W Max.
10- 1 0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/I840A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/I840A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/IZ14A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 10 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ 175°C Operating Temperature
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V 2

♦ Lower RDS(ON): 0.097Ω (Typ.) 1

1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 10
ID A
Continuous Drain Current (TC=100°C) 7.1
IDM Drain Current-Pulsed (1) 40 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 86 mJ
IAR Avalanche Current (1) 10 A
EAR Repetitive Avalanche Energy (1) 3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 3.8 W
PD Total Power Dissipation (TC=25°C) 30 W
Linear Derating Factor 0.2 W/°C
Operating Junction and
TJ , TSTG - 55 to +175
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 4.96
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/IZ14A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.059 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=150°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.3 -- VDS=30V,ID=5A (4)
Ciss Input Capacitance -- 280 360
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 125 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 40 46
td(on) Turn-On Delay Time -- 11 25
VDD=30V,ID=10A,
tr Rise Time -- 17 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 27 60
See Fig 13 (4) (5)
tf Fall Time -- 28 60
Qg Total Gate Charge -- 12 17 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 2.4 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 40 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10A,VGS= 0V
trr Reverse Recovery Time -- 55 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 0.11 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=1mH, IAS=10A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 200A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/IZ14A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V 101

ID , Drain Current [A]

6.0 V
101 5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100
@ Notes :
25 oC 1. VGS = 0 V
@ Notes : 2. VDS = 30 V
100 1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.20

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

0.15 101
RDS(on) , [ Ω ]

0.10

VGS = 20 V 100

0.05
@ Notes :
o
175 oC 1. VGS = 0 V
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0.00 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] V , Source-Drain Voltage [V]
SD

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
VDS = 30 V
VGS , Gate-Source Voltage [V]

C iss
Capacitance [pF]

400 C oss VDS = 48 V

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 10.0 A
00 1
0
10 10 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/IZ14A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
1.1 2.0
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 5 A
0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
T , Junction Temperature [oC] T , Junction Temperature [oC]
J J

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102 is Limited by R DS(on)
10

ID , Drain Current [A]

ID , Drain Current [A]

100 µs
8
101 1 ms
10 ms
6
DC

4
100 @ Notes :
1. TC = 25 oC
2. TJ = 175 oC 2
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

@ Notes :
100 0.2 1. Zθ J C (t)=4.96 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM

-1
0.01 single pulse t1
10
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/IZ14A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/IZ14A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/IZ24A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.07Ω
♦ Lower Input Capacitance ID = 17 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ 175°C Operating Temperature
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V 2

♦ Lower RDS(ON): 0.050Ω (Typ.) 1

1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 17
ID A
Continuous Drain Current (TC=100°C) 12
IDM Drain Current-Pulsed (1) 68 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 149 mJ
IAR Avalanche Current (1) 17 A
EAR Repetitive Avalanche Energy (1) 4.4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 3.8 W
PD Total Power Dissipation (TC=25°C) 44 W
Linear Derating Factor 0.29 W/°C
Operating Junction and
TJ , TSTG - 55 to +175
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.43
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/IZ24A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.064 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=150°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.07 Ω VGS=10V,ID=8.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 10.8 -- VDS=30V,ID=8.5A (4)
Ciss Input Capacitance -- 600 780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 240 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 83 95
td(on) Turn-On Delay Time -- 13 30
VDD=30V,ID=17A,
tr Rise Time -- 19 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 46 100
See Fig 13 (4) (5)
tf Fall Time -- 48 100
Qg Total Gate Charge -- 24 32 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 4.3 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 10.8 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 17 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 68 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=17A,VGS=0V
trr Reverse Recovery Time -- 60 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 0.12 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.6mH, IAS=17A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/IZ24A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V
101
175 oC

100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
100 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.100

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.075 VGS = 10 V
101
RDS(on) , [ Ω ]

0.050

100
VGS = 20 V
0.025
@ Notes :
1. VGS = 0 V
175 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.000 10-1
0 20 40 60 80 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 30 V
Capacitance [pF]

800 C oss
VDS = 48 V

5
@ Notes :
400 C rss 1. VGS = 0 V
2. f = 1 MHz

@ Notes : ID = 17.0 A
00 1
0
10 10 0 5 10 15 20 25
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/IZ24A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
102 16
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 12
1
10 10 ms
DC
8

100 @ Notes :
1. TC = 25 oC 4
2. TJ = 175 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 @ Notes :
0.2 1. Zθ J C (t)=3.43 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
10- 1 t1
0.01 single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/IZ24A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/IZ24A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/IZ34A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.04Ω
♦ Lower Input Capacitance ID = 30 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ 175°C Operating Temperature
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V 2

♦ Lower RDS(ON): 0.030Ω (Typ.) 1

1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 30
ID A
Continuous Drain Current (TC=100°C) 21.2
IDM Drain Current-Pulsed (1) 120 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 463 mJ
IAR Avalanche Current (1) 30 A
EAR Repetitive Avalanche Energy (1) 7.7 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 3.8 W
PD Total Power Dissipation (TC=25°C) 77 W
Linear Derating Factor 0.52 W/°C
Operating Junction and
TJ , TSTG - 55 to +175
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.94
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/IZ34A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.057 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=150°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=15A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 21.3 -- VDS=30V,ID=15A (4)
Ciss Input Capacitance -- 1040 1350
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 355 410 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 140 165
td(on) Turn-On Delay Time -- 18 40
VDD=30V,ID=30A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 58 120
See Fig 13 (4) (5)
tf Fall Time -- 58 120
Qg Total Gate Charge -- 41 54 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 8.6 -- nC ID=30A
Qgd Gate-Drain ( Miller ) Charge -- 17.7 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 30 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 120 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.6 V TJ=25°C,IS=30A,VGS=0V
trr Reverse Recovery Time -- 75 -- ns TJ=25°C,IF=30A
Qrr Reverse Recovery Charge -- 0.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.6mH, IAS=30A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 30A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/IZ34A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
101
Bottom : 4.5 V

101 175 oC

100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test
3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
100 -1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.05
102

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.04 VGS = 10 V
RDS(on) , [ Ω ]

0.03 101

VGS = 20 V
0.02
@ Notes :
175 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.01 0
10
0 25 50 75 100 125 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
C iss
VDS = 30 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

C oss VDS = 48 V

1000
5
@ Notes :
C rss 1. VGS = 0 V
500 2. f = 1 MHz

@ Notes : ID = 30.0 A
00 1
0
10 10 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/IZ34A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID =15 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 40
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

102 30
100 µs
1 ms
10 ms
101 20
DC

@ Notes :
100 10
1. TC = 25 oC
o
2. TJ = 175 C
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.94 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
10- 1
0.02
Z JC(t) ,

PDM
0.01
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/IZ34A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/IZ34A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFW/IZ44A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.024Ω
♦ Lower Input Capacitance ID = 50 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D2-PAK I2-PAK
♦ 175°C Operating Temperature
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V 2

♦ Lower RDS(ON): 0.020Ω (Typ.) 1

1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 50
ID A
Continuous Drain Current (TC=100°C) 35.4
IDM Drain Current-Pulsed (1) 200 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 857 mJ
IAR Avalanche Current (1) 50 A
EAR Repetitive Avalanche Energy (1) 12.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 3.8 W
PD Total Power Dissipation (TC=25°C) 126 W
Linear Derating Factor 0.84 W/°C
Operating Junction and
TJ , TSTG - 55 to +175
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.19
RθJA Junction-to-Ambient * -- 40 °C/W
RθJA Junction-to-Ambient -- 62.5
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFW/IZ44A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.063 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=150°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.024 Ω VGS=10V,ID=25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 32.6 -- VDS=30V,ID=25A (4)
Ciss Input Capacitance -- 1770 2300
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 590 680 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 220 255
td(on) Turn-On Delay Time -- 20 40
VDD=30V,ID=50A,
tr Rise Time -- 16 40
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 68 140
See Fig 13 (4) (5)
tf Fall Time -- 70 140
Qg Total Gate Charge -- 64 83 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 12.3 -- nC ID=50A
Qgd Gate-Drain ( Miller ) Charge -- 23.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 50 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 200 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.8 V TJ=25°C,IS=50A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns TJ=25°C,IF=50A
Qrr Reverse Recovery Charge -- 0.24 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.4mH, IAS=50A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 50A, di/dt ≤ 350A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFW/IZ44A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V 102
102 10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
101
Bottom : 4.5 V

175 oC
101

100 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test
3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
100 -1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.04

102

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.03 VGS = 10 V
RDS(on) , [ Ω ]

0.02
101

0.01 VGS = 20 V
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 0
10
0 40 80 120 160 200 240 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8 3.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd 10 VDS = 12 V
2800
C iss
VGS , Gate-Source Voltage [V]

VDS = 30 V
Capacitance [pF]

C oss VDS = 48 V
2100

1400 5
@ Notes :
1. VGS = 0 V
C rss
2. f = 1 MHz
700

@ Notes : ID = 50.0 A
00 1
0
10 10 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFW/IZ44A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID =25 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
60
103 Operation in This Area
is Limited by R DS(on)
50
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
2
10 100 µs 40
1 ms
10 ms
30
101 DC

20
@ Notes :
100 1. TC = 25 oC
2. TJ = 175 oC 10
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5
@ Notes :
0.2 1. Zθ J C (t)=1.19 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.05
Z JC(t) ,

PDM
0.02
0.01 t1
single pulse
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFW/IZ44A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFW/IZ44A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFM014A
FEATURES
BVDSS = 60 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.14 Ω
Lower Input Capacitance ID = 2.8 A
Improved Gate Charge
Extended Safe Operating Area
SOT-223
Lower Leakage Current : 10 µA (Max.) @ VDS = 60V
Lower RDS(ON) : 0.097 Ω (Typ.) 2

1
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TA=25 oC ) 2.8
ID A
Continuous Drain Current (TA=70 oC ) 2.25
IDM Drain Current-Pulsed O
1 22 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O 2 67 mJ
IAR Avalanche Current O1 2.8 A
EAR Repetitive Avalanche Energy O1 0.21 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.5 V/ns
Total Power Dissipation (TA=25oC ) * 2.1 W
PD
Linear Derating Factor * 0.017 W/ oC
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJA o
Junction-to-Ambient * -- 60 C /W

* When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFM014A POWER MOSFET

Electrical Characteristics (TA=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250 µ A
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.060 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TA=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=1.4A O
4
On-State Resistance
gfs Forward Transconductance -- 3.85 -- Ω VDS=30V,ID=1.4A O
4
Ciss Input Capacitance -- 280 360
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 125 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 40 46
td(on) Turn-On Delay Time -- 11 25
VDD=30V,ID=10A,
tr Rise Time -- 17 40
ns RG=24 Ω
td(off) Turn-Off Delay Time -- 27 60
See Fig 13 O
4 O
5
tf Fall Time -- 28 60
Qg Total Gate Charge -- 12 17 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 2.4 -- nC ID=10A
Qgd Gate-Drain( “ Miller “ ) Charge -- 5.4 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 22 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25 oC,IS=2.8A,VGS= 0V
trr Reverse Recovery Time -- 55 -- ns TJ=25oC,IF=10A
Qrr Reverse Recovery Charge -- 0.11 -- µC diF/dt=100A/ µ s O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
O L=10mH, I =2.8A, V =25V, R =27 Ω , Starting T =25 C
2
AS DD G J
o

O3 I <_10A, di/dt <_200A/ µs, V <_ BV , Starting T =25 C

SD DD DSS J
o

O _ 2%
4 Pulse Test : Pulse Width = 250 µ s, Duty Cycle <

O5 Essentially Independent of Operating Temperature

 N-CHANNEL
POWER MOSFET IRFM014A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
ID , Drain Current

ID , Drain Current
1 6.0 V
10 5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
2. VDS = 30 V
@ Notes :
100 3. 250 µs Pulse Test
1. 250 µs Pulse Test
- 55 oC
2. TA = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
IDR , Reverse Drain Current

VGS = 10 V
0.15 101
RDS(on) , [Ω ]

0.10

100
VGS = 20 V

0.05
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 12 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 30 V
C iss
400
C oss VDS = 48 V
Capacitance

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 10.0 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFM014A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 5 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature
3
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

101 100 µs
2
1 ms
10 ms
100 ms
100
DC

1
@ Notes :
-1
10 1. TA = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0
10-1 100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] TA , Ambient Temperature [ oC]

Fig 11. Thermal Response

102
Thermal Response

D=0.5

0.2
101
0.1 @ Notes :
1. Zθ J A (t)=60 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Zθ J A (t)
0.02
100
ZθJA(t) ,

0.01
PDM

t1
single pulse t2

10- 1
10- 5 10- 4 10- 3 10- 2 10- 1 100 101 102 103
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFM014A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFM014A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFM110A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 1.5 A
Improved Gate Charge
Extended Safe Operating Area
SOT-223
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.289 Ω (Typ.) 2

1
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TA=25 C ) 1.5
ID A
Continuous Drain Current (TA=70 C )Ο
1.19
IDM Drain Current-Pulsed O
1 12 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 60 mJ
IAR Avalanche Current O1 1.5 A
EAR Repetitive Avalanche Energy O1 0.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C ) *
Ο

PD 2 W
Linear Derating Factor * 0.016 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +150
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJA Junction-to-Ambient * -- 62 Ο
C/ W

* When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFM110A POWER MOSFET

Electrical Characteristics (TA=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/ ∆ TJ Breakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µA
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TA=125 C
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=0.75A O
4
On-State Resistance
gfs Forward Transconductance -- 1.86 -- Ω VDS=40V,ID=0.75A O
4

Ciss Input Capacitance -- 190 240

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 21 25
td(on) Turn-On Delay Time -- 10 30
VDD=50V,ID=5.6A,
tr Rise Time -- 14 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 28 70
See Fig 13 4 O
O 5
tf Fall Time -- 18 50
Qg Total Gate Charge -- 8.5 12 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 1.6 -- nC ID=5.6A
Qgd Gate-Drain(“Miller”) Charge -- 4.1 -- See Fig 6 & Fig 12 4 O
O 5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 1.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 12 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=1.5A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns Ο
TJ=25 C ,IF=5.6A
Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=40mH, I AS=5.6A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5.6A, di/dt <_ 250A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFM110A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
101 10 V 101
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
150 oC
Bottom : 4.5 V

100 100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TA = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.8
IDR , Reverse Drain Current

101

0.6 VGS = 10 V
RDS(on) , [Ω]

0.4
100

VGS = 20 V
0.2
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
350
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

280 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

210
C oss

140 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
70

@ Notes : ID = 5.6 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFM110A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.8 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature
102 2.0
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

101 1.5
100 µs
1 ms
10 ms
100 100 ms 1.0
DC

@ Notes :
10-1 0.5
1. TA = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-2 0.0
10-1 100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] TA , Ambient Temperature [ oC]

Fig 11. Thermal Response

102
Thermal Response

D=0.5

0.2
101
0.1 @ Notes :
1. Zθ J A (t)=62 o C/W Max.
0.05
2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Zθ J A (t)
0.02
100
Z JA(t) ,

0.01
PDM

t1
θ

single pulse t2

10- 1
10- 5 10- 4 10- 3 10- 2 10- 1 100 101 102 103
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFM110A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFM110A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFM120A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.2 Ω
Lower Input Capacitance ID = 2.3 A
Improved Gate Charge
Extended Safe Operating Area
SOT-223
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.155 Ω (Typ.) 2

1
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TA=25 C )Ο
2.3
ID A
Continuous Drain Current (TA=70 C )Ο
1.84
IDM Drain Current-Pulsed O
1 18 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 123 mJ
IAR Avalanche Current O
1 2.3 A
EAR Repetitive Avalanche Energy O
1 0.24 mJ
dv/dt Peak Diode Recovery dv/dt O
3 6.5 V/ns
Total Power Dissipation (TA=25 C ) *
Ο
2.4 W
PD
Linear Derating Factor * 0.019 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +150
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJA Junction-to-Ambient * -- 52 Ο
C /W

* When θmounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFM120A POWER MOSFET

Electrical Characteristics (TA=25 Cunless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TA=125 C
Static Drain-Source
RDS(on) -- -- 0.2 Ω VGS=10V,ID=1.15A O
4
On-State Resistance
gfs Forward Transconductance -- 3.12 -- Ω VDS=40V,ID=1.15A O
4

Ciss Input Capacitance -- 370 480

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 14 40
VDD=50V,ID=9.2A,
tr Rise Time -- 14 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 36 90
tf --
See Fig 13 O
4 O
5
Fall Time 28 70
Qg Total Gate Charge -- 16 22 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=9.2A
Qgd Gate-Drain(“Miller”) Charge -- 7.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 18 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C,IS=2.3A,VGS=0V
trr Reverse Recovery Time -- 98 -- ns Ο
TJ=25 C,IF=9.2A
Qrr Reverse Recovery Charge -- 0.34 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=35mH, I AS=2.3A, V DD=25V, R G=27 Ω , Starting T J =25 C
o
O2

O3 ISD <_ 9.2A, di/dt <_ 300A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFM120A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
0
10 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TA = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

[A]
Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

101
0.3 VGS = 10 V
RDS(on) , [Ω ]

0.2

100
VGS = 20 V
0.1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss
[pF]

Crss= Cgd 10
VGS , Gate-Source Voltage

VDS = 50 V

400 VDS = 80 V
Capacitance

C oss

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 9.2 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFM120A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.6 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature
2.5
[A]

102 [A]
Operation in This Area
is Limited by R DS(on)
2.0
ID , Drain Current

ID , Drain Current

10 µs
101 100 µs
1 ms 1.5
10 ms
100 ms
100
DC 1.0

@ Notes :
10-1
1. TA = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0.0
10-1 100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] TA , Ambient Temperature [ oC]

Fig 11. Thermal Response

102
Thermal Response

D=0.5

101 0.2
@ Notes :
0.1 o C/W
1. Zθ J A (t)=52 Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Zθ J A (t)
0.02
100
ZθJA(t) ,

0.01
PDM

t1
single pulse t2
10- 1
10- 5 10- 4 10- 3 10- 2 10- 1 100 101 102 103
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFM120A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFM120A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFM210A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 1.5 Ω
Lower Input Capacitance ID = 0.77 A
Improved Gate Charge
Extended Safe Operating Area
SOT-223
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 1.169 Ω (Typ.) 2

1
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
Continuous Drain Current (TA=25oC ) 0.77
ID A
Continuous Drain Current (TA=70 oC ) 0.61
IDM Drain Current-Pulsed O
1 6 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 40 mJ
IAR Avalanche Current O1 0.77 A
EAR Repetitive Avalanche Energy O1 0.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 2 W
PD
o
Linear Derating Factor * 0.016 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJA Junction-to-Ambient * -- 61 o
C/W

* When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFM210A POWER MOSFET

Electrical Characteristics (TA=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250 µA
∆BV / ∆TJ Breakdown Voltage Temp. Coeff. -- 0.23 -- V/ C
o
ID=250 µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TA=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=0.39A O
4
On-State Resistance
gfs Forward Transconductance -- 0.66 -- Ω VDS=40V,ID=0.39A O
4

Ciss Input Capacitance -- 160 210

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 44 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=3.3A,
tr Rise Time -- 10 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 20 50
See Fig 13 4 O
tf Fall Time -- 12 35 O 5

Qg Total Gate Charge -- 7 10 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 1.5 -- nC ID=3.3A
4 O
O 5
Qgd Gate-Drain( “ Miller “ ) Charge -- 3.5 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 0.77 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 6 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=0.77A,VGS=0V
trr Reverse Recovery Time -- 107 -- ns TJ=25oC ,IF=3.3A
Qrr Reverse Recovery Charge -- 0.33 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
2 L=100mH, I =0.77A, V =50V, R =27Ω , Starting T =25 C
o
O AS DD G J

O3 ISD <_3.3A, di/dt <_ 140A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFM210A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
101 101
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
100 Bottom : 4.5 V
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : - 55 oC 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TA = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4 101
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V
3
RDS(on) , [Ω]

2 100

1
150 oC @ Notes :
VGS = 20 V
1. VGS = 0 V
25 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC

0 10-1
0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 100 V

C iss VDS = 160 V

200
Capacitance

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 3.3 A
00 0
10 101 0 2 4 6 8
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFM210A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature
1.00
[A]

[A]

Operation in This Area

is Limited by R DS(on)
101
ID , Drain Current

ID , Drain Current

0.75
100 µs
0
1 ms
10 10 ms
100 ms
0.50
DC
10-1

@ Notes : 0.25
10-2 1. TA = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-3 0.00
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] TA , Ambient Temperature [ oC]

Fig 11. Thermal Response

102
Thermal Response

D=0.5

0.2
101
0.1 @ Notes :
1. Zθ J A (t)=61 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Zθ J A (t)
0.02
100
Z JA(t) ,

0.01
PDM

t1
θ

single pulse t2

10- 1
10- 5 10- 4 10- 3 10- 2 10- 1 100 101 102 103
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFM210A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFM210A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFM220A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 1.13 A
Improved Gate Charge
Extended Safe Operating Area
SOT-223
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 0.626 Ω (Typ.) 2

1
3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
Continuous Drain Current (TA=25 oC ) 1.13
ID A
Continuous Drain Current (TA=70 o
C) 0.9
IDM Drain Current-Pulsed O
1 9 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O2 77 mJ
IAR Avalanche Current O1 1.13 A
EAR Repetitive Avalanche Energy O1 0.24 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25 oC ) * 2.4 W
PD
o
Linear Derating Factor * 0.019 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJA Junction-to-Ambient * -- 52 o
C/W

* When mounted on the minimum pad size recommended (PCB Mount).

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFM220A POWER MOSFET

Electrical Characteristics (TA=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TA=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=0.57A O
4
On-State Resistance
gfs Forward Transconductance -- 1.36 -- Ω VDS=40V,ID=0.57A O
4

Ciss Input Capacitance -- 275 360

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 25 30
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=5A,
tr Rise Time -- 11 30
ns RG=18Ω
td(off) Turn-Off Delay Time -- 26 60
See Fig 13 4 O
tf Fall Time -- 15 40 O 5

Qg Total Gate Charge -- 12 17 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 2.4 -- nC ID=5A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 6.2 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 1.13 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 9 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=1.13A,VGS=0V
trr Reverse Recovery Time -- 122 -- ns TJ=25oC ,IF=5A
Qrr Reverse Recovery Charge -- 0.51 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=90mH, I AS=1.13A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5A, di/dt <_180A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFM220A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15V
101
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
10-1 - 55 oC
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TA = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

101

1.5 VGS = 10 V
RDS(on) , [Ω]

1.0
100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.0 10-1
0 3 6 9 12 15 18 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

400 Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
C iss
VDS = 160 V
Capacitance

300

200 C oss 5
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
100

@ Notes : ID = 5.0 A
00 0
10 101 0 3 6 9 12
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFM220A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Ambient Temperature
102 1.2
[A]

[A]

Operation in This Area

is Limited by R DS(on)

101
ID , Drain Current

ID , Drain Current

10 µs 0.9
100 µs
1 ms
100 10 ms
100 ms
0.6
DC
10-1

@ Notes : 0.3
10-2 1. TA = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-3 0.0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] TA , Ambient Temperature [ oC]

Fig 11. Thermal Response

102
Thermal Response

D=0.5

10 1 0.2
@ Notes :
0.1 o C/W
1. Zθ J A (t)=52 Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Zθ J A (t)
0.02
100
Z JA(t) ,

0.01
PDM

t1
θ

single pulse t2
10- 1
10- 5 10- 4 10- 3 10- 2 10- 1 100 101 102 103
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFM220A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFM220A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFP140A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.052 Ω
Lower Input Capacitance ID = 31 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-3P
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.041 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
31
ID A
Continuous Drain Current (TC=100 C) Ο
21.9
IDM Drain Current-Pulsed O
1 120 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 513 mJ
IAR Avalanche Current O1 31 A
EAR Repetitive Avalanche Energy O1 13.1 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
131 W
PD
Linear Derating Factor 0.88 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.14
R θCS Case-to-Sink 0.24 -- Ο
C /W
R θJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFP140A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- Ο
V/ C ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.052 Ω VGS=10V,ID=15.5A O
4
On-State Resistance
gfs Forward Transconductance -- 23.13 -- Ω VDS=40V,ID=15.5A O
4

Ciss Input Capacitance -- 1320 1710

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 325 380 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 148 170
td(on) Turn-On Delay Time -- 18 50
VDD=50V,ID=28A,
tr Rise Time -- 18 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 90 180
tf --
See Fig 13 O
4 O
5
Fall Time 56 120
Qg Total Gate Charge -- 60 78 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 10.8 -- nC ID=28A
Qgd Gate-Drain(“Miller”) Charge -- 27.9 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 31 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 120 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=31A,VGS=0V
trr Reverse Recovery Time -- 132 -- ns Ο
TJ=25 C ,IF=28A
Qrr Reverse Recovery Charge -- 0.63 -- µC diF/dt=100A/ µs O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
O2 L=0.8mH, I =31A, V =25V, R =27 Ω , Starting T =25 C
AS DD G J
Ο

O3 I <_ 28A, di/dt <_ 400A/ µs, V <_ BV , Starting T =25 C

SD DD DSS J
Ο

O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle <_2%

O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFP140A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V 175 oC
5.0 V
Bottom : 4.5 V
101
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
1. 250 µs Pulse Test
3. 250 µs Pulse Test
100 2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.08
102
IDR , Reverse Drain Current

0.06 VGS = 10 V
RDS(on) , [Ω]

0.04 101

VGS = 20 V
0.02
@ Notes :
175 oC
1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 100
0 30 60 90 120 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

2000 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

1500
C oss

1000 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
500

@ Notes : ID =28.0 A
00 0
10 101 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFP140A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 14.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 40
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

102 10 µs 30
100 µs
1 ms
10 ms
101 20
DC

@ Notes :
100 10
1. TC = 25 oC
o
2. TJ = 175 C
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100

D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.14 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.05
PDM
Z JC(t) ,

0.02
t1
0.01 single pulse
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFP140A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS140A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFP150A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.04 Ω
Lower Input Capacitance ID = 43 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-3P
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.032 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
43
ID A
Continuous Drain Current (TC=100 C) Ο
30.4
IDM Drain Current-Pulsed O
1 170 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 740 mJ
IAR Avalanche Current O1 43 A
EAR Repetitive Avalanche Energy O1 19.3 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
193 W
PD
Linear Derating Factor 1.28 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 0.78
R θCS Case-to-Sink 0.24 -- Ο
C /W
R θ JA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFP150A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=21.5A O
4
On-State Resistance
gfs Forward Transconductance -- 28.34 -- Ω VDS=40V,ID=21.5A O
4

Ciss Input Capacitance -- 1750 2270

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 420 485 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 185 215
td(on) Turn-On Delay Time -- 17 50
VDD=50V,ID=40A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 80 160
tf -- 100
See Fig 13 O
4 O
5
Fall Time 45
Qg Total Gate Charge -- 75 97 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 13.2 -- nC ID=40A
Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 43 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 170 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.6 V Ο
TJ=25 C ,IS=43A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns Ο
TJ=25 C ,IF=40A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=0.6mH, I AS=43A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFP150A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
102 Top : 15V 102
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V 175 oC
Bottom : 4.5 V
1
10
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
100 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.06
IDR , Reverse Drain Current

102
0.05
VGS = 10 V
RDS(on) , [Ω]

0.04

0.03
101
VGS = 20 V
0.02

@ Notes :
0.01 175 oC
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 175 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

2000 VDS = 80 V
Capacitance

C oss

5
@ Notes :
1000 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID =40.0 A
00 0
10 101 0 10 20 30 40 50 60 70 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFP150A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 20.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
50
[A]

[A]

103 Operation in This Area

is Limited by R DS(on)
40
ID , Drain Current

ID , Drain Current

10 µs
102 100 µs
1 ms 30
10 ms
101 DC
20

@ Notes :
100 1. TC = 25 oC 10
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2 o
1. Zθ J C (t)=0.78 C/W Max.
10- 1 2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Z (t)
θJ C
0.05
PDM
Z JC(t) ,

0.02
t1
0.01 single pulse t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFP150A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFP150A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFP240A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.18 Ω
Lower Input Capacitance ID = 20 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-3P
Lower RDS(ON) : 0.144 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 20
ID A
Continuous Drain Current (TC=100 oC ) 12.7
IDM Drain Current-Pulsed O
1 80 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 267 mJ
IAR Avalanche Current O1 20 A
EAR Repetitive Avalanche Energy O1 18 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25oC) 180 W
PD o
Linear Derating Factor 1.45 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.69
o
R θCS Case-to-Sink 0.24 -- C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFP240A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.26 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.18 Ω VGS=10V,ID=10A O
4
On-State Resistance
gfs Forward Transconductance -- 10.01 -- Ω VDS=40V,ID=10A O
4

Ciss Input Capacitance -- 1160 1500

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 250 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 94 110
td(on) Turn-On Delay Time -- 17 40
VDD=100V,ID=18A,
tr Rise Time -- 16 40
ns RG=9.1 Ω
td(off) Turn-Off Delay Time -- 48 110
See Fig 13 4 O
tf Fall Time -- 24 60 O 5

Qg Total Gate Charge -- 44 58 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 10.4 -- nC ID=18A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 27.1 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 20 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 80 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=20A,VGS=0V
trr Reverse Recovery Time -- 195 -- ns TJ=25oC ,IF=18A
Qrr Reverse Recovery Charge -- 1.35 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=20A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 18A, di/dt <_260A/ µs, V DD <_BVDSS , Starting T J =25 oC

O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFP240A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
101 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
@ Notes :
25 oC
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

VGS = 10 V
0.3
101
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 20 40 60 80 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss VDS = 100 V

1500
VDS = 160 V
Capacitance

1000

C oss 5
@ Notes :
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 18.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFP240A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 9.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
[A]

[A]

Operation in This Area

is Limited by R DS(on)
102 20
ID , Drain Current

ID , Drain Current

100 µs
1 ms
15
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
o
10- 1 1. Zθ J C (t)=0.69 C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Z (t)
0.05 θJC
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
10- 2 t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFP240A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFP240A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
$GYDQFHG 3RZHU 026)(7 IRFP244
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 16 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3P
♦ Lower RDS(ON): 0.214Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 16
ID A
Continuous Drain Current (TC=100°C) 10.1
IDM Drain Current-Pulsed (1) 64 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 480 mJ
IAR Avalanche Current (1) 16 A
EAR Repetitive Avalanche Energy (1) 18 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 180 W
PD
Linear Derating Factor 1.45 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.69
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP244 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=8A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 9.18 -- VDS=40V,ID=8A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 16 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 64 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=16A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=3mH, IAS=16A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP244
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP244 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

15
100 µs
1 ms
101 10 ms
DC 10

100 @ Notes : 5
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-1 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
10- 1 1. Zθ J C (t)=0.69 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM

0.01 single pulse t1

-2 t2
10
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP244
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP244 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS244A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 10.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3PF
♦ Lower RDS(ON): 0.214Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 10.2
ID A
Continuous Drain Current (TC=100°C) 6.5
IDM Drain Current-Pulsed (1) 64 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 455 mJ
IAR Avalanche Current (1) 10.2 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.7
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS244A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=5.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.32 -- VDS=40V,ID=5.1A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 64 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10.2A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=10.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25 °C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS244A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS244A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
is Limited by R DS(on) 10
102
ID , Drain Current [A]

10 µs ID , Drain Current [A] 8

100 µs
1 ms
101
10 ms 6
DC
4
100 @ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.7 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
PDM
Z JC(t) ,

0.02
0.01 t1
single pulse t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS244A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS244A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFP250A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.085 Ω
Lower Input Capacitance ID = 32 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-3P
Low RDS(ON) : 0.071 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 32
ID o A
Continuous Drain Current (TC=100 C) 20.3
IDM Drain Current-Pulsed O
1 130 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O2 683 mJ
IAR Avalanche Current O1 32 A
EAR Repetitive Avalanche Energy O1 20.4 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC) 204 W
PD o
Linear Derating Factor 1.63 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.61
RθCS Case-to-Sink 0.24 -- o
C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFP250A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.085 Ω VGS=10V,ID=16A O
4
On-State Resistance
gfs Forward Transconductance -- 18.98 -- Ω VDS=40V,ID=16A O
4

Ciss Input Capacitance -- 2300 3000

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 410 475 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 200 230
td(on) Turn-On Delay Time -- 21 50
VDD=100V,ID=32A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 77 160
See Fig 13 4 O
tf Fall Time -- 38 90 O 5

Qg Total Gate Charge -- 95 123 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 18 -- nC ID=32A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 45.3 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 32 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 130 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=32A,VGS=0V
trr Reverse Recovery Time -- 203 -- ns TJ=25oC ,IF=32A
Qrr Reverse Recovery Charge -- 1.52 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=32A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 32A, di/dt <_320A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFP250A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
101
150 oC
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
100 1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
2
IDR , Reverse Drain Current

10

0.15
VGS = 10 V
RDS(on) , [Ω]

0.10
101

0.05 VGS = 20 V
150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss
3000 VDS = 100 V
Capacitance

VDS = 160 V

2000
C oss 5
@ Notes :
1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 32.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFP250A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 16.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 40
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

102 10 µs 30
100 µs
1 ms
10 ms
101 20
DC

@ Notes :
100 10
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2
1. Zθ J C (t)=0.61 o C/W Max.
10- 1
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
t1
0.01 single pulse
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFP250A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFP250A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP254
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 25 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3P
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 25
ID A
Continuous Drain Current (TC=100°C) 15.9
IDM Drain Current-Pulsed (1) 100 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 781 mJ
IAR Avalanche Current (1) 25 A
EAR Repetitive Avalanche Energy (1) 22.1 mJ
dv/dt Peak Diode Recovery dv/dt (2) 4.8 V/ns
Total Power Dissipation (TC=25°C) 221 W
PD
Linear Derating Factor 1.79 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.56
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP254 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=12.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 17.45 -- VDS=40V,ID=12.5A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 25 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 100 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=25A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=2mH, IAS=25A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
32:(5 026)(7 IRFP254
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 1
0
10 10 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP254 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
30
Operation in This Area
is Limited by R DS(on)
25
ID , Drain Current [A]

ID , Drain Current [A]

102
10 µs
100 µs
20
1 ms
10 ms
101 15
DC

10
100 @ Notes :
1. TC = 25 oC
5
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

0.2 @ Notes :
10- 1 1. Zθ J C (t)=0.56 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
t1
0.01 single pulse
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP254
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP254 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP254A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 25 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3P
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 25
ID A
Continuous Drain Current (TC=100°C) 15.9
IDM Drain Current-Pulsed (1) 100 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 781 mJ
IAR Avalanche Current (1) 25 A
EAR Repetitive Avalanche Energy (1) 22.1 mJ
dv/dt Peak Diode Recovery dv/dt (2) 4.8 V/ns
Total Power Dissipation (TC=25°C) 221 W
PD
Linear Derating Factor 1.79 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.56
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP254A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=12.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 17.45 -- VDS=40V,ID=12.5A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 25 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 100 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=25A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=2mH, IAS=25A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
32:(5 026)(7 IRFP254A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 1
0
10 10 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP254A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
30
Operation in This Area
is Limited by R DS(on)
25
ID , Drain Current [A]

ID , Drain Current [A]

102
10 µs
100 µs
20
1 ms
10 ms
101 15
DC

10
100 @ Notes :
1. TC = 25 oC
5
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

0.2 @ Notes :
10- 1 1. Zθ J C (t)=0.56 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
t1
0.01 single pulse
t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP254A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP254A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP340A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 11 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3P
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 11
ID A
Continuous Drain Current (TC=100°C) 7
IDM Drain Current-Pulsed (1) 44 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 553 mJ
IAR Avalanche Current (1) 11 A
EAR Repetitive Avalanche Energy (1) 16.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 162 W
PD
Linear Derating Factor 1.3 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.77
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP340A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=5.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.01 -- VDS=50V,ID=5.5A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 11 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 44 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=11A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=11A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP340A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP340A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
102
is Limited by R DS(on)
10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
8
101 1 ms
10 ms
DC 6

4
100
@ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.77 o C/W Max.
10- 1 2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

PDM
0.02
t1
0.01 single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP340A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP340A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP350
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 17 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3P
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 17
ID A
Continuous Drain Current (TC=100°C) 10.8
IDM Drain Current-Pulsed (1) 68 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1156 mJ
IAR Avalanche Current (1) 17 A
EAR Repetitive Avalanche Energy (1) 20.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 202 W
PD
Linear Derating Factor 1.61 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.62
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP350 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=8.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.65 -- VDS=50V,ID=8.5A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 17 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 68 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=17A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=17A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP350
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP350 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

15
10 µs
100 µs
1 ms
101 10 ms
10
DC

100 @ Notes : 5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2
1. Zθ J C (t)=0.62 o C/W Max.
10- 1
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02 t1
0.01 single pulse t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP350
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP350 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP350A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 17 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3P
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 17
ID A
Continuous Drain Current (TC=100°C) 10.8
IDM Drain Current-Pulsed (1) 68 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1156 mJ
IAR Avalanche Current (1) 17 A
EAR Repetitive Avalanche Energy (1) 20.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 202 W
PD
Linear Derating Factor 1.61 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.62
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP350A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=8.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.65 -- VDS=50V,ID=8.5A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 17 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 68 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=17A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=17A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP350A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP350A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

15
10 µs
100 µs
1 ms
101 10 ms
10
DC

100 @ Notes : 5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2
1. Zθ J C (t)=0.62 o C/W Max.
10- 1
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02 t1
0.01 single pulse t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP350A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP350A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP440
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3P
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8.5
ID A
Continuous Drain Current (TC=100°C) 5.4
IDM Drain Current-Pulsed (1) 34 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 602 mJ
IAR Avalanche Current (1) 8.5 A
EAR Repetitive Avalanche Energy (1) 16.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 162 W
PD
Linear Derating Factor 1.3 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.77
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP440 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.29 -- VDS=50V,ID=4.25A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 34 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8.5A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25° C,
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=8.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP440
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP440 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.77 o C/W Max.
10- 1
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP440
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP440 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP440A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 8.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3P
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 8.5
ID A
Continuous Drain Current (TC=100°C) 5.4
IDM Drain Current-Pulsed (1) 34 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 602 mJ
IAR Avalanche Current (1) 8.5 A
EAR Repetitive Avalanche Energy (1) 16.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 162 W
PD
Linear Derating Factor 1.3 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.77
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP440A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=4.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.29 -- VDS=50V,ID=4.25A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 34 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=8.5A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=8.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP440A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP440A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=0.77 o C/W Max.
10- 1
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP440A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP440A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP450
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.4Ω
♦ Lower Input Capacitance ID = 14 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3P
♦ Lower RDS(ON): 0.308Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 14
ID A
Continuous Drain Current (TC=100°C) 8.8
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1089 mJ
IAR Avalanche Current (1) 14 A
EAR Repetitive Avalanche Energy (1) 20.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 205 W
PD
Linear Derating Factor 1.64 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.61
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP450 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=7A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.03 -- VDS=50V,ID=7A (4)
Ciss Input Capacitance -- 2500 3250
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 295 340 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 130 150
td(on) Turn-On Delay Time -- 23 55
VDD=250V,ID=14A,
tr Rise Time -- 26 60
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 125 260
See Fig 13 (4) (5)
tf Fall Time -- 37 85
Qg Total Gate Charge -- 121 157 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 16.2 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 61 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=14A,VGS=0V
trr Reverse Recovery Time -- 437 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 5.5 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=14A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 230A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP450
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]
101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.0

IDR , Reverse Drain Current [A]

0.8
Drain-Source On-Resistance

101
RDS(on) , [ Ω ]

VGS = 10 V
0.6

0.4
100
VGS = 20 V
0.2 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 10 20 30 40 50 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

3000 VDS = 250 V

Capacitance [pF]

VDS = 400 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss
@ Notes : ID = 14.0 A
00 1
0
10 10 0 20 40 60 80 100 120 140
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP450 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
102 is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 9
101
10 ms
DC
6

100 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2 1. Zθ J C (t)=0.61 o C/W Max.
10- 1
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
t1
0.01 single pulse t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP450
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP450 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP450A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.4Ω
♦ Lower Input Capacitance ID = 14 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3P
♦ Lower RDS(ON): 0.308Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 14
ID A
Continuous Drain Current (TC=100°C) 8.8
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1089 mJ
IAR Avalanche Current (1) 14 A
EAR Repetitive Avalanche Energy (1) 20.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 205 W
PD
Linear Derating Factor 1.64 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.61
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP450A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=7A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 11.03 -- VDS=50V,ID=7A (4)
Ciss Input Capacitance -- 2500 3250
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 295 340 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 130 150
td(on) Turn-On Delay Time -- 23 55
VDD=250V,ID=14A,
tr Rise Time -- 26 60
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 125 260
See Fig 13 (4) (5)
tf Fall Time -- 37 85
Qg Total Gate Charge -- 121 157 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 16.2 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 61 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 14 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=14A,VGS=0V
trr Reverse Recovery Time -- 437 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 5.5 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=14A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 230A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP450A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]
101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.0

IDR , Reverse Drain Current [A]

0.8
Drain-Source On-Resistance

101
RDS(on) , [ Ω ]

VGS = 10 V
0.6

0.4
100
VGS = 20 V
0.2 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 10 20 30 40 50 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

3000 VDS = 250 V

Capacitance [pF]

VDS = 400 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss
@ Notes : ID = 14.0 A
00 1
0
10 10 0 20 40 60 80 100 120 140
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP450A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
102 is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 9
101
10 ms
DC
6

100 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

100
Thermal Response

D=0.5

@ Notes :
0.2 1. Zθ J C (t)=0.61 o C/W Max.
10- 1
2. Duty Factor, D=t1 /t2
0.1 3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
t1
0.01 single pulse t2
10- 2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP450A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP450A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFP460
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.25Ω
♦ Lower Input Capacitance ID = 22 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3P
♦ Lower RDS(ON): 0.197Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 22
ID A
Continuous Drain Current (TC=100°C) 13.4
IDM Drain Current-Pulsed (1) 88 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 2151 mJ
IAR Avalanche Current (1) 22 A
EAR Repetitive Avalanche Energy (1) 27.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 278 W
PD
Linear Derating Factor 2.22 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 0.45
RθCS Case-to-Sink 0.24 -- °C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFP460 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.69 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.25 Ω VGS=10V,ID=11A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 17.31 -- VDS=50V,ID=11A (4)
Ciss Input Capacitance -- 3940 5120
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 465 535 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 215 250
td(on) Turn-On Delay Time -- 27 65
VDD=250V,ID=22A,
tr Rise Time -- 30 70
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 150 310
See Fig 13 (4) (5)
tf Fall Time -- 43 95
Qg Total Gate Charge -- 182 236 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 26 -- nC ID=22A
Qgd Gate-Drain ( Miller ) Charge -- 79.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 22 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 88 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=22A,VGS=0V
trr Reverse Recovery Time -- 528 -- ns TJ=25°C,IF=22A
Qrr Reverse Recovery Charge -- 8.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=8mH, IAS=22A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 22A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFP460
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 101
101 5.0 V
Bottom : 4.5 V

150 oC

100
25 oC @ Notes :
0
10 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
2. TC = 25 oC - 55 oC 3. 250 µs Pulse Test
-1
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.45
101
RDS(on) , [ Ω ]

VGS = 10 V

0.30

100
VGS = 20 V
0.15
@ Notes :
o
1. VGS = 0 V
150 C
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.00 -1
10
0 15 30 45 60 75 90 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
6000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

VDS = 250 V
Capacitance [pF]

4000
VDS = 400 V

5
2000 C oss @ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 22.0 A
00 1
0
10 10 0 50 100 150 200
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFP460 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 11.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
Operation in This Area
is Limited by R DS(on)
102 20
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms 15
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

10- 1 0.2 @ Notes :

1. Zθ J C (t)=0.45 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
PDM
Z JC(t) ,

0.02
t1
10- 2 0.01 single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFP460
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFP460 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR014
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 8.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.097Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 8.2
ID A
Continuous Drain Current (TC=100°C) 5.2
IDM Drain Current-Pulsed (1) 33 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 58 mJ
IAR Avalanche Current (1) 8.2 A
EAR Repetitive Avalanche Energy (1) 1.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 18 W
Linear Derating Factor 0.14 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 7.04
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR014 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.060 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=4.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.02 -- VDS=30V,ID=4.1A (4)
Ciss Input Capacitance -- 280 360
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 125 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 40 46
td(on) Turn-On Delay Time -- 11 25
VDD=30V,ID=10A,
tr Rise Time -- 17 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 27 60
See Fig 13 (4) (5)
tf Fall Time -- 28 60
Qg Total Gate Charge -- 12 17 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 2.4 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 33 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.2A,VGS= 0V
trr Reverse Recovery Time -- 55 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 0.11 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=1mH, IAS=8.2A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 200A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR014
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V 101

ID , Drain Current [A]

6.0 V
101 5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
2. VDS = 30 V
@ Notes :
100 1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.20

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

0.15 101
RDS(on) , [ Ω ]

0.10

100
VGS = 20 V
0.05
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
VDS = 30 V
VGS , Gate-Source Voltage [V]

C iss
Capacitance [pF]

400
C oss VDS = 48 V

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 10.0 A
00 1
0
10 10 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR014 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 5 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4
0
10
@ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

101
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=7.04 o C/W Max.
100
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
10- 1 t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR014
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR014 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U014A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 8.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.097Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 8.2
ID A
Continuous Drain Current (TC=100°C) 5.2
IDM Drain Current-Pulsed (1) 33 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 58 mJ
IAR Avalanche Current (1) 8.2 A
EAR Repetitive Avalanche Energy (1) 1.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 18 W
Linear Derating Factor 0.14 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 7.04
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U014A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.060 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=4.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 6.02 -- VDS=30V,ID=4.1A (4)
Ciss Input Capacitance -- 280 360
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 125 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 40 46
td(on) Turn-On Delay Time -- 11 25
VDD=30V,ID=10A,
tr Rise Time -- 17 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 27 60
See Fig 13 (4) (5)
tf Fall Time -- 28 60
Qg Total Gate Charge -- 12 17 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 2.4 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 33 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8.2A,VGS= 0V
trr Reverse Recovery Time -- 55 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 0.11 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=1mH, IAS=8.2A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 200A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U014A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V 101

ID , Drain Current [A]

6.0 V
101 5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
2. VDS = 30 V
@ Notes :
100 1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.20

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

0.15 101
RDS(on) , [ Ω ]

0.10

100
VGS = 20 V
0.05
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
VDS = 30 V
VGS , Gate-Source Voltage [V]

C iss
Capacitance [pF]

400
C oss VDS = 48 V

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 10.0 A
00 1
0
10 10 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U014A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 5 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
102 Operation in This Area
is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
101 1 ms 6
10 ms
DC
4
0
10
@ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

101
Thermal Response

D=0.5

0.2 @ Notes :
1. Zθ J C (t)=7.04 o C/W Max.
100
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

0.02 PDM
0.01 single pulse t1
10- 1 t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U014A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U014A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U024A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.07Ω
♦ Lower Input Capacitance ID = 15 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.050Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 15
ID A
Continuous Drain Current (TC=100°C) 9.5
IDM Drain Current-Pulsed (1) 60 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 154 mJ
IAR Avalanche Current (1) 15 A
EAR Repetitive Avalanche Energy (1) 3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 30 W
Linear Derating Factor 0.24 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 4.14
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U024A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.066 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.07 Ω VGS=10V,ID=7.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 9.94 -- VDS=30V,ID=7.5A (4)
Ciss Input Capacitance -- 600 780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 240 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 83 95
td(on) Turn-On Delay Time -- 13 30
VDD=30V,ID=17A,
tr Rise Time -- 19 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 46 100
See Fig 13 (4) (5)
tf Fall Time -- 48 100
Qg Total Gate Charge -- 24 32 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 4.3 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 10.8 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 15 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 60 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=15A,VGS=0V
trr Reverse Recovery Time -- 60 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 0.12 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=0.8mH, IAS=15A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U024A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V
101 150 oC

100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
100 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.100

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.075 VGS = 10 V
101
RDS(on) , [ Ω ]

0.050

100
VGS = 20 V
0.025
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.000 10-1
0 20 40 60 80 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 30 V
Capacitance [pF]

800 C oss
VDS = 48 V

5
@ Notes :
400 C rss 1. VGS = 0 V
2. f = 1 MHz

@ Notes : ID = 17.0 A
00 1
0
10 10 0 5 10 15 20 25
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U024A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
102
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 15
100 µs
1 ms
101
10 ms 10
DC

100 @ Notes : 5
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

1. Zθ J C (t)=4.14 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1 0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U024A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U024A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR034
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.04Ω
♦ Lower Input Capacitance ID = 23 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.030Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 23
ID A
Continuous Drain Current (TC=100°C) 14.5
IDM Drain Current-Pulsed (1) 92 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 453 mJ
IAR Avalanche Current (1) 23 A
EAR Repetitive Avalanche Energy (1) 4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 40 W
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.11
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR034 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.059 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=11.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 18.96 -- VDS=30V,ID=11.5A (4)
Ciss Input Capacitance -- 1040 1350
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 355 410 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 140 165
td(on) Turn-On Delay Time -- 18 40
VDD=30V,ID=30A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 58 120
See Fig 13 (4) (5)
tf Fall Time -- 58 120
Qg Total Gate Charge -- 41 54 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 8.6 -- nC ID=30A
Qgd Gate-Drain ( Miller ) Charge -- 17.7 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 23 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 92 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.6 V TJ=25°C,IS=23A,VGS=0V
trr Reverse Recovery Time -- 75 -- ns TJ=25°C,IF=30A
Qrr Reverse Recovery Charge -- 0.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=1mH, IAS=23A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 30A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR034
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
101
Bottom : 4.5 V

101 150 oC

100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test
3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
100 -1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.05
102

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.04 VGS = 10 V
RDS(on) , [ Ω ]

0.03 101

VGS = 20 V
0.02
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.01 0
10
0 25 50 75 100 125 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
C iss
VDS = 30 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

C oss VDS = 48 V

1000
5
@ Notes :
C rss 1. VGS = 0 V
500 2. f = 1 MHz

@ Notes : ID = 30.0 A
00 1
0
10 10 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR034 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID =15 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 25
Operation in This Area
is Limited by R DS(on)
20
ID , Drain Current [A]

ID , Drain Current [A]

102
10 µs
100 µs
15
1 ms
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.11 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

10- 1 0.02 PDM

0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR034
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR034 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U034A
FEATURES
BVDSS = 60 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.04Ω
♦ Lower Input Capacitance ID = 23 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 60V
♦ Lower RDS(ON): 0.030Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 60 V
Continuous Drain Current (TC=25°C) 23
ID A
Continuous Drain Current (TC=100°C) 14.5
IDM Drain Current-Pulsed (1) 92 A
VGS Gate-to-Source Voltage ±20 V
EAS Single Pulsed Avalanche Energy (2) 453 mJ
IAR Avalanche Current (1) 23 A
EAR Repetitive Avalanche Energy (1) 4 mJ
dv/dt Peak Diode Recovery dv/dt (3) 5.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 40 W
Linear Derating Factor 0.32 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.11
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U034A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 60 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.059 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=60V
IDSS Drain-to-Source Leakage Current µA VDS=48V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=11.5A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 18.96 -- VDS=30V,ID=11.5A (4)
Ciss Input Capacitance -- 1040 1350
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 355 410 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 140 165
td(on) Turn-On Delay Time -- 18 40
VDD=30V,ID=30A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 58 120
See Fig 13 (4) (5)
tf Fall Time -- 58 120
Qg Total Gate Charge -- 41 54 VDS=48V,VGS=10V,
Qgs Gate-Source Charge -- 8.6 -- nC ID=30A
Qgd Gate-Drain ( Miller ) Charge -- 17.7 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 23 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 92 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.6 V TJ=25°C,IS=23A,VGS=0V
trr Reverse Recovery Time -- 75 -- ns TJ=25°C,IF=30A
Qrr Reverse Recovery Charge -- 0.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=1mH, IAS=23A, VDD=25V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 30A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U034A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
101
Bottom : 4.5 V

101 150 oC

100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 30 V
1. 250 µs Pulse Test
3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
100 -1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.05
102

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.04 VGS = 10 V
RDS(on) , [ Ω ]

0.03 101

VGS = 20 V
0.02
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.01 0
10
0 25 50 75 100 125 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 12 V
Crss= Cgd 10
C iss
VDS = 30 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

C oss VDS = 48 V

1000
5
@ Notes :
C rss 1. VGS = 0 V
500 2. f = 1 MHz

@ Notes : ID = 30.0 A
00 1
0
10 10 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U034A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 2.5

Drain-Source Breakdown Voltage

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1 2.0

1.0 1.5

0.9 @ Notes : 1.0 @ Notes :

1. VGS = 0 V 1. VGS = 10 V
2. ID = 250 µA 2. ID =15 A

0.8 0.5
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 25
Operation in This Area
is Limited by R DS(on)
20
ID , Drain Current [A]

ID , Drain Current [A]

102
10 µs
100 µs
15
1 ms
101 10 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.11 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

10- 1 0.02 PDM

0.01 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U034A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U034A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U110A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 4.7 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.289 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C ) 4.7
ID Ο
A
Continuous Drain Current (TC=100 C ) 3
IDM Drain Current-Pulsed O
1 19 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 59 mJ
IAR Avalanche Current O1 4.7 A
EAR Repetitive Avalanche Energy O1 2 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C ) *
Ο
2.5 W
PD Total Power Dissipation (TC=25 C ) Ο
20 W
Linear Derating Factor 0.16 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +150
Storage Temperature Range
Ο

Maximum Lead Temp. for Soldering C

TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 6.26
R θJA Junction-to-Ambient * -- 50 Ο
C /W
R θJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U110A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/∆ TJ Breakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=125 C
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=2.35A O
4
On-State Resistance
gfs Forward Transconductance -- 3.23 -- Ω VDS=40V,ID=2.35A O
4

Ciss Input Capacitance -- 190 240

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 21 25
td(on) Turn-On Delay Time -- 10 30
VDD=50V,ID=5.6A,
tr Rise Time -- 14 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 28 70
See Fig 13 4 O
O 5
tf Fall Time -- 18 50
Qg Total Gate Charge -- 8.5 12 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 1.6 -- nC ID=5.6A
Qgd Gate-Drain(“Miller”) Charge -- 4.1 -- See Fig 6 & Fig 12 4 O
O 5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.7 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 19 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=4.7A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns Ο
TJ=25 C ,IF=5.6A
Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/ µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=4mH, I AS=4.7A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5.6A, di/dt <_250A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U110A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
101 10 V 101
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
150 oC
Bottom : 4.5 V

100 100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.8
IDR , Reverse Drain Current

101

0.6 VGS = 10 V
RDS(on) , [Ω ]

0.4
100

VGS = 20 V
0.2
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
350
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

280 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

210
C oss

140 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
70

@ Notes : ID = 5.6 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U110A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.8 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
[A]

[A]

Operation in This Area

is Limited by R DS(on)
4
ID , Drain Current

ID , Drain Current

101 100 µs
3
1 ms

10 ms
DC 2
100
@ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

@ Notes :
0.2 o C/W
100 1. Zθ J C (t)=6.26 Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
ZθJC(t) ,

0.02 PDM
0.01 t1
single pulse
10- 1 t2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFR/U110A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U110A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U120A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.2 Ω
Lower Input Capacitance ID = 8.4 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.155 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 8.4
ID Ο
A
Continuous Drain Current (TC=100 C) 5.3
IDM Drain Current-Pulsed O
1 34 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 141 mJ
IAR Avalanche Current O
1 8.4 A
EAR Repetitive Avalanche Energy O
1 3.2 mJ
dv/dt Peak Diode Recovery dv/dt O
3 6.5 V/ns
Total Power Dissipation (TA=25 C ) *
Ο
2.5 W
PD Total Power Dissipation (TC=25 C ) Ο
32 W
Linear Derating Factor 0.26 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +150
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θ JC Junction-to-Case -- 3.9
R θ JA Junction-to-Ambient * -- 50 Ο
C /W
Rθ JA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U120A POWER MOSFET

Electrical Characteristics (TCC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=125 C
Static Drain-Source
RDS(on) -- -- 0.2 Ω VGS=10V,ID=4.2A O
4
On-State Resistance
gfs Forward Transconductance -- 6.29 -- Ω VDS=40V,ID=4.2A O
4

Ciss Input Capacitance -- 370 480

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 14 40
VDD=50V,ID=9.2A,
tr Rise Time -- 14 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 36 90
tf --
See Fig 13 O
4 O
5
Fall Time 28 70
Qg Total Gate Charge -- 16 22 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=9.2A
Qgd Gate-Drain(“Miller”) Charge -- 7.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8.4 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 34 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=8.4A,VGS=0V
trr Reverse Recovery Time -- 98 -- ns Ο
TJ=25 C ,IF=9.2A
Qrr Reverse Recovery Charge -- 0.34 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=3mH, I AS=8.4A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 9.2A, di/dt <_ 300A/ µs, V DD <_ BVDSS , Starting T J =25oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U120A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

101
0.3 VGS = 10 V
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss
[pF]

Crss= Cgd 10
VGS , Gate-Source Voltage

VDS = 50 V

400 VDS = 80 V
Capacitance

C oss

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 9.2 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U120A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.6 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
8
ID , Drain Current

ID , Drain Current

10 µs
100 µs
101 1 ms 6

10 ms
DC 4

100
@ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100
0.2
@ Notes :
1. Zθ J C (t)=3.9 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)

0.02
Z JC(t) ,

10- 1 PDM
0.01
single pulse
t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFR/U120A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U120A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U130A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.11 Ω
Lower Input Capacitance ID = 13 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.092 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 13
ID Ο
A
Continuous Drain Current (TC=100 C) 8.2
IDM Drain Current-Pulsed O
1 52 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 225 mJ
IAR Avalanche Current O1 13 A
EAR Repetitive Avalanche Energy O1 4.1 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TA=25 C) *Ο
2.5 W
PD Total Power Dissipation (TC=25 C ) Ο
41 W
Linear Derating Factor 0.32 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +150
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.08
R θJA Junction-to-Ambient * -- 50 Ο
C /W
R θJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U130A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C Ο
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=125 C
Static Drain-Source
RDS(on) -- -- 0.11 Ω VGS=10V,ID=6.5A O
4
On-State Resistance
gfs Forward Transconductance -- 9.25 -- Ω VDS=40V,ID=6.5A O
4

Ciss Input Capacitance -- 610 790

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 62 72
td(on) Turn-On Delay Time -- 13 40
VDD=50V,ID=14A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 55 110
tf --
See Fig 13 O
4 O
5
Fall Time 36 80
Qg Total Gate Charge -- 27 36 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 4.5 -- nC ID=14A
Qgd Gate-Drain(“Miller”) Charge -- 12.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 13 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 52 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=13A,VGS=0V
trr Reverse Recovery Time -- 109 -- ns Ο
TJ=25 C ,IF=14A
Qrr Reverse Recovery Charge -- 0.41 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=13A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 14A, di/dt <_ 350A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U130A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
101 5.0 V
Bottom : 4.5 V

150 oC

100
25 oC
@ Notes :
1. VGS = 0 V
0 @ Notes :
10 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
IDR , Reverse Drain Current

VGS = 10 V
0.15
101
RDS(on) , [Ω]

0.10

100
VGS = 20 V
0.05
@ Notes :
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 15 30 45 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V
750
VDS = 80 V
Capacitance

C oss
500
5
@ Notes :
1. VGS = 0 V
C rss
250 2. f = 1 MHz

@ Notes : ID = 14.0 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U130A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
12
ID , Drain Current

ID , Drain Current

10 µs
100 µs

1 ms 9
101
10 ms
DC
6

0
10 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=3.08 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

10- 1 0.02 PDM

0.01
single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFR/U130A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U130A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U210A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 1.5 Ω
Lower Input Capacitance ID = 2.7 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 1.169 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 2.7
ID o A
Continuous Drain Current (TC=100 C) 1.7
IDM Drain Current-Pulsed O
1 10 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 44 mJ
IAR Avalanche Current O1 2.7 A
EAR Repetitive Avalanche Energy O1 2.6 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25 oC) * 2.5 W
PD Total Power Dissipation (TC=25 oC) 26 W
o
Linear Derating Factor 0.2 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 4.9
o
RθJA Junction-to-Ambient * -- 50 C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U210A POWER MOSFET

Electrical Characteristics (TC=25 oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆ TJ Breakdown Voltage Temp. Coeff. V/ C ID=250 µ A
o
-- 0.23 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.35A O
4
On-State Resistance
gfs Forward Transconductance -- 1.26 -- Ω VDS=40V,ID=1.35A O
4

Ciss Input Capacitance -- 160 210

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 44 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=3.3A,
tr Rise Time -- 10 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 20 50
See Fig 13 4 O
tf Fall Time -- 12 35 O 5

Qg Total Gate Charge -- 7 10 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 1.5 -- nC ID=3.3A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 3.5 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.7 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 10 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC ,IS=2.7A,VGS=0V
trr Reverse Recovery Time -- 107 -- ns TJ=25oC ,IF=3.3A
Qrr Reverse Recovery Charge -- 0.33 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
2 L=9mH, I =2.7A, V =50V, R =27Ω , Starting T =25 C
o
O AS DD G J

O3 ISD <_ 3.3A, di/dt <_140A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U210A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
101 101
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
100 Bottom : 4.5 V
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : - 55 oC 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4 101
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V
3
RDS(on) , [Ω]

2 100

1
150 oC @ Notes :
VGS = 20 V
1. VGS = 0 V
25 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC

0 10-1
0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 100 V

C iss VDS = 160 V

200
Capacitance

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 3.3 A
00 0
10 101 0 2 4 6 8
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U210A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 3
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

101
100 µs
2
1 ms
10 ms
100 DC

1
@ Notes :
10-1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

o
1. Zθ J C (t)=4.9 C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
10- 1 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFR/U210A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U210A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR214
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0Ω
♦ Lower Input Capacitance ID = 2.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 1.393Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.2
ID A
Continuous Drain Current (TC=100°C) 1.4
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 61 mJ
IAR Avalanche Current (1) 2.2 A
EAR Repetitive Avalanche Energy (1) 2.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 25 W
Linear Derating Factor 0.20 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 5.08
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR214 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.55 -- VDS=40V,ID=1.1A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.2A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=2.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR214
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR214 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101 2.0
ID , Drain Current [A]

100 µs ID , Drain Current [A]

1 ms
1.5
10 ms
100
DC
1.0

10-1 @ Notes :
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

1. Zθ J C (t)=5.08 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
10- 1 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR214
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR214 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U214A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 2.0Ω
♦ Lower Input Capacitance ID = 2.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 1.393Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 2.2
ID A
Continuous Drain Current (TC=100°C) 1.4
IDM Drain Current-Pulsed (1) 8.5 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 61 mJ
IAR Avalanche Current (1) 2.2 A
EAR Repetitive Avalanche Energy (1) 2.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 25 W
Linear Derating Factor 0.20 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 5.08
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U214A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 2.0 Ω VGS=10V,ID=1.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.55 -- VDS=40V,ID=1.1A (4)
Ciss Input Capacitance -- 180 230
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 43 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=125V,ID=2.8A,
tr Rise Time -- 11 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 22 55
See Fig 13 (4) (5)
tf Fall Time -- 14 40
Qg Total Gate Charge -- 8.5 12 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2.8A
Qgd Gate-Drain ( Miller ) Charge -- 3.9 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8.5 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=2.2A,VGS=0V
trr Reverse Recovery Time -- 112 -- ns TJ=25°C,IF=2.8A
Qrr Reverse Recovery Charge -- 0.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=2.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.8A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U214A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
@ Notes :
25 oC
1. VGS = 0 V
10-1
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC - 55 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3 VGS = 10 V
100
RDS(on) , [ Ω ]

10-1
VGS = 20 V
1
@ Notes :
1. VGS = 0 V
o 150 oC
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2 1.4
I , Drain Current [A] VSD , Source-Drain Voltage [V]
D

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

200 VDS = 200 V

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.8 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U214A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.4 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101 2.0
ID , Drain Current [A]

100 µs ID , Drain Current [A]

1 ms
1.5
10 ms
100
DC
1.0

10-1 @ Notes :
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

1. Zθ J C (t)=5.08 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
10- 1 single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U214A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U214A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U220A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 4.6 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 0.626 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 4.6
ID o A
Continuous Drain Current (TC=100 C ) 2.9
IDM Drain Current-Pulsed O
1 18 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 71 mJ
IAR Avalanche Current O1 4.6 A
EAR Repetitive Avalanche Energy O1 4 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC) * 2.5 W
PD Total Power Dissipation (TC=25oC) 40 W
Linear Derating Factor o
0.32 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.14
o
RθJA Junction-to-Ambient * -- 50 C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U220A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆ TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=2.3A O
4
On-State Resistance
gfs Forward Transconductance -- 2.36 -- Ω VDS=40V,ID=2.3A O
4

Ciss Input Capacitance -- 275 360

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 25 30
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=5A,
tr Rise Time -- 11 30
ns RG=18Ω
td(off) Turn-Off Delay Time -- 26 60
See Fig 13 4 O
tf Fall Time -- 15 40 O 5

Qg Total Gate Charge -- 12 17 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 2.4 -- nC ID=5A
4 O
O 5
Qgd Gate-Drain( “ Miller “ ) Charge -- 6.2 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 18 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=4.6A,VGS=0V
trr Reverse Recovery Time -- 122 -- ns TJ=25 oC ,IF=5A
Qrr Reverse Recovery Charge -- 0.51 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=5mH, I AS=4.6A, V DD=50V, R G=27Ω, Starting T J =25 C
o
O2

O3 ISD <_ 5A, di/dt<_180A/ µs, V DD <_ BVDSS , Starting T J =25 oC

O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U220A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15V
101
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
10-1 - 55 oC
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

101

1.5 VGS = 10 V
RDS(on) , [Ω]

1.0
100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.0 10-1
0 3 6 9 12 15 18 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

400 Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
C iss
VDS = 160 V
Capacitance

300

200 C oss 5
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
100

@ Notes : ID = 5.0 A
00 0
10 101 0 3 6 9 12
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U220A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
5
[A]

[A]

Operation in This Area

is Limited by R DS(on)
4
ID , Drain Current

ID , Drain Current

101 100 µs

1 ms 3

10 ms
DC
2
100
@ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Z J C (t)=3.14 o C/W Max.
θ
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

10- 1 0.02 PDM

0.01
single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFR/U220A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U220A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR224
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.1Ω
♦ Lower Input Capacitance ID = 3.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Low RDS(ON): 0.742Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 3.8
ID A
Continuous Drain Current (TC=100°C) 2.4
IDM Drain Current-Pulsed (1) 15 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 90 mJ
IAR Avalanche Current (1) 3.8 A
EAR Repetitive Avalanche Energy (1) 4.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 42 W
Linear Derating Factor 0.34 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.96
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR224 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.30 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.1 Ω VGS=10V,ID=1.9A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.69 -- VDS=40V,ID=1.9A (4)
Ciss Input Capacitance -- 335 430
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 23 28
td(on) Turn-On Delay Time -- 11 30
VDD=125V,ID=4.1A,
tr Rise Time -- 12 35
ns RG=18Ω
td(off) Turn-Off Delay Time -- 32 75
See Fig 13 (4) (5)
tf Fall Time -- 15 40
Qg Total Gate Charge -- 14 20 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 2.8 -- nC ID=4.1A
Qgd Gate-Drain ( Miller ) Charge -- 6.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 15 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.8A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns TJ=25°C,IF=4.1A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=3.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.1A, di/dt ≤ 170A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR224
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15 V 101
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
-1
10 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5
1
10

IDR , Reverse Drain Current [A]

2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5 100

1.0
VGS = 20 V 10-1

0.5 @ Notes :
1. VGS = 0 V
@ Note : TJ = 25 C o 150 oC 2. 250 µs Pulse Test
25 oC
0.0 10-2
0 2 4 6 8 10 12 14 16 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
C iss Crss= Cgd 10
400
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

300 VDS = 200 V

200 C oss @ Notes : 5

1. VGS = 0 V
2. f = 1 MHz
100 C rss

@ Notes : ID = 4.1 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR224 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs 3
1 ms
10 ms
100 DC 2

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.96 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

10- 1 0.02 PDM

0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR224
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR224 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U224A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.1Ω
♦ Lower Input Capacitance ID = 3.8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Low RDS(ON): 0.742Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 3.8
ID A
Continuous Drain Current (TC=100°C) 2.4
IDM Drain Current-Pulsed (1) 15 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 90 mJ
IAR Avalanche Current (1) 3.8 A
EAR Repetitive Avalanche Energy (1) 4.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 42 W
Linear Derating Factor 0.34 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.96
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U224A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.30 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.1 Ω VGS=10V,ID=1.9A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.69 -- VDS=40V,ID=1.9A (4)
Ciss Input Capacitance -- 335 430
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 23 28
td(on) Turn-On Delay Time -- 11 30
VDD=125V,ID=4.1A,
tr Rise Time -- 12 35
ns RG=18Ω
td(off) Turn-Off Delay Time -- 32 75
See Fig 13 (4) (5)
tf Fall Time -- 15 40
Qg Total Gate Charge -- 14 20 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 2.8 -- nC ID=4.1A
Qgd Gate-Drain ( Miller ) Charge -- 6.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 15 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.8A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns TJ=25°C,IF=4.1A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=10mH, IAS=3.8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.1A, di/dt ≤ 170A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U224A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15 V 101
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
-1
10 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5
1
10

IDR , Reverse Drain Current [A]

2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5 100

1.0
VGS = 20 V 10-1

0.5 @ Notes :
1. VGS = 0 V
@ Note : TJ = 25 C o 150 oC 2. 250 µs Pulse Test
25 oC
0.0 10-2
0 2 4 6 8 10 12 14 16 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
C iss Crss= Cgd 10
400
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

300 VDS = 200 V

200 C oss @ Notes : 5

1. VGS = 0 V
2. f = 1 MHz
100 C rss

@ Notes : ID = 4.1 A
00 0
10 101 0 3 6 9 12 15
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U224A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 100 µs 3
1 ms
10 ms
100 DC 2

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.96 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.05
Z JC(t) ,

10- 1 0.02 PDM

0.01 t1
single pulse
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U224A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U224A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFR/U230A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 7.5 A
Improved Gate Charge
Extended Safe Operating Area
D-PAK I-PAK
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
Low RDS(ON) : 0.333 Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C ) 7.5
ID o A
Continuous Drain Current (TC=100 C ) 4.8
IDM Drain Current-Pulsed O
1 30 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 150 mJ
IAR Avalanche Current O1 7.5 A
EAR Repetitive Avalanche Energy O1 5 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TA=25oC ) * 2.5 W
PD Total Power Dissipation (TC=25oC ) 50 W
Linear Derating Factor o
0.4 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.5
o
RθJA Junction-to-Ambient * -- 50 C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFR/U230A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250 µA
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.21 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=3.75A O
4
On-State Resistance
gfs Forward Transconductance -- 3.73 -- Ω VDS=40V,ID=3.75A O
4

Ciss Input Capacitance -- 500 650

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 45 55
td(on) Turn-On Delay Time -- 13 40
VDD=100V,ID=9A,
tr Rise Time -- 13 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 30 70
See Fig 13 4 O
tf Fall Time -- 18 50 O 5

Qg Total Gate Charge -- 22 29 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 4.3 -- nC ID=9A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 10.9 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 7.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 30 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=7.5A,VGS=0V
trr Reverse Recovery Time -- 137 -- ns TJ=25oC,IF=9A
Qrr Reverse Recovery Charge -- 0.68 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=4mH, I AS=7.5A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD<_ 9A, di/dt <_ 220A/ µs, VDD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250µ s, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFR/U230A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
101 101
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V 101
0.75
RDS(on) , [Ω]

0.50

100

0.25 @ Notes :
VGS = 20 V
150 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 5 10 15 20 25 30 35 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
800
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

C iss Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
600
VDS = 160 V
Capacitance

400
C oss
5
@ Notes :
1. VGS = 0 V
200 C rss 2. f = 1 MHz

@ Notes : ID = 9.0 A
00 0
10 101 0 5 10 15 20 25
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFR/U230A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
8
[A]

[A]

102 Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

6
10 µs
100 µs
101
1 ms
10 ms 4
DC

100
@ Notes :
2
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100

0.2 @ Notes :
1. Zθ J C (t)=2.5 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 IRFR/U230A

N-CHANNEL
POWER MOSFET

Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFR/U230A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR234
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 6.6 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.327Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 6.6
ID A
Continuous Drain Current (TC=100°C) 4.2
IDM Drain Current-Pulsed (1) 26 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 191 mJ
IAR Avalanche Current (1) 6.6 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.54
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR234 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=3.3A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 4.83 -- VDS=40V,ID=3.3A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 6.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 26 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=6.6A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=6.6A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR234
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR234 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 8
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 6
1 100 µs
10
1 ms
10 ms 4
DC

100
@ Notes : 2
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-1 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.54 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR234
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR234 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U234A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.45Ω
♦ Lower Input Capacitance ID = 6.6 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
♦ Lower RDS(ON): 0.327Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 6.6
ID A
Continuous Drain Current (TC=100°C) 4.2
IDM Drain Current-Pulsed (1) 26 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 191 mJ
IAR Avalanche Current (1) 6.6 A
EAR Repetitive Avalanche Energy (1) 4.9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 49 W
Linear Derating Factor 0.39 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.54
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U234A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.29 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.45 Ω VGS=10V,ID=3.3A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 4.83 -- VDS=40V,ID=3.3A (4)
Ciss Input Capacitance -- 730 950
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 110 130 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 50 60
td(on) Turn-On Delay Time -- 13 40
VDD=125V,ID=8.1A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 53 120
See Fig 13 (4) (5)
tf Fall Time -- 21 50
Qg Total Gate Charge -- 30 40 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 5.8 -- nC ID=8.1A
Qgd Gate-Drain ( Miller ) Charge -- 13.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 6.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 26 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=6.6A,VGS=0V
trr Reverse Recovery Time -- 190 -- ns TJ=25°C,IF=8.1A
Qrr Reverse Recovery Charge -- 1.28 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=6.6A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8.1A, di/dt ≤ 210A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U234A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

0.75 VGS = 10 V
RDS(on) , [ Ω ]

0.50

100
VGS = 20 V
0.25
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1200
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

VDS = 125 V
Capacitance [pF]

800
VDS = 200 V

5
@ Notes :
400 C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 8.1 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U234A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.05 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 8
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 6
1 100 µs
10
1 ms
10 ms 4
DC

100
@ Notes : 2
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-1 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2 @ Notes :
1. Zθ J C (t)=2.54 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U234A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U234A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR310
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.6Ω
♦ Lower Input Capacitance ID = 1.7 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Low RDS(ON): 2.815Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 1.7
ID A
Continuous Drain Current (TC=100°C) 1.1
IDM Drain Current-Pulsed (1) 6 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 116 mJ
IAR Avalanche Current (1) 1.7 A
EAR Repetitive Avalanche Energy (1) 2.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 26 W
Linear Derating Factor 0.21 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 4.76
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR310 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.53 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.6 Ω VGS=10V,ID=0.85A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.10 -- VDS=50V,ID=0.85A (4)
Ciss Input Capacitance -- 215 280
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 42 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 13 17
td(on) Turn-On Delay Time -- 11 30
VDD=200V,ID=2A,
tr Rise Time -- 15 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 38 90
See Fig 13 (4) (5)
tf Fall Time -- 13 35
Qg Total Gate Charge -- 10 14 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 1.7 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 6 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=1.7A,VGS=0V
trr Reverse Recovery Time -- 224 -- ns TJ=25 °C,IF=2A
Qrr Reverse Recovery Charge -- 0.87 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=70mH, IAS=1.7A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2A, di/dt ≤ 80A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR310
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

100

ID , Drain Current [A]

6.0 V 100
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

10-1 10-1
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-2 -2
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

6 VGS = 10 V
100
RDS(on) , [ Ω ]

VGS = 20 V 10-1

2
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0 10-2
0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
400
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

300
Capacitance [pF]

C iss VDS = 320 V

200
5
@ Notes :
C oss 1. VGS = 0 V
100 2. f = 1 MHz
C rss
@ Notes : ID = 2.0 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR310 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.0
Operation in This Area
101 is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

1.5
100 µs
1 ms
100 10 ms
DC 1.0

10-1 @ Notes : 0.5

1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

1. Zθ J C (t)=4.76 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1 0.01
single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR310
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR310 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U310A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.6Ω
♦ Lower Input Capacitance ID = 1.7 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Low RDS(ON): 2.815Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 1.7
ID A
Continuous Drain Current (TC=100°C) 1.1
IDM Drain Current-Pulsed (1) 6 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 116 mJ
IAR Avalanche Current (1) 1.7 A
EAR Repetitive Avalanche Energy (1) 2.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 26 W
Linear Derating Factor 0.21 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 4.76
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U310A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.53 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.6 Ω VGS=10V,ID=0.85A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 1.10 -- VDS=50V,ID=0.85A (4)
Ciss Input Capacitance -- 215 280
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 42 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 13 17
td(on) Turn-On Delay Time -- 11 30
VDD=200V,ID=2A,
tr Rise Time -- 15 40
ns RG=24Ω
td(off) Turn-Off Delay Time -- 38 90
See Fig 13 (4) (5)
tf Fall Time -- 13 35
Qg Total Gate Charge -- 10 14 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 1.8 -- nC ID=2A
Qgd Gate-Drain ( Miller ) Charge -- 5.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 1.7 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 6 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=1.7A,VGS=0V
trr Reverse Recovery Time -- 224 -- ns TJ=25 °C,IF=2A
Qrr Reverse Recovery Charge -- 0.87 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=70mH, IAS=1.7A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2A, di/dt ≤ 80A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U310A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

100

ID , Drain Current [A]

6.0 V 100
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

10-1 10-1
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-2 -2
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

6 VGS = 10 V
100
RDS(on) , [ Ω ]

VGS = 20 V 10-1

2
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test
0 10-2
0 1 2 3 4 5 6 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
400
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

300
Capacitance [pF]

C iss VDS = 320 V

200
5
@ Notes :
C oss 1. VGS = 0 V
100 2. f = 1 MHz
C rss
@ Notes : ID = 2.0 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U310A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.0
Operation in This Area
101 is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

1.5
100 µs
1 ms
100 10 ms
DC 1.0

10-1 @ Notes : 0.5

1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2 @ Notes :

1. Zθ J C (t)=4.76 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
10- 1 0.01
single pulse t1
t2
θ

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U310A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U310A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR320
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.8Ω
♦ Lower Input Capacitance ID = 3.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 1.408Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 3.1
ID A
Continuous Drain Current (TC=100°C) 2
IDM Drain Current-Pulsed (1) 12 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 220 mJ
IAR Avalanche Current (1) 3.1 A
EAR Repetitive Avalanche Energy (1) 4.1 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 41 W
Linear Derating Factor 0.33 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.05
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR320 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.54 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.8 Ω VGS=10V,ID=1.55A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.27 -- VDS=50V,ID=1.55A (4)
Ciss Input Capacitance -- 385 500
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 60 70 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 27 33
td(on) Turn-On Delay Time -- 12 35
VDD=200V,ID=3.3A,
tr Rise Time -- 17 45
ns RG=18Ω
td(off) Turn-Off Delay Time -- 51 110
See Fig 13 (4) (5)
tf Fall Time -- 18 45
Qg Total Gate Charge -- 19 26 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=3.3A
Qgd Gate-Drain ( Miller ) Charge -- 11.1 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 12 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.1A,VGS=0V
trr Reverse Recovery Time -- 230 -- ns TJ=25°C,IF=3.3A
Qrr Reverse Recovery Charge -- 1.16 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=40mH, IAS=3.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 3.3A, di/dt ≤ 110A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR320
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1
10 VGS 101
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
150 oC
100 Bottom : 4.5 V

100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
5
1
10

IDR , Reverse Drain Current [A]

4
Drain-Source On-Resistance
RDS(on) , [ Ω ]

VGS = 10 V
3

100
2

VGS = 20 V
1 150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0 10-1
0 3 6 9 12 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
C iss
VDS = 200 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400 VDS = 320 V

5
C oss
200 @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 3.3 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR320 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
0 2
10 DC

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.05 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR320
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR320 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U320A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.8Ω
♦ Lower Input Capacitance ID = 3.1 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 1.408Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 3.1
ID A
Continuous Drain Current (TC=100°C) 2
IDM Drain Current-Pulsed (1) 12 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 220 mJ
IAR Avalanche Current (1) 3.1 A
EAR Repetitive Avalanche Energy (1) 4.1 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 41 W
Linear Derating Factor 0.33 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.05
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U320A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.54 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.8 Ω VGS=10V,ID=1.55A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.27 -- VDS=50V,ID=1.55A (4)
Ciss Input Capacitance -- 385 500
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 60 70 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 27 33
td(on) Turn-On Delay Time -- 12 35
VDD=200V,ID=3.3A,
tr Rise Time -- 17 45
ns RG=18Ω
td(off) Turn-Off Delay Time -- 51 110
See Fig 13 (4) (5)
tf Fall Time -- 18 45
Qg Total Gate Charge -- 19 26 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=3.3A
Qgd Gate-Drain ( Miller ) Charge -- 11.1 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 12 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=3.1A,VGS=0V
trr Reverse Recovery Time -- 230 -- ns TJ=25°C,IF=3.3A
Qrr Reverse Recovery Charge -- 1.16 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=40mH, IAS=3.1A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 3.3A, di/dt ≤ 110A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U320A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1
10 VGS 101
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
150 oC
100 Bottom : 4.5 V

100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
5
1
10

IDR , Reverse Drain Current [A]

4
Drain-Source On-Resistance
RDS(on) , [ Ω ]

VGS = 10 V
3

100
2

VGS = 20 V
1 150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0 10-1
0 3 6 9 12 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
C iss
VDS = 200 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400 VDS = 320 V

5
C oss
200 @ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz

@ Notes : ID = 3.3 A
00 0
10 101 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U320A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
0 2
10 DC

@ Notes :
10-1 1
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-2 0
10
100 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.05 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U320A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U320A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR330
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.0Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 0.765Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 347 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 4.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 48 W
Linear Derating Factor 0.38 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.6
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR330 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.52 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.0 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.71 -- VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 675 880
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 43 52
td(on) Turn-On Delay Time -- 15 40
VDD=200V,ID=5.5A,
tr Rise Time -- 18 50
ns RG=12Ω
td(off) Turn-Off Delay Time -- 62 140
See Fig 13 (4) (5)
tf Fall Time -- 22 60
Qg Total Gate Charge -- 32 42 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 4.6 -- nC ID=5.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 259 -- ns TJ=25°C,IF=5.5A
Qrr Reverse Recovery Charge -- 1.81 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 5.5A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR330
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
101 10 V 101
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V 150 oC

100
100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
-1
10 2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5

IDR , Reverse Drain Current [A]

101
2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5

1.0 100

VGS = 20 V

0.5 @ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0.0 10-1
0 5 10 15 20 25 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
C iss Crss= Cgd 10
800
VGS , Gate-Source Voltage [V]

VDS = 200 V
Capacitance [pF]

600 VDS = 320 V

400 @ Notes : 5
C oss 1. VGS = 0 V
2. f = 1 MHz

200 C rss

@ Notes : ID = 5.5 A
00 0
10 101 0 5 10 15 20 25 30 35
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR330 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.75 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs
100 µs
1 ms
10 ms 3

100 DC

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=2.6 o C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR330
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR330 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U330A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.0Ω
♦ Lower Input Capacitance ID = 4.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
♦ Lower RDS(ON): 0.765Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 4.5
ID A
Continuous Drain Current (TC=100°C) 2.9
IDM Drain Current-Pulsed (1) 18 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 347 mJ
IAR Avalanche Current (1) 4.5 A
EAR Repetitive Avalanche Energy (1) 4.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 48 W
Linear Derating Factor 0.38 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.6
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U330A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.52 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.0 Ω VGS=10V,ID=2.25A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.71 -- VDS=50V,ID=2.25A (4)
Ciss Input Capacitance -- 675 880
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 43 52
td(on) Turn-On Delay Time -- 15 40
VDD=200V,ID=5.5A,
tr Rise Time -- 18 50
ns RG=12Ω
td(off) Turn-Off Delay Time -- 62 140
See Fig 13 (4) (5)
tf Fall Time -- 22 60
Qg Total Gate Charge -- 32 42 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 4.6 -- nC ID=5.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 18 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 259 -- ns TJ=25°C,IF=5.5A
Qrr Reverse Recovery Charge -- 1.81 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=4.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 5.5A, di/dt ≤ 140A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U330A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
101 10 V 101
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V 150 oC

100
100

25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
-1
10 2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.5

IDR , Reverse Drain Current [A]

101
2.0
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

1.5

1.0 100

VGS = 20 V

0.5 @ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test
0.0 10-1
0 5 10 15 20 25 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
C iss Crss= Cgd 10
800
VGS , Gate-Source Voltage [V]

VDS = 200 V
Capacitance [pF]

600 VDS = 320 V

400 @ Notes : 5
C oss 1. VGS = 0 V
2. f = 1 MHz

200 C rss

@ Notes : ID = 5.5 A
00 0
10 101 0 5 10 15 20 25 30 35
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U330A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.75 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 5
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs
100 µs
1 ms
10 ms 3

100 DC

10-1 @ Notes :
1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=2.6 o C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U330A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U330A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR420
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.3 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 2.000Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.3
ID A
Continuous Drain Current (TC=100°C) 1.5
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 206 mJ
IAR Avalanche Current (1) 2.3 A
EAR Repetitive Avalanche Energy (1) 4.1 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 41 W
Linear Derating Factor 0.33 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.05
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR420 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.15A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.05 -- VDS=50V,ID=1.15A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.3A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=70mH, IAS=2.3A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR420
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR420 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101 2.0
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms
1.5
10 ms
100
DC
1.0

-1 @ Notes :
10
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.05 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR420
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR420 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U420A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 3.0Ω
♦ Lower Input Capacitance ID = 2.3 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 2.000Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 2.3
ID A
Continuous Drain Current (TC=100°C) 1.5
IDM Drain Current-Pulsed (1) 8 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 206 mJ
IAR Avalanche Current (1) 2.3 A
EAR Repetitive Avalanche Energy (1) 4.1 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 41 W
Linear Derating Factor 0.33 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.05
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U420A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 3.0 Ω VGS=10V,ID=1.15A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 2.05 -- VDS=50V,ID=1.15A (4)
Ciss Input Capacitance -- 390 510
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 50 60 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 22 26
td(on) Turn-On Delay Time -- 12 35
VDD=250V,ID=2.5A,
tr Rise Time -- 15 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 55 120
See Fig 13 (4) (5)
tf Fall Time -- 17 45
Qg Total Gate Charge -- 19 26 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 2.6 -- nC ID=2.5A
Qgd Gate-Drain ( Miller ) Charge -- 10 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 8 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=2.3A,VGS=0V
trr Reverse Recovery Time -- 235 -- ns TJ=25°C,IF=2.5A
Qrr Reverse Recovery Charge -- 1.2 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=70mH, IAS=2.3A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 2.5A, di/dt ≤ 100A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U420A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 100
100 5.0 V
Bottom : 4.5 V

150 oC

10-1
25 oC @ Notes :
10-1 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-2
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
6

IDR , Reverse Drain Current [A]

VGS = 10 V
Drain-Source On-Resistance

100
RDS(on) , [ Ω ]

VGS = 20 V
2 10-1
@ Notes :
1. VGS = 0 V
150 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC 25 oC
0 10-2
0 2 4 6 8 10 0.2 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss VDS = 250 V
VGS , Gate-Source Voltage [V]
Capacitance [pF]

400
VDS = 400 V

5
200 @ Notes :
C oss 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 2.5 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U420A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
2.5
Operation in This Area
is Limited by R DS(on)
101 2.0
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
1 ms
1.5
10 ms
100
DC
1.0

-1 @ Notes :
10
1. TC = 25 oC 0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0 0.0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.05 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
-1 0.02
10
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U420A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U420A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR430
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 3.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 1.169Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 3.5
ID A
Continuous Drain Current (TC=100°C) 2.2
IDM Drain Current-Pulsed (1) 14 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 340 mJ
IAR Avalanche Current (1) 3.5 A
EAR Repetitive Avalanche Energy (1) 4.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 48 W
Linear Derating Factor 0.38 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.6
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR430 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.12 -- VDS=50V,ID=1.75A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 14 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=3.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=3.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR430
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR430 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
100 DC 2

10-1 @ Notes : 1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=2.6 o C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR430
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR430 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFR/U430A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 1.5Ω
♦ Lower Input Capacitance ID = 3.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
D-PAK I-PAK
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
♦ Lower RDS(ON): 1.169Ω (Typ.) 2

1
1
2
3 3

1. Gate 2. Drain 3. Source

Absolute Maximum Ratings
Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 3.5
ID A
Continuous Drain Current (TC=100°C) 2.2
IDM Drain Current-Pulsed (1) 14 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 340 mJ
IAR Avalanche Current (1) 3.5 A
EAR Repetitive Avalanche Energy (1) 4.8 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TA=25°C) * 2.5 W
PD Total Power Dissipation (TC=25°C) 48 W
Linear Derating Factor 0.38 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
°C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 2.6
RθJA Junction-to-Ambient * -- 50 °C/W
RθJA Junction-to-Ambient -- 110
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFR/U430A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.61 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 3.12 -- VDS=50V,ID=1.75A (4)
Ciss Input Capacitance -- 690 900
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 85 100 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 15 40
VDD=250V,ID=4.5A,
tr Rise Time -- 16 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 66 140
See Fig 13 (4) (5)
tf Fall Time -- 22 55
Qg Total Gate Charge -- 33 43 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 4.4 -- nC ID=4.5A
Qgd Gate-Drain ( Miller ) Charge -- 16.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 3.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 14 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=3.5A,VGS=0V
trr Reverse Recovery Time -- 285 -- ns TJ=25°C,IF=4.5A
Qrr Reverse Recovery Charge -- 2.0 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=50mH, IAS=3.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 4.5A, di/dt ≤ 130A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFR/U430A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
1 VGS
10 101
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V 150 oC
Bottom : 4.5 V
100
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
10-1 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4

101

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

3
RDS(on) , [ Ω ]

VGS = 10 V

2
100

VGS = 20 V
1
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test
0 10-1
0 4 8 12 16 0.4 0.6 0.8 1.0 1.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

750 VDS = 250 V

Capacitance [pF]

VDS = 400 V

500
5
C oss @ Notes :
1. VGS = 0 V
250 2. f = 1 MHz
C rss

@ Notes : ID = 4.5 A
00 1
0
10 10 0 10 20 30 40
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFR/U430A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.25 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 4
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

101 10 µs 3
100 µs
1 ms
10 ms
100 DC 2

10-1 @ Notes : 1
1. TC = 25 oC
2. TJ = 150 oC
3. Single Pulse
10-2 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
0.1 1. Zθ J C (t)=2.6 o C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM
single pulse
t1
t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFR/U430A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFR/U430A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 IRFR9024
August 1999
DISTRIBUTION GROUP*

IRFR9024
P-Channel Enhancement Mode Field Effect Transistor

General Description Features

This P-Channel MOSFET has been designed specifically • -8.8 A, -60 V. RDS(ON) = 0.28 Ω @ VGS = -10 V
to improve the overall efficiency of DC/DC converters
using either synchronous or conventional switching • Low gate charge.
PWM controllers. • Fast switching speed.

These MOSFETs feature faster switching and lower • High performance technology for low RDS(ON).
gate charge than other MOSFETs with comparable
RDS(ON) specifications.

The result is a MOSFET that is easy and safer to drive

(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.

'
* *

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Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the drain tab.
RθJC is guaranteed by design while RθCA is determined by the user's board design.

a) RθJA= 38oC/W when mounted on a b) RθJA= 96oC/W when mounted on a

1 in2 pad of 2oz copper. minimum pad.

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%

IRFR9024 Rev. A
TO-252 Tape and Reel Data and Package Dimensions

D-PAK (TO-252) Packaging

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Packaging Description:
TO-252 parts are shipped in tape. The carrier tape is
EL ECT ROST AT IC
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Antistatic Cover Tape These reeled parts in standard option are shipped with
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Weight per unit (gm) 0.300
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F63TNR Label sample

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Cover Tape
Components
Trailer Tape Leader Tape
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80 empty pockets 210 empty pockets

July 1999, Rev. A

TO-252 Tape and Reel Data and Package Dimensions
D-PAK (TO-252) Embossed Carrier
Tape Configuration: Figure 3.0 P0 D0
T
E1

K0 W
E2
Wc B0

Tc
A0 P1 D1

User Direction of Feed

Dimensions are in millimeter

Pkg type A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

TO252 6.90 10.50 16.0 1.55 1.5 1.75 14.25 7.50 8.0 4.0 2.65 0.30 13.0 0.06
(24mm) +/-0.10 +/-0.10 +/-0.3 +/-0.05 +/-0.10 +/-0.10 min +/-0.10 +/-0.1 +/-0.1 +/-0.10 +/-0.05 +/-0.3 +/-0.02

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C). 0.9mm
10 deg maximum maximum

Typical
component
cavity 0.9mm
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10 deg maximum component rotation

Typical
Sketch A (Side or Front Sectional View) component Sketch C (Top View)
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Component Rotation Component lateral movement
Sketch B (Top View)
D-PAK (TO-252) Reel Component Rotation

Configuration: Figure 4.0

W1 Measured at Hub

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B Min

Dim C

Dim A
max Dim N Dim D
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Reel
Tape Size Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)
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July 1999, Rev. A

TO-252 Tape and Reel Data and Package Dimensions

TO-252 (FS PKG Code AA)

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September 1999, Rev. A

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ TinyLogic™

CoolFET™ MICROWIRE™ UHC™
CROSSVOLT™ POP™ VCX™
E2CMOSTM PowerTrench 
FACT™ QFET™
FACT Quiet Series™ QS™
FAST® Quiet Series™
FASTr™ SuperSOT™-3
GTO™ SuperSOT™-6
HiSeC™ SuperSOT™-8
DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS140A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.052 Ω
Lower Input Capacitance ID = 23 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-3PF
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.041 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
23
ID A
Continuous Drain Current (TC=100 C) Ο
16.2
IDM Drain Current-Pulsed O
1 120 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 529 mJ
IAR Avalanche Current O1 23 A
EAR Repetitive Avalanche Energy O1 7.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
72 W
PD
Linear Derating Factor 0.48 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 2.08 Ο
C /W
R θJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS140A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.052 Ω VGS=10V,ID=11.5A O
4
On-State Resistance
gfs Forward Transconductance -- 20.15 -- Ω VDS=40V,ID=11.5A O
4

Ciss Input Capacitance -- 1320 1710

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 325 380 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 148 170
td(on) Turn-On Delay Time -- 18 50
VDD=50V,ID=28A,
tr Rise Time -- 18 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 90 180
tf --
See Fig 13 O
4 O
5
Fall Time 56 120
Qg Total Gate Charge -- 60 78 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 10.8 -- nC ID=28A
Qgd Gate-Drain(“Miller”) Charge -- 27.9 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 23 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 120 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=23A,VGS=0V
trr Reverse Recovery Time -- 132 -- ns Ο
TJ=25 C ,IF=28A
Qrr Reverse Recovery Charge -- 0.63 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1.5mH, I AS=23A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 28A, di/dt <_ 400A/ µs, V DD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS140A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V 175 oC
5.0 V
Bottom : 4.5 V
101
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
1. 250 µs Pulse Test
3. 250 µs Pulse Test
100 2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.08
102
IDR , Reverse Drain Current

0.06 VGS = 10 V
RDS(on) , [Ω]

0.04 101

VGS = 20 V
0.02
@ Notes :
175 oC
1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 100
0 30 60 90 120 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

2000 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

1500
C oss

1000 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
500

@ Notes : ID =28.0 A
00 0
10 101 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS140A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 14.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
[A]

[A]

Operation in This Area

is Limited by R DS(on)
20
ID , Drain Current

ID , Drain Current

102 10 µs
100 µs
1 ms 15
10 ms
101
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100 D=0.5

0.2 @ Notes :
1. Zθ J C (t)=2.08 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
10- 1
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS140A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS140A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS150A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.04 Ω
Lower Input Capacitance ID = 31 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-3PF
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.032 Ω (Typ.) 1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
31
ID A
Continuous Drain Current (TC=100 C) Ο
21.9
IDM Drain Current-Pulsed O
1 170 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 641 mJ
IAR Avalanche Current O1 31 A
EAR Repetitive Avalanche Energy O1 10 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
100 W
PD
Linear Derating Factor 0.67 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.5 Ο
C /W
R θJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS150A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C Ο
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=15.5A O
4
On-State Resistance
gfs Forward Transconductance -- 27.3 -- Ω VDS=40V,ID=15.5A O
4

Ciss Input Capacitance -- 1750 2270

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 420 485 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 185 215
td(on) Turn-On Delay Time -- 17 50
VDD=50V,ID=40A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 80 160
tf -- 100
See Fig 13 O
4 O
5
Fall Time 45
Qg Total Gate Charge -- 75 97 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 13.2 -- nC ID=40A
Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 31 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 170 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.6 V Ο
TJ=25 C ,IS=31A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns Ο
TJ=25 C ,IF=40A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=1mH, I AS=31A, V DD=25V, R G=27 Ω , Starting T J =25 C
o
O2

O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS150A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
102 Top : 15V 102
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V 175 oC
Bottom : 4.5 V
1
10
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
100 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.06
IDR , Reverse Drain Current

102
0.05
VGS = 10 V
RDS(on) , [Ω]

0.04

0.03
101
VGS = 20 V
0.02

@ Notes :
0.01 175 oC
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 175 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

2000 VDS = 80 V
Capacitance

C oss

5
@ Notes :
1000 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID =40.0 A
00 0
10 101 0 10 20 30 40 50 60 70 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS150A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 20.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 40
[A]

[A]

Operation in This Area

is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

10 µs
102 30
100 µs
1 ms
10 ms
101 DC 20

@ Notes :
100 10
1. TC = 25 oC
o
2. TJ = 175 C
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.5 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

PDM
0.02
0.01 t1
single pulse t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS150A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS150A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS240A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.18 Ω
Lower Input Capacitance ID = 12.8 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-3PF
Lower RDS(ON) : 0.144 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 12.8
ID A
Continuous Drain Current (TC=100 oC) 8.1
IDM Drain Current-Pulsed O
1 80 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 328 mJ
IAR Avalanche Current O1 12.8 A
EAR Repetitive Avalanche Energy O1 7.3 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25oC ) 73 W
PD o
Linear Derating Factor 0.59 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 1.7
o
R θJA C/W
Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS240A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µ A
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.26 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µ A
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.18 Ω VGS=10V,ID=6.4A O
4
On-State Resistance
gfs Forward Transconductance -- 8.87 -- Ω VDS=40V,ID=6.4A O
4

Ciss Input Capacitance -- 1160 1500

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 210 250 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 94 110
td(on) Turn-On Delay Time -- 17 40
VDD=100V,ID=18A,
tr Rise Time -- 16 40
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 48 110
See Fig 13 4 O
tf Fall Time -- 24 60 O 5

Qg Total Gate Charge -- 44 58 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 10.4 -- nC ID=18A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 27.1 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 12.8 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 80 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC ,IS=12.8A,VGS=0V
trr Reverse Recovery Time -- 195 -- ns TJ=25oC ,IF=18A
Qrr Reverse Recovery Charge -- 1.35 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=3mH, I AS=12.8A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD<_ 18A, di/dt <_260A/ µs, VDD <_BVDSS , Starting T J =25 oC

O4 Pulse Test : Pulse Width = 250 µ s, Duty Cycle <_ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS240A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
101 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
@ Notes :
25 oC
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

VGS = 10 V
0.3
101
RDS(on) , [Ω]

0.2

100
VGS = 20 V
0.1
@ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 20 40 60 80 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss VDS = 100 V

1500
VDS = 160 V
Capacitance

1000

C oss 5
@ Notes :
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 18.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS240A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 9.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
[A]

[A]

Operation in This Area

is Limited by R DS(on)
102 12
ID , Drain Current

ID , Drain Current

10 µs
100 µs
1 ms 9
101
10 ms
DC
6

100 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 o C/W
1. Zθ J C (t)=1.7 Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05

PDM
Z JC(t) ,

0.02
0.01 t1
single pulse t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS240A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS240A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS244
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 10.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3PF
♦ Lower RDS(ON): 0.214Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 10.2
ID A
Continuous Drain Current (TC=100°C) 6.5
IDM Drain Current-Pulsed (1) 64 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 455 mJ
IAR Avalanche Current (1) 10.2 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.7
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS244 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=5.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.32 -- VDS=40V,ID=5.1A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 64 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10.2A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=10.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25 °C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS244
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS244 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
is Limited by R DS(on) 10
102
ID , Drain Current [A]

10 µs ID , Drain Current [A] 8

100 µs
1 ms
101
10 ms 6
DC
4
100 @ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.7 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
PDM
Z JC(t) ,

0.02
0.01 t1
single pulse t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS244
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS244 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS244A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.28Ω
♦ Lower Input Capacitance ID = 10.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3PF
♦ Lower RDS(ON): 0.214Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 10.2
ID A
Continuous Drain Current (TC=100°C) 6.5
IDM Drain Current-Pulsed (1) 64 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 455 mJ
IAR Avalanche Current (1) 10.2 A
EAR Repetitive Avalanche Energy (1) 7.3 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 73 W
PD
Linear Derating Factor 0.59 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.7
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS244A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.28 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.28 Ω VGS=10V,ID=5.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.32 -- VDS=40V,ID=5.1A (4)
Ciss Input Capacitance -- 1230 1600
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 180 210 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 17 50
VDD=125V,ID=14A,
tr Rise Time -- 17 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 74 160
See Fig 13 (4) (5)
tf Fall Time -- 32 80
Qg Total Gate Charge -- 46 61 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 9.3 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 19.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 64 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=10.2A,VGS=0V
trr Reverse Recovery Time -- 215 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 1.59 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=7mH, IAS=10.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25 °C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS244A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]

101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
-1 -1
10 10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.8

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.6 VGS = 10 V 101

RDS(on) , [ Ω ]

0.4

100

0.2 VGS = 20 V
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.0 10-1
0 15 30 45 60 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
C iss VDS = 125 V
VGS , Gate-Source Voltage [V]

1500
Capacitance [pF]

VDS = 200 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 14.0 A
00 0
10 101 0 10 20 30 40 50
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS244A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
is Limited by R DS(on) 10
102
ID , Drain Current [A]

10 µs ID , Drain Current [A] 8

100 µs
1 ms
101
10 ms 6
DC
4
100 @ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2
1. Zθ J C (t)=1.7 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
PDM
Z JC(t) ,

0.02
0.01 t1
single pulse t2
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS244A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS244A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS250A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.085 Ω
Lower Input Capacitance ID = 21.3 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-3PF
Low RDS(ON) : 0.071 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 21.3
ID o A
Continuous Drain Current (TC=100 C) 13.5
IDM Drain Current-Pulsed O
1 130 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 605 mJ
IAR Avalanche Current O1 21.3 A
EAR Repetitive Avalanche Energy O1 9 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 90 W
PD o
Linear Derating Factor 0.72 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.38 o
C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS250A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.085 Ω VGS=10V,ID=10.65A O
4
On-State Resistance
gfs Forward Transconductance -- 16.64 -- Ω VDS=40V,ID=10.65A O
4

Ciss Input Capacitance -- 2300 3000

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 410 475 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 200 230
td(on) Turn-On Delay Time -- 21 50
VDD=100V,ID=32A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 77 160
See Fig 13 4 O
tf Fall Time -- 38 90 O 5

Qg Total Gate Charge -- 95 123 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 18 -- nC ID=32A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 45.3 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 21.3 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 130 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=21.3A,VGS=0V
trr Reverse Recovery Time -- 203 -- ns TJ=25oC ,IF=32A
Qrr Reverse Recovery Charge -- 1.52 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=21.3A, V DD=50V, R G=27Ω, Starting T J =25 C
o
O2
_
O3 ISD <_ 32A, di/dt 320A/
< µs, V DD <
_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle <_ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS250A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 VGS 102
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
101
150 oC
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
100 1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
2
IDR , Reverse Drain Current

10

0.15
VGS = 10 V
RDS(on) , [Ω]

0.10
101

0.05 VGS = 20 V
150 oC @ Notes :
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

C iss
3000 VDS = 100 V
Capacitance

VDS = 160 V

2000
C oss 5
@ Notes :
1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 32.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS250A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 16.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
103 25
[A]

[A]

Operation in This Area

is Limited by R DS(on)
20
ID , Drain Current

ID , Drain Current

102
10 µs
100 µs
1 ms 15

101 10 ms
DC
10

@ Notes :
100
1. TC = 25 oC 5
2. TJ = 150 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
o
1. Zθ J C (t)=1.38 C/W Max.
0.1
2. Duty Factor, D=t1 /t2
10- 1
0.05 3. TJ M -TC =PD M *Z (t)
θJ C
Z JC(t) ,

0.02
PDM
0.01
single pulse t1
θ

t2
10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS250A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS250A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS254
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 16 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3PF
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 16
ID A
Continuous Drain Current (TC=100°C) 10.1
IDM Drain Current-Pulsed (1) 100 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 16 A
EAR Repetitive Avalanche Energy (1) 9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 90 W
PD
Linear Derating Factor 0.72 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.38
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS254 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=8A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 14.64 -- VDS=40V,ID=8A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 16 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 100 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=16A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=4mH, IAS=16A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS254
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
o
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS254 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

102 15
10 µs
100 µs
1 ms
101 10 ms 10
DC

100 @ Notes : 5
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-1 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.38 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
10- 1 0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS254
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS254 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS254A
FEATURES
BVDSS = 250 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.14Ω
♦ Lower Input Capacitance ID = 16 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 250V
TO-3PF
♦ Low RDS(ON): 0.108Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 250 V
Continuous Drain Current (TC=25°C) 16
ID A
Continuous Drain Current (TC=100°C) 10.1
IDM Drain Current-Pulsed (1) 100 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 640 mJ
IAR Avalanche Current (1) 16 A
EAR Repetitive Avalanche Energy (1) 9 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.8 V/ns
Total Power Dissipation (TC=25°C) 90 W
PD
Linear Derating Factor 0.72 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.38
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS254A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 250 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.27 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=250V
IDSS Drain-to-Source Leakage Current µA VDS=200V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.14 Ω VGS=10V,ID=8A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 14.64 -- VDS=40V,ID=8A (4)
Ciss Input Capacitance -- 2300 3000
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 345 400 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 155 180
td(on) Turn-On Delay Time -- 21 60
VDD=125V,ID=25A,
tr Rise Time -- 20 60
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 86 190
See Fig 13 (4) (5)
tf Fall Time -- 40 100
Qg Total Gate Charge -- 88 114 VDS=200V,VGS=10V,
Qgs Gate-Source Charge -- 16 -- nC ID=25A
Qgd Gate-Drain ( Miller ) Charge -- 35.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 16 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 100 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=16A,VGS=0V
trr Reverse Recovery Time -- 255 -- ns TJ=25°C,IF=25A
Qrr Reverse Recovery Charge -- 2.3 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=4mH, IAS=16A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 25A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS254A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15 V
10 V
8.0 V
7.0 V
ID , Drain Current [A]

ID , Drain Current [A]

6.0 V
5.5 V 101
5.0 V
101 Bottom : 4.5 V

150 oC

100
@ Notes :
25 oC 1. VGS = 0 V
100 @ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
-1 0 1 10-1
10 10 10 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.25 102

IDR , Reverse Drain Current [A]

0.20
Drain-Source On-Resistance

VGS = 10 V
RDS(on) , [ Ω ]

101
0.15

0.10
VGS = 20 V 100

0.05 @ Notes :
1. VGS = 0 V
150 oC
o
@ Note : TJ = 25 C 2. 250 µs Pulse Test
25 oC
0.00 10-1
0 20 40 60 80 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 50 V
Crss= Cgd 10
VDS = 125 V
VGS , Gate-Source Voltage [V]

3000 C iss
Capacitance [pF]

VDS = 200 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 25.0 A
00 0
10 101 0 20 40 60 80 100
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS254A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage 1.2 3.0

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 12.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [oC] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

102 15
10 µs
100 µs
1 ms
101 10 ms 10
DC

100 @ Notes : 5
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
-1 0
10
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.38 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
10- 1 0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS254A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS254A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS340
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3PF
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 44 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 549 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 8.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 85 W
PD
Linear Derating Factor 0.68 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.46
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS340 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.05 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 44 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS340
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS340 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10

Operation in This Area

102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
6
101 1 ms
10 ms
DC 4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.46 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

PDM
0.02
t1
0.01
t2
single pulse
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS340
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS340 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS340A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.55Ω
♦ Lower Input Capacitance ID = 8 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3PF
♦ Lower RDS(ON): 0.437Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 8
ID A
Continuous Drain Current (TC=100°C) 5.1
IDM Drain Current-Pulsed (1) 44 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 549 mJ
IAR Avalanche Current (1) 8 A
EAR Repetitive Avalanche Energy (1) 8.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 85 W
PD
Linear Derating Factor 0.68 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.46
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS340A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.50 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.55 Ω VGS=10V,ID=4A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 7.05 -- VDS=50V,ID=4A (4)
Ciss Input Capacitance -- 1180 1530
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 175 205 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 80 95
td(on) Turn-On Delay Time -- 18 50
VDD=200V,ID=10A,
tr Rise Time -- 21 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 78 170
See Fig 13 (4) (5)
tf Fall Time -- 28 65
Qg Total Gate Charge -- 58 75 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 8.1 -- nC ID=10A
Qgd Gate-Drain ( Miller ) Charge -- 31.3 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 8 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 44 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=8A,VGS=0V
trr Reverse Recovery Time -- 315 -- ns TJ=25°C,IF=10A
Qrr Reverse Recovery Charge -- 2.84 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=8A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 10A, di/dt ≤ 170A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS340A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 101 7.0 V 101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.2

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.9 101
VGS = 10 V
RDS(on) , [ Ω ]

0.6

100
VGS = 20 V
0.3
@ Notes :
150 oC 1. VGS = 0 V
o o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 C
0.0 10-1
0 10 20 30 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
VDS = 80 V
Coss= Cds+ Cgd
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

1500 C iss
Capacitance [pF]

VDS = 320 V

1000
5
@ Notes :
C oss
1. VGS = 0 V
500 2. f = 1 MHz
C rss

@ Notes : ID = 10.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS340A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 5.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10

Operation in This Area

102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

10 µs
100 µs
6
101 1 ms
10 ms
DC 4

100 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.46 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

PDM
0.02
t1
0.01
t2
single pulse
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS340A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS340A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS350
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 11.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3PF
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 11.5
ID A
Continuous Drain Current (TC=100°C) 7.3
IDM Drain Current-Pulsed (1) 68 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1134 mJ
IAR Avalanche Current (1) 11.5 A
EAR Repetitive Avalanche Energy (1) 9.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 92 W
PD
Linear Derating Factor 0.74 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.35
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS350 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=5.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 9.75 -- VDS=50V,ID=5.75A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 11.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 68 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=11.5A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=11.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS350
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS350 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
is Limited by R DS(on)
102 10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 8
100 µs
1 1 ms
10
10 ms 6
DC
4
100 @ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.35 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
10- 1
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS350
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1
&
+
$
1(/
IRFS350 2
3
502
)
6:(
(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS350A
FEATURES
BVDSS = 400 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.3Ω
♦ Lower Input Capacitance ID = 11.5 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 400V
TO-3PF
♦ Low RDS(ON): 0.254Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 400 V
Continuous Drain Current (TC=25°C) 11.5
ID A
Continuous Drain Current (TC=100°C) 7.3
IDM Drain Current-Pulsed (1) 68 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1134 mJ
IAR Avalanche Current (1) 11.5 A
EAR Repetitive Avalanche Energy (1) 9.2 mJ
dv/dt Peak Diode Recovery dv/dt (3) 4.0 V/ns
Total Power Dissipation (TC=25°C) 92 W
PD
Linear Derating Factor 0.74 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.35
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS350A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 400 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.46 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=400V
IDSS Drain-to-Source Leakage Current µA VDS=320V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.3 Ω VGS=10V,ID=5.75A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 9.75 -- VDS=50V,ID=5.75A (4)
Ciss Input Capacitance -- 2140 2780
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 305 350 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 134 155
td(on) Turn-On Delay Time -- 20 50
VDD=200V,ID=17A,
tr Rise Time -- 22 55
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 100 210
See Fig 13 (4) (5)
tf Fall Time -- 32 75
Qg Total Gate Charge -- 101 131 VDS=320V,VGS=10V,
Qgs Gate-Source Charge -- 14 -- nC ID=17A
Qgd Gate-Drain ( Miller ) Charge -- 51.5 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 11.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 68 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.5 V TJ=25°C,IS=11.5A,VGS=0V
trr Reverse Recovery Time -- 385 -- ns TJ=25°C,IF=17A
Qrr Reverse Recovery Charge -- 4.85 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=15mH, IAS=11.5A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 17A, di/dt ≤ 250A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS350A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

101 6.0 V 101
5.5 V
5.0 V
Bottom : 4.5 V

150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
- 55 oC
2. TC = 25 oC
10-1 -1 10-1
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60
Drain-Source On-Resistance

VGS = 10 V

IDR , Reverse Drain Current [A]

0.45
101
RDS(on) , [ Ω ]

0.30

VGS = 20 V 100
0.15
@ Notes :
150 oC 1. VGS = 0 V
o 2. 250 µs Pulse Test
@ Note : TJ = 25 C 25 oC
0.00 10-1
0 10 20 30 40 50 60 70 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 80 V
Crss= Cgd 10
VDS = 200 V
VGS , Gate-Source Voltage [V]

3000
Capacitance [pF]

C iss
VDS = 320 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss

@ Notes : ID = 17.0 A
00 1
0
10 10 0 20 40 60 80 100 120
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS350A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 8.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
Operation in This Area
is Limited by R DS(on)
102 10
ID , Drain Current [A]

ID , Drain Current [A]

10 µs 8
100 µs
1 1 ms
10
10 ms 6
DC
4
100 @ Notes :
1. TC = 25 oC
2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.35 o C/W Max.
0.1
2. Duty Factor, D=t1 /t2
10- 1
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01 t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS350A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS350A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS440
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 6.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3PF
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 6.2
ID A
Continuous Drain Current (TC=100°C) 3.9
IDM Drain Current-Pulsed (1) 34 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 641 mJ
IAR Avalanche Current (1) 6.2 A
EAR Repetitive Avalanche Energy (1) 8.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 85 W
PD
Linear Derating Factor 0.68 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.46
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS440 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=3.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 5.73 -- VDS=50V,ID=3.1A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 6.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 34 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=6.2A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=6.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS440
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS440 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
8

Operation in This Area

102 is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

6
10 µs
100 µs
101 1 ms
10 ms 4
DC

100 @ Notes : 2
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.46 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

PDM
0.02
t1
0.01
t2
single pulse
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS440
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS440 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS440A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.85Ω
♦ Lower Input Capacitance ID = 6.2 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3PF
♦ Lower RDS(ON): 0.638Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 6.2
ID A
Continuous Drain Current (TC=100°C) 3.9
IDM Drain Current-Pulsed (1) 34 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 641 mJ
IAR Avalanche Current (1) 6.2 A
EAR Repetitive Avalanche Energy (1) 8.5 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 85 W
PD
Linear Derating Factor 0.68 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.46
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS440A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.66 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.85 Ω VGS=10V,ID=3.1A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 5.73 -- VDS=50V,ID=3.1A (4)
Ciss Input Capacitance -- 1190 1550
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 66 75
td(on) Turn-On Delay Time -- 18 45
VDD=250V,ID=8A,
tr Rise Time -- 22 55
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 83 175
See Fig 13 (4) (5)
tf Fall Time -- 30 70
Qg Total Gate Charge -- 57 74 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 7.5 -- nC ID=8A
Qgd Gate-Drain ( Miller ) Charge -- 28.4 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 6.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 34 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=6.2A,VGS=0V
trr Reverse Recovery Time -- 370 -- ns TJ=25°C,IF=8A
Qrr Reverse Recovery Charge -- 3.9 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=30mH, IAS=6.2A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 8A, di/dt ≤ 160A/µs, VDD ≤ BVDSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS440A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
101 8.0 V 101
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100
100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
2.0

IDR , Reverse Drain Current [A]

101
Drain-Source On-Resistance

1.5
RDS(on) , [ Ω ]

VGS = 10 V

1.0

100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C o
25 C 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 25 30 0.2 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
10 VDS = 100 V
Crss= Cgd
VGS , Gate-Source Voltage [V]

1500 VDS = 250 V

C iss
Capacitance [pF]

VDS = 400 V

1000
5
@ Notes :
C oss 1. VGS = 0 V
500 2. f = 1 MHz
C rss
@ Notes : ID = 8.0 A
00 1
0
10 10 0 10 20 30 40 50 60
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS440A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
8

Operation in This Area

102 is Limited by R DS(on)
ID , Drain Current [A]

ID , Drain Current [A]

6
10 µs
100 µs
101 1 ms
10 ms 4
DC

100 @ Notes : 2
1. TC = 25 oC
o
2. TJ = 150 C
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

@ Notes :
0.2 1. Zθ J C (t)=1.46 o C/W Max.
2. Duty Factor, D=t1 /t2
0.1
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.05
Z JC(t) ,

PDM
0.02
t1
0.01
t2
single pulse
θ

10- 2 - 5
10 10- 4 10- 3 10- 2 10- 1 100 101
t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS440A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS440A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS450
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.4Ω
♦ Lower Input Capacitance ID = 9.6 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3PF
♦ Lower RDS(ON): 0.308Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 9.6
ID A
Continuous Drain Current (TC=100°C) 6.1
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1024 mJ
IAR Avalanche Current (1) 9.6 A
EAR Repetitive Avalanche Energy (1) 9.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 96 W
PD
Linear Derating Factor 0.77 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.3
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS450 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=4.8A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.96 -- VDS=50V,ID=4.8A (4)
Ciss Input Capacitance -- 2500 3250
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 295 340 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 130 150
td(on) Turn-On Delay Time -- 23 55
VDD=250V,ID=14A,
tr Rise Time -- 26 60
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 125 260
See Fig 13 (4) (5)
tf Fall Time -- 37 85
Qg Total Gate Charge -- 121 157 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 16.2 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 61 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=9.6A,VGS=0V
trr Reverse Recovery Time -- 437 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 5.5 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=9.6A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 230A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS450
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]
101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.0

IDR , Reverse Drain Current [A]

0.8
Drain-Source On-Resistance

101
RDS(on) , [ Ω ]

VGS = 10 V
0.6

0.4
100
VGS = 20 V
0.2 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 10 20 30 40 50 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

3000 VDS = 250 V

Capacitance [pF]

VDS = 400 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss
@ Notes : ID = 14.0 A
00 1
0
10 10 0 20 40 60 80 100 120 140
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS450 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

100 µs 10 µs
6
101 1 ms
10 ms
DC 4

0
10 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.3 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
10- 1
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS450
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS450 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS450A
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.4Ω
♦ Lower Input Capacitance ID = 9.6 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3PF
♦ Lower RDS(ON): 0.308Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 9.6
ID A
Continuous Drain Current (TC=100°C) 6.1
IDM Drain Current-Pulsed (1) 56 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1024 mJ
IAR Avalanche Current (1) 9.6 A
EAR Repetitive Avalanche Energy (1) 9.6 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 96 W
PD
Linear Derating Factor 0.77 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.3
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS450A 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.68 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=4.8A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 8.96 -- VDS=50V,ID=4.8A (4)
Ciss Input Capacitance -- 2500 3250
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 295 340 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 130 150
td(on) Turn-On Delay Time -- 23 55
VDD=250V,ID=14A,
tr Rise Time -- 26 60
ns RG=6.2Ω
td(off) Turn-Off Delay Time -- 125 260
See Fig 13 (4) (5)
tf Fall Time -- 37 85
Qg Total Gate Charge -- 121 157 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 16.2 -- nC ID=14A
Qgd Gate-Drain ( Miller ) Charge -- 61 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 9.6 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 56 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=9.6A,VGS=0V
trr Reverse Recovery Time -- 437 -- ns TJ=25°C,IF=14A
Qrr Reverse Recovery Charge -- 5.5 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=9.6A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 14A, di/dt ≤ 230A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS450A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
7.0 V
101
ID , Drain Current [A]
101

ID , Drain Current [A]

6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
150 oC

100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 -1 -1
10
10 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.0

IDR , Reverse Drain Current [A]

0.8
Drain-Source On-Resistance

101
RDS(on) , [ Ω ]

VGS = 10 V
0.6

0.4
100
VGS = 20 V
0.2 @ Notes :
1. VGS = 0 V
150 oC
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.0 10-1
0 10 20 30 40 50 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
4000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
Crss= Cgd 10
C iss
VGS , Gate-Source Voltage [V]

3000 VDS = 250 V

Capacitance [pF]

VDS = 400 V

2000
5
@ Notes :
C oss 1. VGS = 0 V
1000 2. f = 1 MHz
C rss
@ Notes : ID = 14.0 A
00 1
0
10 10 0 20 40 60 80 100 120 140
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS450A 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
10
Operation in This Area
102 is Limited by R DS(on)
8
ID , Drain Current [A]

ID , Drain Current [A]

100 µs 10 µs
6
101 1 ms
10 ms
DC 4

0
10 @ Notes :
1. TC = 25 oC 2
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2 @ Notes :
1. Zθ J C (t)=1.3 o C/W Max.
0.1 2. Duty Factor, D=t1 /t2
10- 1
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
t1
single pulse
t2
θ

10- 2

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS450A
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS450A 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 $GYDQFHG 3RZHU 026)(7 IRFS460
FEATURES
BVDSS = 500 V
♦ Avalanche Rugged Technology
♦ Rugged Gate Oxide Technology
RDS(on) = 0.25Ω
♦ Lower Input Capacitance ID = 12.4 A
♦ Improved Gate Charge
♦ Extended Safe Operating Area
♦ Lower Leakage Current: 10µA (Max.) @ VDS = 500V
TO-3PF
♦ Lower RDS(ON): 0.197Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 500 V
Continuous Drain Current (TC=25°C) 12.4
ID A
Continuous Drain Current (TC=100°C) 7.8
IDM Drain Current-Pulsed (1) 88 A
VGS Gate-to-Source Voltage ±30 V
EAS Single Pulsed Avalanche Energy (2) 1708 mJ
IAR Avalanche Current (1) 12.4 A
EAR Repetitive Avalanche Energy (1) 10 mJ
dv/dt Peak Diode Recovery dv/dt (3) 3.5 V/ns
Total Power Dissipation (TC=25°C) 100 W
PD
Linear Derating Factor 0.8 W/°C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering °C
TL 300
Purposes, 1/8 from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 1.25
°C/W
RθJA Junction-to-Ambient -- 40

Rev. B

©1999 Fairchild Semiconductor Corporation

 1&+$11(/
IRFS460 32:(5 026)(7

Electrical Characteristics (TC=25°C unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 500 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ Breakdown Voltage Temp. Coeff. -- 0.69 -- V/°C ID=250µA See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=500V
IDSS Drain-to-Source Leakage Current µA VDS=400V,TC=125°C
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.25 Ω VGS=10V,ID=6.2A (4)
On-State Resistance
Ω
gfs Forward Transconductance -- 13.38 -- VDS=50V,ID=6.2A (4)
Ciss Input Capacitance -- 3940 5120
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 465 535 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 215 250
td(on) Turn-On Delay Time -- 27 65
VDD=250V,ID=22A,
tr Rise Time -- 30 70
ns RG=5.3Ω
td(off) Turn-Off Delay Time -- 150 310
See Fig 13 (4) (5)
tf Fall Time -- 43 95
Qg Total Gate Charge -- 182 236 VDS=400V,VGS=10V,
Qgs Gate-Source Charge -- 26 -- nC ID=22A
Qgd Gate-Drain ( Miller ) Charge -- 79.6 -- See Fig 6 & Fig 12 (4) (5)

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 12.4 Integral reverse pn-diode
A
ISM Pulsed-Source Current (1) -- -- 88 in the MOSFET
VSD Diode Forward Voltage (4) -- -- 1.4 V TJ=25°C,IS=12.4A,VGS=0V
trr Reverse Recovery Time -- 528 -- ns TJ=25°C,IF=22A
Qrr Reverse Recovery Charge -- 8.35 -- µC diF/dt=100A/µs (4)

Notes;
(1) Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature
(2) L=20mH, IAS=12.4A, VDD=50V, RG=27Ω, Starting TJ =25°C
(3) ISD ≤ 22A, di/dt ≤ 300A/µs, VDD ≤ BV DSS , Starting TJ =25°C
(4) Pulse Test: Pulse Width = 250µs, Duty Cycle ≤ 2%
(5) Essentially Independent of Operating Temperature
 1&+$11(/
32:(5 026)(7 IRFS460
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15 V
10 V
8.0 V
ID , Drain Current [A] 7.0 V

ID , Drain Current [A]

6.0 V
5.5 V 101
101 5.0 V
Bottom : 4.5 V

150 oC

100
25 oC @ Notes :
0
10 1. VGS = 0 V
@ Notes : 2. VDS = 50 V
1. 250 µs Pulse Test
2. TC = 25 oC - 55 oC 3. 250 µs Pulse Test
-1
10
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
0.60

IDR , Reverse Drain Current [A]

Drain-Source On-Resistance

0.45
101
RDS(on) , [ Ω ]

VGS = 10 V

0.30

100
VGS = 20 V
0.15
@ Notes :
o
1. VGS = 0 V
150 C
@ Note : TJ = 25 oC 2. 250 µs Pulse Test
25 oC
0.00 -1
10
0 15 30 45 60 75 90 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
6000
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd VDS = 100 V
C iss Crss= Cgd 10
VGS , Gate-Source Voltage [V]

VDS = 250 V
Capacitance [pF]

4000
VDS = 400 V

5
2000 C oss @ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 22.0 A
00 1
0
10 10 0 50 100 150 200
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 1&+$11(/
IRFS460 32:(5 026)(7

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 11.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
15
Operation in This Area
is Limited by R DS(on)
12
ID , Drain Current [A]

ID , Drain Current [A]

102
10 µs
100 µs 9
1 ms
101
10 ms
DC 6

100 @ Notes :
1. TC = 25 oC 3
2. TJ = 150 oC
3. Single Pulse
10-1 0 0
10 101 102 103 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [oC]

Fig 11. Thermal Response

Thermal Response

100
D=0.5

0.2
@ Notes :
0.1 1. Zθ J C (t)=1.25 o C/W Max.
10- 1 2. Duty Factor, D=t1 /t2
0.05 3. TJ M -TC =PD M *Zθ J C (t)
Z JC(t) ,

0.02 PDM
0.01
single pulse t1
t2
θ

-2
10

10- 5 10- 4 10- 3 10- 2 10- 1 100 101

t1 , Square Wave Pulse Duration [sec]
 1&+$11(/
32:(5 026)(7 IRFS460
Fig 12. Gate Charge Test Circuit & Waveform

Current Regulator
VGS
Same Type
50kΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (IG) Current Sampling (ID)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated VDS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 1&+$11(/
IRFS460 32:(5 026)(7

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS dv/dt controlled by RG

IS controlled by Duty Factor D

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™
CoolFET™ MICROWIRE™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS510A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 4.5 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220F
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.289 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C) 4.5
ID Ο
A
Continuous Drain Current (TC=100 C) 3.2
IDM Drain Current-Pulsed O
1 20 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 54 mJ
IAR Avalanche Current O1 4.5 A
EAR Repetitive Avalanche Energy O1 2.1 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Ο
Total Power Dissipation (TC=25 C) 21 W
PD
Linear Derating Factor 0.14 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
Rθ JC Junction-to-Case -- 6.98 Ο
C /W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS510A POWER MOSFET

Electrical Characteristics (TC=25 Cunless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C ID=250 µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA
-- -- 100 VDS=80V,TC=150 C Ο

Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=2.25A O
4
On-State Resistance
gfs Forward Transconductance -- 3.29 -- Ω VDS=40V,ID=2.25A O
4
Ciss Input Capacitance -- 190 240
VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 21 25
td(on) Turn-On Delay Time -- 10 30
VDD=50V,ID=5.6A,
tr Rise Time -- 14 40
ns RG=24 Ω
td(off) Turn-Off Delay Time -- 28 70
See Fig 13 4 O
O 5
tf Fall Time -- 18 50
Qg Total Gate Charge -- 8.5 12 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 1.6 -- nC ID=5.6A
Qgd Gate-Drain(“Miller”) Charge -- 4.1 -- See Fig 6 & Fig 12 4 O
O 5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 20 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C,IS=4.5A,VGS=0V
trr Reverse Recovery Time -- 85 -- ns Ο
TJ=25 C,IF=5.6A
Qrr Reverse Recovery Charge -- 0.23 -- µC diF/dt=100A/ µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=4mH, I AS=5.6A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 5.6A, di/dt <_ 250A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS510A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
101 10 V 101
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100 100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.8
IDR , Reverse Drain Current

101

0.6 VGS = 10 V
RDS(on) , [Ω]

0.4
100

VGS = 20 V
0.2
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 5 10 15 20 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
350
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

280 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

210
C oss

140 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
70

@ Notes : ID = 5.6 A
00 0
10 101 0 2 4 6 8 10
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS510A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.8 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
5
[A]

[A]

Operation in This Area

is Limited by R DS(on)
100 µs 4
ID , Drain Current

ID , Drain Current

101 1 ms
10 ms
3
100 ms
DC
2
0
10
@ Notes :
1. TC = 25 oC 1
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

101
Thermal Response

D=0.5

0.2
100
0.1
@ Notes :
1. Zθ J C (t)=6.98 o C/W Max.
0.05
2. Duty Factor, D=t1 /t2
0.02 3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.01
Z JC(t) ,

PDM
single pulse
t1
θ

t2

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS510A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS510A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS520A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.2 Ω
Lower Input Capacitance ID = 7.2 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220F
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.155 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Ο
Continuous Drain Current (TC=25 C ) 7.2
ID Ο
A
Continuous Drain Current (TC=100 C ) 5.1
IDM Drain Current-Pulsed O
1 37 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O2 104 mJ
IAR Avalanche Current O1 7.2 A
EAR Repetitive Avalanche Energy O1 2.8 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Ο
Total Power Dissipation (TC=25 C ) 28 W
PD
Linear Derating Factor 0.19 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θ JC Junction-to-Case -- 5.4 Ο
C /W
R θ JA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS520A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µ A
∆ BV/
∆ TJBreakdown Voltage Temp. Coeff. -- 0.12 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µ A
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.2 Ω VGS=10V,ID=3.6A O
4
On-State Resistance
gfs Forward Transconductance -- 6.2 -- Ω VDS=40V,ID=3.6A O
4

Ciss Input Capacitance -- 370 480

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 38 45
td(on) Turn-On Delay Time -- 14 40
VDD=50V,ID=9.2A,
tr Rise Time -- 14 40
ns RG=18Ω
td(off) Turn-Off Delay Time -- 36 90
tf --
See Fig 13 O
4 O
5
Fall Time 28 70
Qg Total Gate Charge -- 16 22 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 2.7 -- nC ID=9.2A
Qgd Gate-Drain(“Miller”) Charge -- 7.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 7.2 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 37 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=7.2A,VGS=0V
trr Reverse Recovery Time -- 98 -- ns Ο
TJ=25 C ,IF=9.2A
Qrr Reverse Recovery Charge -- 0.34 -- µ C diF/dt=100A/ µ s O
4

Notes ;
O1 Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
L=3mH, I AS=7.2A, V DD=25V, R G=27Ω , Starting T J =25 C
o
O2

O3 _
< µ _ BVDSS , Starting T J =25 oC
_ 9.2A, di/dt 300A/ s, V DD <
ISD <
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS520A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V 101
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
175 oC

100
0
10 25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]

[A]
Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.4
IDR , Reverse Drain Current

101
0.3 VGS = 10 V
RDS(on) , [Ω ]

0.2

100
VGS = 20 V
0.1
@ Notes :
175 oC 1. VGS = 0 V
o
@ Note : TJ = 25 C 25 oC 2. 250 µs Pulse Test

0.0 10-1
0 10 20 30 40 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
600
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

400 VDS = 80 V
Capacitance

C oss

5
@ Notes :
200 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID = 9.2 A
00 1
0
10 10 0 5 10 15 20
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS520A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 4.6 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
8
[A]

102 Operation in This Area

[A]
is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

6
100 µs
1 ms
101 10 ms
100 ms 4
DC

100
@ Notes :
2
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2

0.1 @ Notes :
1. Zθ J C (t)=5.4 o C/W Max.
0.05
2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
0.02
10- 1
ZθJC(t) ,

0.01
PDM
single pulse t1
t2
-2
10
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS520A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS520A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS530A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.11 Ω
Lower Input Capacitance ID = 10.7 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220F
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.092 Ω(Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
10.7
ID A
Continuous Drain Current (TC=100 C) Ο
7.6
IDM Drain Current-Pulsed O
1 56 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 229 mJ
IAR Avalanche Current O1 10.7 A
EAR Repetitive Avalanche Energy O1 3.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
32 W
PD
Linear Derating Factor 0.21 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 4.69 Ο
C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS530A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ C ID=250µ A
Ο
See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.11 Ω VGS=10V,ID=5.35A O
4
On-State Resistance
gfs Forward Transconductance -- 9.18 -- Ω VDS=40V,ID=5.35A O
4

Ciss Input Capacitance -- 610 790

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 150 175 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 62 72
td(on) Turn-On Delay Time -- 13 40
VDD=50V,ID=14A,
tr Rise Time -- 14 40
ns RG=12Ω
td(off) Turn-Off Delay Time -- 55 110
tf --
See Fig 13 O
4 O
5
Fall Time 36 80
Qg Total Gate Charge -- 27 36 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 4.5 -- nC ID=14A
Qgd Gate-Drain(“Miller”) Charge -- 12.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 10.7 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 56 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=10.7A,VGS=0V
trr Reverse Recovery Time -- 109 -- ns Ο
TJ=25 C ,IF=14A
Qrr Reverse Recovery Charge -- 0.41 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=3mH, I AS=10.7A, V DD=25V, R G=27 Ω , Starting T J =25 C
o
O2

O3 ISD <_ 14A, di/dt <_ 350A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS530A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
101
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
101 5.0 V
Bottom : 4.5 V
175 oC

100
25 oC
@ Notes :
1. VGS = 0 V
0 @ Notes :
10 2. VDS = 40 V
1. 250 µs Pulse Test
- 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.20
IDR , Reverse Drain Current

VGS = 10 V
0.15
101
RDS(on) , [Ω]

0.10

100
VGS = 20 V
0.05
@ Notes :
175 oC 1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 10-1
0 15 30 45 60 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
1000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V
750
VDS = 80 V
Capacitance

C oss
500
5
@ Notes :
1. VGS = 0 V
C rss
250 2. f = 1 MHz

@ Notes : ID = 14.0 A
00 0
10 101 0 5 10 15 20 25 30
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS530A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 7.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
12
[A]

[A]

Operation in This Area

102 is Limited by R DS(on)
ID , Drain Current

ID , Drain Current

9
100 µs
1 ms
101 10 ms
100 ms 6
DC

100 @ Notes :
3
1. TC = 25 oC
o
2. TJ = 175 C
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2

0.1 @ Notes :
1. Zθ J C (t)=4.69 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01
PDM

single pulse t1
θ

t2

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS530A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS530A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS540A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.052 Ω
Lower Input Capacitance ID = 17 A
Improved Gate Charge
Extended Safe Operating Area
Ο
175 C Operating Temperature
TO-220F
Lower Leakage Current : 10 µ A (Max.) @ VDS = 100V
Lower RDS(ON) : 0.041 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
17
ID A
Continuous Drain Current (TC=100 C) Ο
12
IDM Drain Current-Pulsed O
1 110 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 385 mJ
IAR Avalanche Current O1 17 A
EAR Repetitive Avalanche Energy O1 3.9 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
39 W
PD
Linear Derating Factor 0.26 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.8 Ο
C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS540A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/∆ TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.052 Ω VGS=10V,ID=8.5A O
4
On-State Resistance
gfs Forward Transconductance -- 18.84 -- Ω VDS=40V,ID=8.5A O
4

Ciss Input Capacitance -- 1320 1710

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 325 380 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 148 170
td(on) Turn-On Delay Time -- 18 50
VDD=50V,ID=28A,
tr Rise Time -- 18 50
ns RG=9.1Ω
td(off) Turn-Off Delay Time -- 90 180
tf --
See Fig 13 O
4 O
5
Fall Time 56 120
Qg Total Gate Charge -- 60 78 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 10.8 -- nC ID=28A
Qgd Gate-Drain(“Miller”) Charge -- 27.9 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 17 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 110 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V Ο
TJ=25 C ,IS=17A,VGS=0V
trr Reverse Recovery Time -- 132 -- ns Ο
TJ=25 C ,IF=28A
Qrr Reverse Recovery Charge -- 0.63 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=17A, V DD=25V, R G=27 Ω, Starting T J =25 C
o
O2

O3 ISD <_ 28A, di/dt <_ 400A/ µs, V DD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS540A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
102 102
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V 175 oC
5.0 V
Bottom : 4.5 V
101
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
- 55 oC
1. 250 µs Pulse Test
3. 250 µs Pulse Test
100 2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.08
102
IDR , Reverse Drain Current

0.06 VGS = 10 V
RDS(on) , [Ω]

0.04 101

VGS = 20 V
0.02
@ Notes :
175 oC
1. VGS = 0 V
@ Note : TJ = 25 oC 25 oC 2. 250 µs Pulse Test

0.00 100
0 30 60 90 120 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
2500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
10
[pF]

2000 Crss= Cgd

VGS , Gate-Source Voltage

C iss VDS = 50 V

VDS = 80 V
Capacitance

1500
C oss

1000 5
@ Notes :
1. VGS = 0 V
C rss 2. f = 1 MHz
500

@ Notes : ID =28.0 A
00 0
10 101 0 10 20 30 40 50 60 70
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS540A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
RDS(on) , (Normalized)
BVDSS , (Normalized)

2.5
1.1
2.0

1.0 1.5

1.0

0.9 @ Notes : @ Notes :

1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 14.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ C] o TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
20
[A]

[A]

Operation in This Area

is Limited by R DS(on)
102 10 µs
ID , Drain Current

ID , Drain Current

100 µs 15

1 ms
10 ms
101 100 ms 10
DC

100 @ Notes :
5
1. TC = 25 oC
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.8 o C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Zθ J C (t)
10- 1 0.02
Z JC(t) ,

0.01 PDM

t1
single pulse t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS540A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS540A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS550A
FEATURES
BVDSS = 100 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.04 Ω
Lower Input Capacitance ID = 21 A
Improved Gate Charge
Extended Safe Operating Area
175 C Operating Temperature
Ο
TO-220F
Lower Leakage Current : 10 µA (Max.) @ VDS = 100V
Lower RDS(ON) : 0.032 Ω (Typ.)
1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 100 V
Continuous Drain Current (TC=25 C) Ο
21
ID A
Continuous Drain Current (TC=100 C) Ο
14.8
IDM Drain Current-Pulsed O
1 160 A
VGS Gate-to-Source Voltage +
_ 20 V
EAS Single Pulsed Avalanche Energy O
2 588 mJ
IAR Avalanche Current O1 21 A
EAR Repetitive Avalanche Energy O1 4.6 mJ
dv/dt Peak Diode Recovery dv/dt O3 6.5 V/ns
Total Power Dissipation (TC=25 C )
Ο
46 W
PD
Linear Derating Factor 0.31 W/ C Ο

Operating Junction and

TJ , TSTG - 55 to +175
Storage Temperature Range
Ο
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8” from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.27 Ο
C /W
R θJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS550A POWER MOSFET

Electrical Characteristics (TC=25 C unless otherwise specified)

Ο

Symbol Characteristic Min. Typ. Max. Units Test Condition

BVDSS Drain-Source Breakdown Voltage 100 -- -- V VGS=0V,ID=250 µA
∆ BV/ ∆TJ Breakdown Voltage Temp. Coeff. -- 0.11 -- V/ CΟ
ID=250µ A See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=20V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-20V
-- -- 10 VDS=100V
IDSS Drain-to-Source Leakage Current µA Ο
-- -- 100 VDS=80V,TC=150 C
Static Drain-Source
RDS(on) -- -- 0.04 Ω VGS=10V,ID=10.5A O
4
On-State Resistance
gfs Forward Transconductance -- 22.53 -- Ω VDS=40V,ID=10.5A O
4

Ciss Input Capacitance -- 1750 2270

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 420 485 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 185 215
td(on) Turn-On Delay Time -- 17 50
VDD=50V,ID=40A,
tr Rise Time -- 20 50
ns RG=6.2 Ω
td(off) Turn-Off Delay Time -- 80 160
tf --
See Fig 13 O
4 O
5
Fall Time 45 100
Qg Total Gate Charge -- 75 97 VDS=80V,VGS=10V,
Qgs Gate-Source Charge -- 13.2 -- nC ID=40A
Qgd Gate-Drain(“Miller”) Charge -- 34.8 -- See Fig 6 & Fig 12 O
4 O
5

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 21 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 160 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.6 V Ο
TJ=25 C ,IS=21A,VGS=0V
trr Reverse Recovery Time -- 135 -- ns Ο
TJ=25 C ,IF=40A
Qrr Reverse Recovery Charge -- 0.65 -- µC diF/dt=100A/ µs O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=2mH, I AS=21A, V DD=25V, R G=27 Ω , Starting T J =25 C
o
O2

O3 ISD <_ 40A, di/dt <_ 470A/ µs, VDD<_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS550A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
102 Top : 15V 102
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V 175 oC
Bottom : 4.5 V
1
10
101

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
100 1. 250 µs Pulse Test - 55 oC
3. 250 µs Pulse Test
2. TC = 25 oC
100
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

0.06
IDR , Reverse Drain Current

102
0.05
VGS = 10 V
RDS(on) , [Ω]

0.04

0.03
101
VGS = 20 V
0.02

@ Notes :
0.01 175 oC
1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.00 100
0 25 50 75 100 125 150 175 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 2.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
3000
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 20 V
C iss 10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 50 V

2000 VDS = 80 V
Capacitance

C oss

5
@ Notes :
1000 1. VGS = 0 V
C rss
2. f = 1 MHz

@ Notes : ID =40.0 A
00 0
10 101 0 10 20 30 40 50 60 70 80
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS550A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 20.0 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 200 -75 -50 -25 0 25 50 75 100 125 150 175 200
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
25
[A]

[A]

Operation in This Area

is Limited by R DS(on)

10 µs 20
ID , Drain Current

ID , Drain Current

102
100 µs
1 ms
10 ms 15

101 100 ms
DC
10

100 @ Notes :
1. TC = 25 oC 5
2. TJ = 175 oC
3. Single Pulse
10-1 0
100 101 102 25 50 75 100 125 150 175
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5
100
0.2
@ Notes :
o
0.1 1. Zθ J C (t)=3.27 C/W Max.
2. Duty Factor, D=t1 /t2
0.05
3. TJ M -TC =PD M *Z (t)
θJC
10- 1
0.02
Z JC(t) ,

PDM
0.01
t1
single pulse t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS550A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50K Ω as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS550A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS610A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 1.5 Ω
Lower Input Capacitance ID = 2.5 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220F
Low RDS(ON) : 1.169 Ω (Typ.)

1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 2.5
ID A
Continuous Drain Current (TC=100 oC) 1.6
IDM Drain Current-Pulsed O
1 10 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 42 mJ
IAR Avalanche Current O1 2.5 A
EAR Repetitive Avalanche Energy O1 2.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 22 W
PD o
Linear Derating Factor 0.18 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range o
C
Maximum Lead Temp. for Soldering
TL 300
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 5.71 o
C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS610A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.23 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 1.5 Ω VGS=10V,ID=1.25A O
4
On-State Resistance
gfs Forward Transconductance -- 1.18 -- Ω VDS=40V,ID=1.25A O
4

Ciss Input Capacitance -- 160 210

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 35 44 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 14 18
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=3.3A,
tr Rise Time -- 10 30
ns RG=24Ω
td(off) Turn-Off Delay Time -- 20 50
See Fig 13 4 O
tf Fall Time -- 12 35 O 5

Qg Total Gate Charge -- 7 10 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 1.5 -- nC ID=3.3A
4 O
O 5
Qgd Gate-Drain( “ Miller “ ) Charge -- 3.5 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 2.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 10 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=2.5A,VGS=0V
trr Reverse Recovery Time -- 107 -- ns TJ=25oC ,IF=3.3A
Qrr Reverse Recovery Charge -- 0.33 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=10mH, I AS=2.5A, V DD=50V, R G=27Ω , Starting T J =25 C
o
O2

O3 ISD <_ 3.3A, di/dt <_140A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS610A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
101 101
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
100 Bottom : 4.5 V
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
10-1 @ Notes : - 55 oC 2. VDS = 40 V
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
4 101
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V
3
RDS(on) , [Ω]

2 100

1
150 oC @ Notes :
VGS = 20 V
1. VGS = 0 V
25 oC 2. 250 µs Pulse Test
@ Note : TJ = 25 oC

0 10-1
0 2 4 6 8 10 0.4 0.6 0.8 1.0 1.2 1.4
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
300
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

Crss= Cgd
VGS , Gate-Source Voltage

VDS = 100 V

C iss VDS = 160 V

200
Capacitance

C oss 5
@ Notes :
100 1. VGS = 0 V
2. f = 1 MHz
C rss

@ Notes : ID = 3.3 A
00 0
10 101 0 2 4 6 8
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS610A POWER MOSFET

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

Drain-Source Breakdown Voltage

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 1.65 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
o
TJ , Junction Temperature [ C] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
102 3.0
[A]

[A]

Operation in This Area

is Limited by R DS(on) 2.5
ID , Drain Current

ID , Drain Current

101
100 µs
1 ms 2.0
10 ms
100 ms
100 1.5
DC

1.0
@ Notes :
10-1
1. TC = 25 oC
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 0.0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100 0.2

0.1 @ Notes :
1. Zθ J C (t)=5.71 o C/W Max.
0.05
2. Duty Factor, D=t1 /t2
0.02 3. TJ M -TC =PD M *Zθ J C (t)
10- 1
0.01
Z JC(t) ,

PDM

t1
single pulse
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS610A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS610A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS620A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.8 Ω
Lower Input Capacitance ID = 4.1 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220F
Low RDS(ON) : 0.626 Ω (Typ.)

1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 4.1
ID A
Continuous Drain Current (TC=100 oC) 2.6
IDM Drain Current-Pulsed O
1 18 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 78 mJ
IAR Avalanche Current O1 4.1 A
EAR Repetitive Avalanche Energy O1 3.2 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC ) 32 W
PD o
Linear Derating Factor 0.25 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering o
TL 300 C
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
R θJC Junction-to-Case -- 3.95 o
C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS620A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/ ∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.24 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.8 Ω VGS=10V,ID=2.05A O
4
On-State Resistance
gfs Forward Transconductance -- 2.34 -- Ω VDS=40V,ID=2.05A O
4

Ciss Input Capacitance -- 275 360

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 55 65 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 25 30
td(on) Turn-On Delay Time -- 10 30
VDD=100V,ID=5A,
tr Rise Time -- 11 30
ns RG=18Ω
td(off) Turn-Off Delay Time -- 26 60
See Fig 13 4 O
tf Fall Time -- 15 40 O 5

Qg Total Gate Charge -- 12 17 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 2.4 -- nC ID=5A
4 O
O 5
Qgd Gate-Drain(“ Miller “) Charge -- 6.2 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 4.1 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 18 in the MOSFET
VSD Diode Forward Voltage O
4 -- -- 1.5 V TJ=25oC,IS=4.1A,VGS=0V
trr Reverse Recovery Time -- 122 -- ns TJ=25oC ,IF=5A
Qrr Reverse Recovery Charge -- 0.51 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
Ω , Starting T J =25 C
o
O2 L=7mH, I AS=4.1A, V DD=50V, R G=27
O3 ISD<_ 5A, di/dt <_180A/ µs, V DD <_BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS620A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
101 Top : 15V
101
[A]

[A]
10 V
8.0 V
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
100
150 oC
100

25 oC
@ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
10-1 - 55 oC
1. 250 µs Pulse Test 3. 250 µs Pulse Test
2. TC = 25 oC
10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
Drain-Source On-Resistance

2.0
IDR , Reverse Drain Current

101

1.5 VGS = 10 V
RDS(on) , [Ω]

1.0
100

VGS = 20 V
0.5
@ Notes :
150 oC 1. VGS = 0 V
o
@ Note : TJ = 25 oC 25 C 2. 250 µs Pulse Test

0.0 10-1
0 3 6 9 12 15 18 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
ID , Drain Current [A] VSD , Source-Drain Voltage [V]

Fig 5. Capacitance vs. Drain-Source Voltage Fig 6. Gate Charge vs. Gate-Source Voltage
500
[V]

Ciss= Cgs+ Cgd ( Cds= shorted )

Coss= Cds+ Cgd VDS = 40 V
10
[pF]

400 Crss= Cgd

VGS , Gate-Source Voltage

VDS = 100 V
C iss
VDS = 160 V
Capacitance

300

200 C oss 5
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
100

@ Notes : ID = 5.0 A
00 0
10 101 0 3 6 9 12
VDS , Drain-Source Voltage [V] QG , Total Gate Charge [nC]
 N-CHANNEL
IRFS620A POWER MOSFET
Drain-Source Breakdown Voltage

Fig 7. Breakdown Voltage vs. Temperature Fig 8. On-Resistance vs. Temperature

1.2 3.0

Drain-Source On-Resistance
BVDSS , (Normalized)

RDS(on) , (Normalized)
2.5
1.1
2.0

1.0 1.5

1.0
0.9 @ Notes : @ Notes :
1. VGS = 0 V 1. VGS = 10 V
0.5
2. ID = 250 µA 2. ID = 2.5 A

0.8 0.0
-75 -50 -25 0 25 50 75 100 125 150 175 -75 -50 -25 0 25 50 75 100 125 150 175
TJ , Junction Temperature [ oC] TJ , Junction Temperature [ oC]

Fig 9. Max. Safe Operating Area Fig 10. Max. Drain Current vs. Case Temperature
5
[A]

[A]

102
Operation in This Area
is Limited by R DS(on)
4
ID , Drain Current

ID , Drain Current

100 µs
101
1 ms
10 ms 3
100 ms
100 DC
2

@ Notes :
10-1 1. TC = 25 oC 1
2. TJ = 150 oC
3. Single Pulse
10-2 0
100 101 102 25 50 75 100 125 150
VDS , Drain-Source Voltage [V] Tc , Case Temperature [ oC]

Fig 11. Thermal Response

Thermal Response

D=0.5

100
0.2
@ Notes :
0.1 1. Zθ J C (t)=3.95 o
C/W Max.
0.05 2. Duty Factor, D=t1 /t2
3. TJ M -TC =PD M *Z (t)
θJC
10- 1 0.02
Z JC(t) ,

0.01 PDM

t1
single pulse
t2
θ

10- 2
10- 5 10- 4 10- 3 10- 2 10- 1 100 101
t 1 , Square Wave Pulse Duration [sec]
 N-CHANNEL
POWER MOSFET IRFS620A
Fig 12. Gate Charge Test Circuit & Waveform

“ Current Regulator ”
VGS
Same Type
50KΩ as DUT Qg
12V 200nF
300nF 10V

VDS
VGS Qgs Qgd

DUT
3mA
R1 R2

Current Sampling (I G) Current Sampling (I D)

Charge
Resistor Resistor

Fig 13. Resistive Switching Test Circuit & Waveforms

RL
Vout Vout
90%
Vin VDD
( 0.5 rated V DS )
RG
DUT 10%
Vin
10V
td(on) tr td(off)
tf
t on t off

Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms

BVDSS
LL 1
EAS = ---- LL IAS2 --------------------
VDS 2 BVDSS -- VDD
Vary tp to obtain ID BVDSS
required peak ID IAS

RG C VDD ID (t)
DUT
VDD VDS (t)
10V
tp tp Time
 N-CHANNEL
IRFS620A POWER MOSFET

Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms

DUT +

VDS

--

IS
L

Driver
VGS
RG Same Type
as DUT VDD

VGS • dv/dt controlled by “RG”

• IS controlled by Duty Factor “D”

Gate Pulse Width

VGS D = --------------------------
Gate Pulse Period 10V
( Driver )

IFM , Body Diode Forward Current

IS
( DUT ) di/dt

IRM

Body Diode Reverse Current

VDS
( DUT ) Body Diode Recovery dv/dt

Vf VDD

Body Diode
Forward Voltage Drop
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.

ACEx™ ISOPLANAR™ UHC™

CoolFET™ MICROWIRE™ VCX™
CROSSVOLT™ POP™
E2CMOSTM PowerTrench™
FACT™ QS™
FACT Quiet Series™ Quiet Series™
FAST® SuperSOT™-3
FASTr™ SuperSOT™-6
GTO™ SuperSOT™-8
HiSeC™ TinyLogic™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER

NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.

PRODUCT STATUS DEFINITIONS

Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.

Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
 Advanced Power MOSFET IRFS630A
FEATURES
BVDSS = 200 V
Avalanche Rugged Technology
Rugged Gate Oxide Technology
RDS(on) = 0.4 Ω
Lower Input Capacitance ID = 6.5 A
Improved Gate Charge
Extended Safe Operating Area
Lower Leakage Current : 10 µA (Max.) @ VDS = 200V
TO-220F
Low RDS(ON) : 0.333 Ω (Typ.)

1
2
3

1.Gate 2. Drain 3. Source

Absolute Maximum Ratings

Symbol Characteristic Value Units
VDSS Drain-to-Source Voltage 200 V
o
Continuous Drain Current (TC=25 C) 6.5
ID A
Continuous Drain Current (TC=100 oC) 4.1
IDM Drain Current-Pulsed O
1 36 A
VGS Gate-to-Source Voltage +
_ 30 V
EAS Single Pulsed Avalanche Energy O
2 141 mJ
IAR Avalanche Current O1 6.5 A
EAR Repetitive Avalanche Energy O1 3.8 mJ
dv/dt Peak Diode Recovery dv/dt O3 5.0 V/ns
Total Power Dissipation (TC=25 oC) 38 W
PD o
Linear Derating Factor 0.3 W/ C
Operating Junction and
TJ , TSTG - 55 to +150
Storage Temperature Range
Maximum Lead Temp. for Soldering o
TL 300 C
Purposes, 1/8 “ from case for 5-seconds

Thermal Resistance
Symbol Characteristic Typ. Max. Units
RθJC Junction-to-Case -- 3.33 o
C/W
RθJA Junction-to-Ambient -- 62.5

Rev. B

©1999 Fairchild Semiconductor Corporation

 N-CHANNEL
IRFS630A POWER MOSFET

Electrical Characteristics (TC=25oC unless otherwise specified)

Symbol Characteristic Min. Typ. Max. Units Test Condition
BVDSS Drain-Source Breakdown Voltage 200 -- -- V VGS=0V,ID=250µA
∆BV/∆TJ V/ C ID=250 µA
o
Breakdown Voltage Temp. Coeff. -- 0.21 -- See Fig 7
VGS(th) Gate Threshold Voltage 2.0 -- 4.0 V VDS=5V,ID=250 µA
Gate-Source Leakage , Forward -- -- 100 VGS=30V
IGSS nA
Gate-Source Leakage , Reverse -- -- -100 VGS=-30V
-- -- 10 VDS=200V
IDSS Drain-to-Source Leakage Current µA VDS=160V,TC=125 C
o
-- -- 100
Static Drain-Source
RDS(on) -- -- 0.4 Ω VGS=10V,ID=3.25A O
4
On-State Resistance
gfs Forward Transconductance -- 3.58 -- Ω VDS=40V,ID=3.25A O
4

Ciss Input Capacitance -- 500 650

VGS=0V,VDS=25V,f =1MHz
Coss Output Capacitance -- 95 110 pF
See Fig 5
Crss Reverse Transfer Capacitance -- 45 55
td(on) Turn-On Delay Time -- 13 40
VDD=100V,ID=9A,
tr Rise Time -- 13 40
ns RG=12 Ω
td(off) Turn-Off Delay Time -- 30 70
See Fig 13 4 O
tf Fall Time -- 18 50 O 5

Qg Total Gate Charge -- 22 29 VDS=160V,VGS=10V,

Qgs Gate-Source Charge -- 4.3 -- nC ID=9A
4 O
O 5
Qgd Gate-Drain(“Miller”) Charge -- 10.9 -- See Fig 6 & Fig 12

Source-Drain Diode Ratings and Characteristics

Symbol Characteristic Min. Typ. Max. Units Test Condition
IS Continuous Source Current -- -- 6.5 Integral reverse pn-diode
A
ISM Pulsed-Source Current O
1 -- -- 36 in the MOSFET
VSD Diode Forward Voltage O4 -- -- 1.5 V TJ=25oC,IS=6.5A,VGS=0V
trr Reverse Recovery Time -- 137 -- ns TJ=25oC ,IF=9A
Qrr Reverse Recovery Charge -- 0.68 -- µC diF/dt=100A/µ s O
4

Notes ;
O Repetitive Rating : Pulse Width Limited by Maximum Junction
1 Temperature
L=5mH, I AS=6.5A, V DD=50V, R G=27Ω, Starting T J =25 C
o
O2

O3 ISD <_ 9A, di/dt <_220A/ µs, V DD <_ BVDSS , Starting T J =25 oC
O4 Pulse Test : Pulse Width = 250 µs, Duty Cycle < _ 2%
O5 Essentially Independent of Operating Temperature
 N-CHANNEL
POWER MOSFET IRFS630A
Fig 1. Output Characteristics Fig 2. Transfer Characteristics
VGS
Top : 15V
[A]

[A]
10 V
8.0 V
101 101
7.0 V
ID , Drain Current

ID , Drain Current
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V

150 oC
100 100
25 oC @ Notes :
1. VGS = 0 V
@ Notes : 2. VDS = 40 V
1. 250 µs Pulse Test - 55 oC 3. 250 µs Pulse Test
2. TC = 25 oC
10-1 10-1
10-1 100 101 2 4 6 8 10
VDS , Drain-Source Voltage [V] VGS , Gate-Source Voltage [V]
[A]

Fig 3. On-Resistance vs. Drain Current Fig 4. Source-Drain Diode Forward Voltage
1.00
Drain-Source On-Resistance

IDR , Reverse Drain Current

VGS = 10 V 101
0.75
RDS(on) , [Ω]

0.50

100

0.25 @ Notes :