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FRAM MCUS For Dummies Part 2
FRAM MCUS For Dummies Part 2
FRAM MCUS For Dummies Part 2
Editor’s note: Demand for memory is insatiable at all levels of systems design. As
designers look to respond with larger memory stores and more complex memory
architectures, a greater understanding about a broad range of memory types becomes
more critical. This excerpt of Texas Instruments FRAM MCUs For Dummies by V.C.
Kumar offers a detailed look at FRAM technology and its characteristics. In part 1 of
this series, author Kumar reviewed the basics of FRAM technology. In this part 2,
Kumar discusses FRAM's characteristics and advantages.
Excerpted from Texas Instruments FRAM MCUs For Dummies®, © 2012 John Wiley & Sons, Inc.
Available exclusively from Mouser Electronics, Inc. To request your free copy, please visit
www.mouser.com/framfordummies.
Given the key macro technology trends driving innovation in microcontrollers today - ever-present
wireless connectivity, focus on ultra-low power consumption, and security - core technologies need
to keep pace meeting product needs. This chapter shows how FRAM memory technology is helping
to meet those needs.
In the last five years, step function innovation has taken place in most areas of microcontrollers. This
innovation covers the range from the core to analog peripherals. Conversely, embedded nonvolatile
memories have seen only incremental innovations. As a result, there are several nonvolatile memory
characteristics that can benefit a microcontroller user:
● Faster memory access speeds, especially for write operations. EEPROM (Electrically
Erasable Programmable Read-Only Memory) and flash have slow write operations. Also, flash
requires a complicated erase and program process at a block/segment level that drives the need
for significant overhead, such as redundant memory and a multistep write process.
● Lower power (energy) consumption, especially during write/update processes.
EEPROM/flash require 10 V–14 V (higher in some cases) to write.
● Higher write endurance (number of write cycles), especially in the nonvolatile memory
space. Higher endurance can help both in emerging remote sensor data logging applications as
well as enabling unified memory capability in some applications.
● Higher inherent security. Greater resistance to tampering and unauthorized manipulation.
Several of these needs were not requirements or considerations when the previous generation of
embedded nonvolatile memory technologies (flash, EEPROM) were developed in the 1980s. The
fact that today’s nonvolatile memory technologies do not exhibit these characteristics is not
surprising. To realize the complete vision and benefits of the technology trends, you need a next-
generation, embedded, nonvolatile technology that has the advanced features mentioned earlier.
The primary embedded memory technologies used today in microcontrollers are flash and EEPROM.
Note that flash memory is actually a variation of EEPROM that can be erased and reprogrammed in
units of memory called blocks rather than bytes. Like FRAM, both EEPROM and flash are nonvolatile
memory technologies, which means they don’t lose their data contents when power is removed.
FRAM, or Ferroelectric Random Access Memory, is at the forefront of these next-generation memory
technologies for ultra-low power applications; it is also the most proven technology, having been
used for the past several years in many applications from battery-backed SRAM replacement
devices, to automotive applications, to mass transit payment cards as standalone and embedded
memory.
significant progress
As we discuss in Chapter 1, the key performance targets and technology features for the FRAM
technology developed at Texas Instruments (TI) focused on ultra-low power consumption and cost-
efficient implementations. These choices have an impact on the characteristics of the technology
developed, but these characteristics don’t always represent limitations of the technology itself but
rather of the technology TI plans to embed in its products currently.
Note: Unlike the mature flash/EEPROM technologies that have been around since the 1980s,
embedded FRAM technology is in the early adoption phase of the technology life-cycle diagram, as
shown in Figure 3-1.
Figure 3-1. Early adoption phase of embedded FRAM technology.
Although significant progress has been made in terms of manufacturability, memory density,
reliability, and so on, FRAM technology still offers many opportunities for innovators. Even as Texas
Instruments is continuing its tradition of innovation, we will distinguish between the characteristics
of FRAM technology and the implementation in embedded form with our first-generation embedded
FRAM microcontrollers (see Chapter 4).
To maximize FRAM adoption rate, TI needs to bring value today, addressing current customer
problems and needs while building up confidence in the technology. It is important to note that
while embedded FRAM microcontrollers bring significant differentiated value, they may not be
better in every product/ application, so embedded flash/EEPROM products will continue to be used
for the foreseeable future.
In contrast to flash or EEPROM, TI’s FRAM core boasts very low memory access power
requirements needing just 1.5 V to read or write, compared to the over 10 V–14 V write for flash and
EEPROM. Lower voltage has the added benefit of enabling functional processing to occur in less
time because there is no need to wait for the charge pump to drive voltage up, thus supporting
battery-life savings in battery-operated devices. The secret behind this low-power operation is that a
high electric field is not required to switch the dipoles in FRAM, enabling the use of just 1.5 V to
write and read data.
Some types of flash memory allow the user to change a 1 to a 0 but not a 0 to a 1 without a
complete sector erase and pro.gram. The use of that functionality in practice is limited.
This longer write endurance supports cost-effective programming of devices, and also enables cost-
and power-effective data logging especially in applications that require a large number of write
cycles in excess of what can be supported by EEPROM and flash memories.
One vulnerability example occurs when the memory is in static mode with no energy coming in or
out of the floating gate. In this state, nanoprobes can be used to scan the memory in the floating
gate, and the electric fields can be measured to deter.mine the stored data. This vulnerability could
potentially reveal sensitive data, encryption keys, or privileges and access rights. Similarly, the
difference in read and write times as well as the difference in power consumption between a read
and a write in flash or EEPROM can be exploited by hackers. Finally, a charge pump on board can
be an important security vulnerability in light flash attacks.
While countermeasures exist that can be included to address all of these threats, these are time-
consuming, add overhead, and are often power hungry and expensive.
FRAM is based on dipole position rather than charge, is low power, has fast access times, and has
similar read and write process speed and power consumption. These characteristics could simplify
the countermeasures needed, making the countermeasures more cost-effective and easier to
implement.
FRAM devices exhibit a relatively high immunity to radiation effects since information is stored as
polarization and not as an electric charge. Switching the polarization requires local application of an
electric field to the capacitor, so an alpha (or other radiation) hit is very unlikely to cause a change
in the polarization of a given cell. FRAM’s terrestrial SER is below detection limits, which is very
advantageous in medical, security, and space-related applications.
As we discuss in Chapter 2, the state of the FRAM cell is changed by applying an electrical field over
the PZT capacitor. This field needs to be applied locally, directly to the bit line or the plate line.
External electrical fields need to be in the order of 15 kV to cause the same effect and would affect
other parts of the chip as well. In practice though, application of conductors above and below the
cell (metal layers for circuits, pads, and so on) will prevent the external fields from reaching the cell,
so FRAM chips are practically impervious to external electric fields.
TI’s FRAM technology is fully compatible with CMOS processes with a 2-mask adder to the digital
process flow so that FRAM can be quickly migrated to smaller technology nodes. The FRAM bit cell
size also follows Moore’s Law, allowing for future density increases. TI has already successfully
designed arrays up to 32 Mb densities.
Excerpted from Texas Instruments FRAM MCUs For Dummies®, © 2012 John Wiley & Sons, Inc.
Available exclusively from Mouser Electronics, Inc. To request your free copy, please visit
www.mouser.com/framfordummies.